A 0.2-μm self-aligned selective-epitaxial-growth SiGe HBTfeaturing 107-GHz fmax and 6.7-ps ECL

A 0.2-μm self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistor (HBT), with shallow-trench and dual-deep-trench isolations and Ti-salicide electrodes, has been developed. The 0.6-μm-wide Si-cap/SiGe-base multilayer was selectively grown by UHV/CVD. The process, except the SEG, is almost completely compatible with well-established bipolar-CMOS technology and the SiGe HBTs were fabricated on a 200-mm wafer line. The SiGe HBTs have demonstrated a peak cutoff frequency of 90 GHz, a peak maximum oscillation frequency of 107 GHz, and an ECL gate delay time of 6.7 ps. Four-level interconnects, including MIM capacitors and high-Q inductors, were formed by chemical mechanical polishing     

Microwave and noise performance of SiGe BiCMOS HBT under cryogenic temperatures

In this letter, the microwave and noise performance of SiGe heterojunction bipolar transistors (HBTs) has been characterized when cooling down the temperature. It was found that SiGe HBTs (fabricated in the framework of BiCMOS process) exhibit a maximum oscillation frequency f/sub max/ of about 292 GHz at 78 K, which represents an increase of about 30% with the value measured at room temperature. The noise performance has also been characterized at cryogenic temperatures, using an original de-embedding approach. Then, using the Hawkin's noise model in conjunction with an accurate small signal equivalent extraction, the four noise parameters have been estimated. The noise figure with a 50 /spl Omega/ source impedance was measured to be equal to 1.5 dB at 40 GHz at 78 K, which is one of the lowest value reported for BiCMOS SiGe HBT in the millimeter-wave range.     

Low-power multi-GHz and multi-Gb/s SiGe BiCMOS circuits

Over the last decade, SiGe HBT BiCIMOS technology has matured from a laboratory research effort to become a 50/65-GHz fT/fmax silicon-based 0.5-μm BiCMOS production technology. This progress has extended silicon-based production technology into the multigigahertz (multi-GHz) and multigigabits-per-second (multi-Gb/s) range, thus, opening up an array of wireless and wired circuit and network applications and markets. SiGe circuits are now being designed in the same application space as GaAs MESFET and HBTs, and offer the yield cost, stability and manufacturing advantages associated with conventional silicon fabrication. A wide range of microwave circuits have been built in this technology including 5.8-GHz low-noise amplifiers with 1-V supply, up to 17-GHz fully monolithic VCOs with excellent figures of merit, high-efficiency 2.4-GHz power devices with supply voltage of 1.5 V, and move complicated functions such as 2.5/5.0-GHz frequency synthesizer circuits as well as 10/12.5-Gb/s clock and data recovery PLLs. This paper focuses on several key circuit applications of SiGe BiCMOS technology and describes the performance improvements that can be obtained by its utilization in mixed-signal microwave circuit design. By way of examples, the article highlights the fact that the combination of high-bandwidth, high-gain and low-noise SiGe HBTs with dense CMOS functionality in a SiGe BiCMOS technology enables implementation of powerful single-chip transceiver architectures for multi-GHz and multi-Gb/s communication applications     

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75 $Omega$ Coaxial Cable

A fully differential 40-Gb/s cable driver with adjustable pre-emphasis is presented. The circuit is fabricated in a production 0.18 mum SiGe BiCMOS technology. A distributed limiting architecture is used for the driver employing high-speed HBTs in the lower voltage predriver, and a high-breakdown MOS-HV-HBT cascode, consisting of a 0.18 mum n-channel MOSFET and a high-voltage HBT (HV-HBT), for the high voltage output stages. The circuit delivers up to 3.6 V peak-to-peak per side into a 75 Omega load with variable pre-emphasis ranging from 0 to 400%. S-parameter measurements show 42 dB differential small-signal gain, a 3-dB bandwidth of 22 GHz, gain peaking control up to 25 dB at 20 GHz and input and output reflection coefficients better than -10 dB up to 40 GHz. Additional features of the driver include output amplitude control (from 1 V_pp to 3.6 V_pp per side), pulse-width control (35% to 65%) and an adjustable input dc level (1.1 V to 1.8 V) allowing the circuit to interface with a SiGe BiCMOS or MOS-CML SERDES. The transmitter is able to generate an eye opening at 38 Gb/s after 10 m of Belden 1694 A coaxial cable which introduces 22 dB of loss at 19 GHz. Measurement results also demonstrate that the transmitter IC operates as a standalone equalizer for 10-Gb/s data transmission over 40 m of Belden cable without the need for receiver equalization.     

A 43-Gb/s full-rate clock transmitter in 0.18-/spl mu/m SiGe BiCMOS technology

A 43-Gb/s full-rate clock transmitter chip for SONET OC-768 transmission systems is reported. The IC is implemented in a 0.18-/spl mu/m SiGe BiCMOS technology featuring 120 GHz f/sub T/ and 100 GHz f/sub max/ HBTs. It consists of a 4:1 multiplexer, a clock multiplier unit, and a frequency lock detector. The IC features clock jitter generation of 260 fs rms and dissipates 2.3 W from a -3.6-V supply voltage. Measurement results are compared to a previously reported half-rate clock transmitter designed using the same technology.     

Design and Scaling of W-Band SiGe BiCMOS VCOs

This paper discusses the design of 77-106 GHz Colpitts VCOs fabricated in two generations of SiGe BiCMOS technology, with MOS and HBT varactors, and with integrated inductors. Based on a study of the optimal biasing conditions for minimum phase noise, it is shown that VCOs can be used to monitor the mm-wave noise performance of SiGe HBTs. Measurements show a 106 GHz VCO operating from 2.5 V with phase noise of -101.3 dBc/Hz at 1 MHz offset, which delivers +2.5 dBm of differential output power at 25degC, with operation verified up to 125degC. A BiCMOS VCO with a differential MOS-HBT cascode output buffer using 130 nm MOSFETs delivers +10.5 dBm of output power at 87 GHz.     

40-Gb/s circuits built from a 120-GHz f/sub T/ SiGe technology

Product designs for 40-Gb/s applications fabricated from SiGe BiCMOS technologies are now becoming available. In this paper we first briefly discuss heterojunction bipolar transistor (HBT) device operation at high speed, demonstrating that perceived concerns regarding lower BV/sub CEO/ and higher current densities required to operate silicon HBTs at such high speeds do not in actuality limit design or performance. The high-speed portions of the 40-Gb/s system are then addressed individually. We demonstrate the digital capability through a 4: 1 multiplexer and a 1 : 4 demultiplexer running over 50 Gb/s error free at a -3.3-V power supply. We also demonstrate a range of analog elements, including a lumped limiting amplifier which operates with a 35-GHz bandwidth, a transimpedance amplifier with 220-/spl Omega/ gain and 49.1-GHz bandwidth, a 21.5-GHz voltage-controlled oscillator with over -100-dBc/Hz phase noise at 1-MHz offset, and a modulator driver which runs a voltage swing twice the BV/sub CEO/ of the high-speed SiGe HBT. These parts demonstrate substantial results toward product offerings, on each of the critical high-speed elements of the 40-Gb/s system.     

A 0.2-μm 180-GHz-fmax 6.7-ps-ECL SOI/HRS self-alignedSEG SiGe HBT/CMOS technology for microwave and high-speed digitalapplications

A technology for combining 0.2-μm self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs) with CMOS transistors and high-quality passive elements has been developed for use in microwave wireless and optical communication systems. The technology has been applied to fabricate devices on a 200-mm SOI wafer based on a high-resistivity substrate (SOI/HRS). The fabrication process is almost completely compatible with the existing 0.2-μm bipolar-CMOS process because of the essential similarity of the two processes. SiGe HBTs with shallow-trench isolations (STIs) and deep-trench isolations (DTIs) and Ti-salicide electrodes exhibited high-frequency and high-speed capabilities with an f_max of 180 GHz and an ECL-gate delay of 6.7 ps, along with good controllability and reliability and high yield. A high-breakdown-voltage HBT that could produce large output swings for the interface circuit was successfully added. CMOS devices (with gate lengths of 0.25 μm for nMOS and 0.3 μm for pMOS) exhibited excellent subthreshold slopes. Poly-Si resistors with a quasi-layer-by-layer structure had a low temperature coefficient. Varactors were constructed from the collector-base junctions of the SiGe HBTs. MIM capacitors were formed between the first and second metal layers by using plasma SiO₂ as an insulator. High-Q octagonal spiral inductors were fabricated by using a 3-μm thick fourth metal layer     

SiGe heterojunction bipolar transistors and circuits toward terahertz communication applications

The relatively less exploited terahertz band possesses great potential for a variety of important applications, including communication applications that would benefit from the enormous bandwidth within the terahertz spectrum. This paper overviews an approach toward terahertz applications based on SiGe heterojunction bipolar transistor (HBT) technology, focusing on broad-band communication applications. The design, characteristics, and reliability of SiGe HBTs exhibiting record f/sub T/ of 375 GHz and associated f/sub max/ of 210 GHz are presented. The impact of device optimization on noise characteristics is described for both low-frequency and broad-band noise. Circuit implementations of SiGe technologies are demonstrated with selected circuit blocks for broad-band communication systems, including a 3.9-ps emitter coupled logic ring oscillator, a 100-GHz frequency divider, 40-GHz voltage-controlled oscillator, and a 70-Gb/s 4:1 multiplexer. With no visible limitation for further enhancement of device speed at hand, the march toward terahertz band with Si-based technology will continue for the foreseeable future.     

A fully integrated 10-Gb/s tapped delay Hilbert transformer for optical single sideband

A 10-Gb/s SiGe HBT tapped delay Hilbert transformer (HT) integrated circuit (IC) is described. The four tap filter uses an integrated LC transmission line with a total delay of 180ps, and the HT has a nominal group delay of 120ps. The circuit is fabricated in a 47-GHz f/sub T/ SiGe HBT process and consumes 112mW from a -3.3-V supply. Measured s-parameters and time domain waveforms are shown to agree with theory. Measurements of a 10-Gb/s optical single sideband system indicate that 7dB of broadband sideband suppression is obtainable using the IC.     

High-bit-rate low-power decision circuit using InP-InGaAs HBT technology

We have successfully designed and fabricated a high-bit-rate low-power decision circuit using InP-InGaAs heterojunction bipolar transistors (HBTs). Its main design feature is the use of a novel master-slave D-type flip-flop (MS-DFF) as the decision circuit core to boost the operating speed. We achieved error-free operation at a data rate of up to 60 Gb/s using an undoped-emitter InP-InGaAs HBT with a cutoff frequency f/sub T/ of approximately 150 GHz and a maximum oscillation frequency f/sub max/ of approximately 200 GHz. Our decision circuit operates approximately 15% faster than one with a conventional MS-DFF core. We also achieved 90-Gb/s operation with low power consumption of 0.5 W using an InP-InGaAs DHBT exhibiting f/sub T/ and f/sub max/ of 232 and 360 GHz, respectively. These results demonstrate that InP-based HBTs and our novel MS-DFF are attractive for making ultrahigh-performance ICs for future optical communications systems operating at bit rates of 100 Gb/s or more.     

Low-power 1:16 DEMUX and one-chip CDR with 1:4 DEMUX using InP-InGaAs heterojunction bipolar transistors

Using InP-InGaAs heterojunction bipolar transistor (HBT) technology, we have successfully designed and fabricated a low-power 1:16 demultiplexer (DEMUX) integrated circuit (IC) and one-chip clock and data recovery (CDR) with a 1:4 DEMUX IC for 10-Gb/s optical communications systems. The InP-InGaAs HBTs were fabricated by a nonself-aligned process for high uniformity of device characteristics and producibility. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consist of approximately 1200 and 460 transistors, respectively. We have confirmed error-free operation at 10 Gb/s for all data outputs of both ICs. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consume only 1 W and 950 mW, respectively. These results demonstrate the feasibility of InP-InGaAs HBTs for low power high-integration optical communication ICs.     

165-GHz Transceiver in SiGe Technology

Two D-band transceivers, with and without amplifiers and static frequency divider, transmitting simultaneously in the 80-GHz and 160-GHz bands, are fabricated in SiGe HBT technology. The transceivers feature an 80-GHz quadrature Colpitts oscillator with differential outputs at 160 GHz, a double-balanced Gilbert-cell mixer, 170-GHz amplifiers and broadband 70-GHz to 180-GHz vertically stacked transformers for single-ended to differential conversion. For the transceiver with amplifiers and static frequency divider, which marks the highest level of integration above 100 GHz in silicon, the peak differential down-conversion gain is -3 dB for RF inputs at 165 GHz. The single-ended, 165-GHz transmitter output generates -3.5 dBm, while the 82.5-GHz differential output power is +2.5 dBm. This transceiver occupies 840 mum times 1365 mum, is biased from 3.3 V, and consumes 0.9 W. Two stand-alone 5-stage amplifiers, centered at 140 GHz and 170 GHz, were also fabricated showing 17 dB and 15 dB gain at 140 GHz and 170 GHz, respectively. The saturated output power of the amplifiers is +1 dBm at 130 GHz and 0 dBm at 165 GHz. All circuits were characterized over temperature up to 125degC. These results demonstrate for the first time the feasibility of SiGe BiCMOS technology for circuits in the 100-180-GHz range.     

A fully integrated 40-Gb/s clock and data recovery IC with 1:4DEMUX in SiGe technology

In this paper, a fully integrated 40-Gb/s clock and data recovery (CDR) IC with additional 1:4 demultiplexer (DEMUX) functionality is presented. The IC is implemented in a state-of-the-art production SiGe process. Its phase-locked-loop-based architecture with bang-bang-type phase detector (PD) provides maximum robustness. To the authors' best knowledge, it is the first 40-Gb/s CDR IC fabricated in a SiGe heterojunction bipolar technology (HBT). The measurement results demonstrate an input sensitivity of 42-mV single-ended data input swing at a bit-error rate (BER) of 10^-10. As demonstrated in optical transmission experiments with the IC embedded in a 40-Gb/s link, the CDR/DEMUX shows complete functionality as a single-chip-receiver IC. A BER of 10^-10 requires an optical signal-to-noise ratio of 23.3 dB     

Applications and processing of SiGe and SiGe:C for high-speed HBT devices

The continued growth of high-speed-digital data transmission and wireless communications technology has motivated increased integration levels for ICs serving these markets. Further, the increasing use of portable wireless communications tools requiring long battery lifetimes necessitates low power consumption by the semiconductor devices within these tools. The SiGe and SiGe:C materials systems provide solutions to both of these market needs in that they are fully monolithically integratible with Si BiCMOS technology. Also, the use of SiGe or SiGe:C HBTs for the high-frequency bipolar elements in the BiCMOS circuits results in greatly decreased power consumption when compared to Si BJT devices.Either a DFT (graded Ge content across the base) or a true HBT (constant Ge content across the base) bipolar transistor can be fabricated using SiGe or SiGe:C. Historically, the graded profile has been favored in the industry since the average Ge content in the pseudomorphic base is less than that of a true HBT and, therefore, the DFT is tolerant of higher thermal budget processing after deposition of the base. The inclusion of small amounts of C (e.g. <0.5%) in SiGe is effective in suppressing the diffusion of B such that very narrow extremely heavily doped base regions can be built. Thus the f_T and f_max of a SiGe:C HBT/DFT are capable of being much higher than that of a SiGe HBT/DFT.The growth of the base region can be accomplished by either nonselective mixed deposition or by selective epitaxy. The nonselective process has the advantage of reduced complexity, higher deposition rate and, therefore, higher productivity than the selective epitaxy process. The selective epi process, however, requires fewer changes to an existing fabrication sequence in order to accommodate SiGe or SiGe:C HBT/DFT devices into the BiCMOS circuit.     

Product applications and technology directions with SiGe BiCMOS

In this paper, we highlight the effectiveness and flexibility of SiGe BiCMOS as a technology platform over a wide range of performance and applications. The bandgap-engineered SiGe heterojunction bipolar transistors (HBTs) continue to be the workhorse of the technology, while the CMOS offering is fully foundry compatible for maximizing IP sharing. Process customization is done to provide high-quality passives, which greatly enables fully integrated single-chip solutions. Product examples include 40-Gb/s (OC768) components using high-speed SiGe HBTs, power amplifiers compatible for cellular applications, integrated voltage-controlled oscillators, and very high-level mixed-signal integration. It is argued that such key enablements along with the lower cost and higher yields attainable by SiGe BiCMOS technologies will provide competitive solutions for the communication marketplace.     

A Tail-Injected Divide-by-4 SiGe HBT Injection Locked Frequency Divider

This letter presents a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) divide-by-4 injection locked frequency divider (ILFD). The ILFD is based on a single-stage voltage-controlled oscillator with active-inductor, and was fabricated in the 0.35 mu m SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. Measurement results show that when the supply voltage V_DD is 3.1 V and the tuning voltage is tuned from 2.0 to 2.8 V, the divider free-running oscillation frequency is tunable from 2.12 to 2.76 GHz, and at the incident power of 0 dBm the operation range is about 1.15 GHz, from the incident frequency 8.55 to 9.7 GHz. The die area is 0.65 times 0.435 mm².     

New collector undercut technique using a SiN sidewall for low basecontact resistance in InP/InGaAs SHBTs

A new collector undercut process using SiN protection sidewall has been developed for high speed InP/InGaAs single heterojunction bipolar transistors (HBTs). The HBTs fabricated using the technique have a larger base contact area, resulting in a smaller DC current gain and smaller base contact resistance than HBTs fabricated using a conventional undercut process while maintaining low C_bc. Due to the reduced base contact resistance, the maximum oscillation frequency (f_max) has been enhanced from 162 GHz to 208 GHz. This result clearly shows the effectiveness of this technique for high-speed HBT process, especially for the HBTs with a thick collector layer, and narrow base metal width     

A 60-GHz fT super self-aligned selectively grownSiGe-base (SSSB) bipolar transistor with trench isolation fabricated onSOI substrate and its application to 20-Gb/s optical transmitterICs

A 60-GHz cutoff frequency (f_T) super self-aligned selectively grown SiGe-base (SSSB) bipolar technology is developed. It is applied to 20-Gb/s optical fiber transmitter ICs. Self-aligned bipolar transistors mutually isolated by using a BPSG-filled trench were fabricated on a bond-and-etchback silicon-on-insulator (SOI) substrate to reduce the collector-substrate capacitance C_CS. The SiGe base was prepared by selective epitaxial growth (SEG) technology. A 0.4-μm wide emitter was used to reduce the junction capacitances. The maximum cutoff frequency f_T and the maximum frequency of oscillation f_max were 60 and 51 GHz, respectively. By using this technology, Si-ICs for an optical transmitter system were made, such as a selector (a multiplexer without input and output retiming D-type flip-flops (D-F/Fs)), a multiplier, and a D-F/F. An internal high-speed clock buffer circuit achieves stable operation under a single clock input condition in the selector and the multiplier ICs. Their stable operation was confirmed up to 20 Gb/s. The selector IC for data multiplexing operates at over 30 Gb/s     

Silicon-germanium BiCMOS HBT technology for wireless power amplifier applications

This paper discusses and illustrates the key device design issues for SiGe BiCMOS HBTs suitable for wireless power amplifier (PA) applications. Experimental results addressing ruggedness, ac performance, and safe operating area for high-breakdown SiGe HBTs built in several generations of BiCMOS technology are presented. Implications of recent high-performance SiGe HBT scaling achievements for BiCMOS technologies targeting wireless PA applications are considered. Circuit results for GSM, PCS, GPRS, and EDGE front-end modules have been obtained. A one-chip solution is demonstrated, including control circuitry and switching functionality, that supports all GPRS, PCS, and EDGE modes featuring output power at 33.8 dBm and overall power added efficiency of 37% withstanding voltage standing wave ratio conditions of 15:1.