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1.
A. Kalnitsky J. P. Ellul A. R. Boothroyd R. S. Abbott 《Journal of Electronic Materials》1990,19(2):131-138
Optical absorption of Si implanted SiO2 is characterized as a function of implant dose and energy upon annealing in N2, H2 and O2 ambients. Interpretation of optical data yields information regarding the structure of defects due to excess Si. These defects
are responsible for the memory effect and enhanced conductivity previously reported for Si implanted SiO2. A correlation between E-band absorption (Si-Si ‘wrong’ bond defect) intensity and the amount of excess Si was established.
Annealing of this band in O2 is diffusion-limited with a reaction cross-section of 5.10−15 cm2. Compressive strain-induced, oxygen diffusivity-retardation was observed. The C-band absorption (relaxed oxygen vacancy defect)
observed in this study is unique in its response to heat treatment in N2 and H2 since it does not anneal in these ambients. C-band annealing kinetics in O2 closely parallel those of E-band. B2-band absorption (unrelaxed oxygen vacancy defect) produced by Si implantation is very similar in its annealing properties
to the published data. 相似文献
2.
Carey A. Pico Michael A. Lieberman Nathan W. Cheung 《Journal of Electronic Materials》1992,21(1):75-79
The feasibility of plasma immersion ion implantation (PHI) for multi-implant integrated circuit fabrication is demonstrated.
Patterned Si wafers were immersed in a BF3 plasma forp-type doping steps. Boron implants of up to 3 × 1015 atoms/cm2 were achieved by applying microsecond negative voltage (-2 to -30 kV) pulses to the wafers at a frequency of 100 Hz to 1
kHz. After implantation the wafers were annealed using rapid thermal annealing (RTA) at 1060° C for 20 sec to activate the
dopants and to recrystallize the implant damaged Si. For the PMOS process sequence both the Si source-drain and polycrystalline
Si (poly-Si) gate doping steps were performed using PIII. The functionality of several types of devices, including diodes,
capacitors, and transistors, were electrically measured to evaluate the compatibility of PIII with MOS process integration. 相似文献
3.
J. C. Mikkelsen 《Journal of Electronic Materials》1982,11(3):541-558
Silicon wafers were steam oxidized at temperatures of 550–1000°C and pressures of 0.05–8 atm with H2
16O, H2
18O, and D2
16O. Deuterium (D) and18O profiles in 100–200 nm thick oxide films were measured with Cs+ beam secondary ion mass spectroscopy (SIMS). The use of D and18O isotopes enabled analysis of these elements without interference from the sputtering ambient. Peaks in the D profiles near
the interface are due predominantly to abrupt changes in the ion yield and charging conditions as the interface is approached.
Although the D concentration is nearly constant at ∼ 1 × 1020 cm−3 for 700–1000°C oxidations, it rises to a non-equilibrium value of 6 × 1020 cm−3 at 600°C. Analysis of steam indiffusions below 800°C indicates that the OD concentration is proportional to the (steam pressure)1/2, in agreement with earlier results on as-oxidized wet thermal oxides. The results of sequential isotope oxidations indicate
that there is rapid exchange ofboth the hydrogen and oxygen species during transport of “water” to the SiO2. Si interface. We examine these results in terms of the concentrations of the interacting species in the oxide films, and
our results are compared to similar reported studies. 相似文献
4.
The use of disilane (Si2H6) as a silicon source for epitaxial deposition was investigated for both very low pressure chemical vapor deposition (thermal
CVD) and plasma enhanced chemical vapor deposition (PECVD) from 600 to 800° C. The growth rates observed for temperatures
at or below 750° C were at least an order of magnitude higher than those observed for silane (SiH4) using similar deposition conditions. An argon plasma was used to sputter clean the silicon surface, in-situ, immediately
before the deposition. It was found that a low dc bias on the substrate during the argon sputter cleaning process helped remove
carbon and oxide from the surface of the silicon substrate. A 16 min Ar sputter clean at 650° C, 2.5 W rf power, and •50 V
dc bias resulted in a carbon and oxygen concentration at the epilayer-substrate of less than 4 × 1018/cm3 and 2 × 1018/cm3, respectively. In situ arsenic doping during disilane epitaxial growth was carried out by thermal CVD and PECVD using arsine
(AsH3) diluted in silane (SiH4) at 800° C. The results were compared to similar experiments using only SiH4 as the silicon source. Up to 500 ppm of arsine was diluted in the reactant gas and it was found that the Si2H6 growth rates were insensitive to the arsine concentraton in the gas phase. 相似文献
5.
A method using a H2/AsH3 plasma to clean the Si surface before GaAs heteroepitaxy was investigated and the dependence of the effectiveness of this
treatment on arsine partial pressure was studied. Thin GaAs-on-Si films deposited on the plasma-cleaned Si were analyzed using
plan-view TEM, HRXTEM and SIMS. Although not optimized, this method of Si cleaning makes heteroepitaxial deposition of GaAs
possible. Some roughening of the Si surface was observed and a possible explanation is offered. Using the results of this
study, thick (2.5–3.0μm) epitaxial GaAs films were then deposited and their quality was evaluated using RBS, XTEM and optical Nomarski observation.
All Si surface cleaning and GaAs deposition were carried out at temperatures at or below 650°. 相似文献
6.
The electron trapping behavior of SiO2 films implanted with Al has been studied by Johnson, Johnson, and Lampert1 and they conclude that the trapping is occuring in damage sites resulting from the implantation. They used annealing temperatures
up to 600C. We find that the trapping is reduced further as we increase the annealing temperature up to 1050C. We have characterized
the traps and find that the predominate traps have cross sections of 1.26 × 10−16 and 1.4 × 10−17cm2. The trapping is proportional to the fluence and is not a strong function of the measuring temperature. The centroid of the
trapped charge is close to the centroid of the implanted Al as predicted by the LSS theory6. 相似文献
7.
The electrical degradation of dry thermal SiO2 upon exposure to selective silicon epitaxy using dichlorosilane has been investigated. Capacitors were fabricated with thermal gate oxides (120 to 440A thick) grown on p-type silicon (100) substrates. Prior to the gate electrode formation, the oxides were exposed to hydrogen and dichlorosilane + hydrogen anneals. Leakage current and electric field breakdowns were measured to evaluate the effects of these anneals on the SiO2 degradation. The SiO2 degradation occurring because of dichlorosilane exposure was studied as a function of the temperature and time. While dichlorosilane exposure at temperatures above 850°C was found to cause high leakage current and breakdowns at low electric fields for silicon dioxide films thinner than 440Å, little effect was observed as a result of hydrogen and chlorine exposures. The degradation mechanism was attributed to pinhole etching via volatile SiO formation along defects present in the as-grown SiO2. 相似文献
8.
Akif Sultan Melvyn Lobo Surya Bhattacharya Sanjay Banerjee Shubneesh batra M. Manning C. Dennison 《Journal of Electronic Materials》1993,22(8):1129-1135
The diffusion of boron in single crystal Si from a BF2-implanted polycrystalline Si film deposited on single crystal Si has been accurately modeled. The effective diffusivities
of boron in the single crystal Si substrate have been extracted using Boltzmann-Matano analysis and the new phenomenological
model for B diffusivity has been implemented in the PEPPER simulation program. The model has been implemented for a range
of furnace anneal conditions (800 to 950°C, from 30 min to 6h) and implant conditions (BF2 doses varied from 5×1015 to 2×1016 cm−2 at 70 keV). 相似文献
9.
S. W. Park Y. K. Baek J. Y. Lee C. O. Park H. B. Im 《Journal of Electronic Materials》1992,21(6):635-639
The formation of a SiO2 layer at the Ta2O5/Si interface is observed by annealing in dry O2 or N2 and the thickness of this layer increases with an increase in annealing temperature. Leakage current of thin (less than 40
nm thick) Ta2O5 films decreases as the annealing temperature increases when annealed in dry O2 or N2. The dielectric constant vs annealing temperature curve shows a maximum peak at 750 or 800° C resulting from the crystallization
of Ta2O5. The effect is larger in thicker Ta2O5 films. But the dielectric constant decreases when annealed at higher temperature due to the formation and growth of a SiO2 layer at the interface. The flat band voltage and gate voltage instability as a function of annealing temperature can be
explained in terms of the growth of interfacial SiO2. The electrical properties of Ta2O5 as a function of annealing conditions do not depend on the fabrication method of Ta2O5 but strongly depend on the thickness of Ta2O5 layer. 相似文献
10.
P. Tiwari Mary Longo G. Matera S. Sharan P. L. Smith J. Narayan 《Journal of Electronic Materials》1991,20(7):775-778
We have investigated the formation of TiSi2 and CoSi2 thin films on Si(100) substrates using laser (wave length 248 nm, pulse duration 40 ns and repetition rate 5 Hz) physical
vapor deposition (LPVD). The films were deposited from solid targets of TiSi2 and CoSi2 in vacuum with the substrate temperature optimized at 600° C. The films were characterized using x-ray diffraction, scanning
electron microscopy (SEM), transmission electron microscopy (TEM) and four point probe ac resistivity. The films were found
to be polycrystalline with a texture. The room temperature resistivity was found to be 16 μΩ-@#@ cm and 23 μΩ-cm for TiSi2 and CoSi2 films, respectively. We optimized the processing parameters so as to get particulate free surface. TEM results show that
the silicide/silicon interface is quite smooth and there is no perceptible interdiffusion across the interface. 相似文献
11.
B. J. Mrstik 《Journal of Electronic Materials》1991,20(10):627-633
Si MOSFETs were irradiated with x-rays and then exposed to various partial pressures of H2 at either room temperature or 125 °C. The number of interface traps and the net positive oxide trapped charged were measured
during the hydrogen exposure using spectroscopic charge pumping techniques. During the hydrogen exposure the gate electrode
was held at a positive bias to maintain a field of 0.65 MV/cm across the gate oxide. It was found that during the room temperature
hydrogen exposure the number of interface traps increased by a factor of about two. The change in the oxide trapped charge
during hydrogen exposure indicated that the decrease in the number of positively charged oxide traps was approximately the
same as the increase in the number of interface traps. The time evolution and bias dependence of these changes are explained
by a model that we previously proposed. In this model positively charged radiation induced defects in the oxide crack the
H2 to form H+. Under positive gate bias the H+ then drifts to the Si-SiO2 interface where it forms an interface state, while at the same time removing positive charge from the oxide. 相似文献
12.
Plasma-deposited silicon nitride films were produced from SiH4-N2 gas mixture. Their composition, chemical bonds, and electrical properties were investigated by varying the deposition conditions.
The silicon nitride films from SiH4-N2 gas mixture exhibit (i) less hydrogen, (ii) higher thermal endurance, (iii) higher density, and (iv) smaller etching rate
than those of the films deposited from SiH4, and NH3 gas mixture. These results can be partly attributed to lower hydrogen concentration. As the Si/N ratio approaches the stoichiometric
value, 0.75, the resistivity and the breakdown strength are increased. They are 1015Ωcm and 9MV/cm, respectively, at Si/N≃0.85. Interface state density between silicon and silicon nitride layers is as low as
1& #x223C; 5xl011cm−2 eV−1.
On leave from The Northwest Telecommunication Engineering Institute, Xi’an, The People’s Republic of China. 相似文献
13.
14.
Y. Xin B. R. Xu W. S. He G. F. Sun R. Farr D. F. Lu K. W. Wong D. Knapp 《Journal of Electronic Materials》1995,24(12):1821-1824
We have developed a technique to produce high quality Tl2Ba2Ca2Cu3O10 powders used for making superconducting wire, tape, lead, shield, and other large scale bulk applications. Starting with
T12O3, BaO2, CaO, and CuO, we mix and grind these chemicals with a machine ball mill and then press the ground mixture into pellets.
The pellets are sintered at about 895‡C for at least 30 h in an oxygen atmosphere. The sintered material is mainly the Tl2Ba2Ca2Cu3O10 compound. To get more homogeneous superconductor powders, we pulverize the sintered material and use a magnetic superconducting
material selector to separate and grade the material. Finally, the top grade material has a phase purity of <98% and a Tc(r < 0) of 123–126K. 相似文献
15.
Myongil Kong Shenglin Jiang Tiantian Xie Haibo Zhang 《Microelectronic Engineering》2009,86(11):2320-2323
The sintering process of semiconducting Y-doped BaTiO3 ceramics added with BaB2O4 as low temperature sintering aid were investigated. When the low temperature sintering aid BaB2O4 added Y-doped BaTiO3 ceramics prepared by Sol-Gel method, the sintering temperature of BaTiO3-based ceramics would be greatly decreased, and also widen sintering range. Y-doped BaTiO3 ceramics with BaB2O4 addition can be obtained at 1050 °C. Ceramics samples with room temperature resistivity 60-80 Ω cm, ratio of the maximum resistivity to minimum resistance (Rmax/Rmin) 104 and temperature coefficient of resistivity (α) 10%/°C were obtained. 相似文献
16.
Boron implanted into n-type Si at 1015 cm−2 dose and energies from 500 eV to 1 keV was activated by annealing in nominally pure N2 and in N2 with small admixtures of O2. Effective process times and temperatures were derived by thermal activation analysis of various heating cycles. The lowest
thermal budgets used “spike anneals” with heating rates up to 150°C/sec, cooling rates up to 80°C/sec, and minimal dwell time
at the maximum temperature. Dopant activation was determined by sheet electrical transport measurements. Surface oxidation
was characterized by film thickness ellipsometry. P-n junction depths were inferred from analysis of sheet electrical transport
measurements and secondary ion mass spectroscopy profiles. Boron activation increases with boron diffusion from the implanted
region. Electrical activation has a thermal activation energy near 5 eV, while boron diffusion has an activation energy near
4 eV. Surface oxide can retard boron diffusion into the ambient for high-temperature anneals. 相似文献
17.
The diffusivity of boron in silicon dioxide may be increased by the introduction of hydrogen into the annealing atmosphere.
In this paper we report on the diffusion characteristics of boron ion-implanted into thermally grown SiO2. A sensitive technique was used in which the boron atoms redistributed into the substrate are characterized by electrical
methods. The diffusivity of boron in thermal SiO2 was measured over the temperature range of 950-1150°C with hydrogen partial pressure from 0 to 0.2 atm. It was found that
the diffusion coefficient of boron in oxide at 1150° C increases as the square root of the hydrogen partial pressure. At fixed
pressure the temperature dependence of the diffusion coefficient obeys a single-activation-energy exponential rule. At 0.1
atm partial pressure of H2 the activation energy is 3.0 eV and the preexponential factor is 6 x 105 [cm2/sec.]. 相似文献
18.
Ajay K. Srivastava Ashutosh Bhardwaj Kirti Ranjan Namrata Sudeep Chatterji R. K. Shivpuri 《Materials Science in Semiconductor Processing》2003,6(5-6):555-559
The influence of crystal damage on the electrical properties and the doping profile of the implanted p+–n junction has been studied at different annealing temperatures using process simulator TMA-SUPREM4. This was done by carrying out two different implantations; one with implantation dose of 1015 BF2+ ions/cm2 at an energy of 80 keV and other with 1015 B+ ions/cm2 at 17.93 keV. Substrate orientation 1 1 1 of phosphorus-doped n-type Si wafers of resistivity 4 kΩ cm and tilt 7° was used, and isochronally annealing was performed in N2 ambient for 180 min in temperature range between 400°C and 1350°C. The diode properties were analysed in terms of junction depth, sheet resistance. It has been found that for low thermal budget annealing, boron diffusion depth is insensitive to the variation in annealing temperature for BF2+-implanted devices, whereas, boron diffusion depth increases continuously for B+-implanted devices. In BF2+-implanted devices, fluorine diffusion improves the breakdown voltage of the silicon microstrip detector for annealing temperature upto 900°C.For high thermal budget annealing, it has been shown that the electrical characteristics of BF2+-implanted devices is similar to that obtained in B+-implanted devices. 相似文献
19.
Yosi Shacham-Diamond William G. Oldham Reza Kazerounian 《Journal of Electronic Materials》1988,17(6):519-525
The diffusivity of ion-implanted As in SiO2 is investigated as a function of the implanted dose, oxide type and ambient in the 1000–1200° C temperature range. The As
diffusivity in oxide is extracted, using electrical methods, from the profiles of As diffused into the substrate. Secondary-ion-mass-spectroscopy
depth profiles of some of the samples are in agreement with the results of the electrical methods. Two types of oxide are
investigated: Dry oxide grown in O2 and wet oxide grown in steam. The diffusivity is characterized as a function of the temperature for dry oxide annealed in
N2, and for wet oxide annealed both in N2 and in N2/H2 (10%). The measured As diffusivity vs temperature is fitted to a single activation energy exponential model. For the wet-grown
oxide, the extracted activation energy for the N2/H2 (10%) annealed sample is 4.4 ± 0.5 eV and for the N2 annealed oxide it is found to be 5.5 ± 0.5 eV. For oxide grown in dry oxygen the As diffusivity is characterized also as
a function of the implant dose. It is found to be independent of the implanted dose, for ion energy of 40 keV and dose in
the 1012–1015 cm-2 range, and its activation energy equals 4.7 ± 0.5 eV. The extracted parameters were installed in the SUPREM-III process simulation
program and correctly predict ion-implanted As diffusion behavior in SiO2. 相似文献
20.
G. S. Tompa Y. B. Li D. Agassi S. I. Kim S. K. Hong 《Journal of Electronic Materials》1996,25(6):925-929
The formation of Mg2Si(100), ao= 6.39Å, on Si(100) substrates has been investigated. Mg was first evaporated onto Si(100) surfaces and Mg2Si (100) films were formed in a subsequent annealing process. The Mg2Si layers were characterized by x-ray diffraction and transmission electron microscopy analysis. Optical and scanning electron
microscopy analysis show the surface morphology to be smooth. The films are stable under thermal cycling and exhibit low resistivity.
Epitaxial films of Mg2Si on Si(100) could be an ideal substrate for mercury cadmium telluride and antimonide based III-V semiconductor for mid-infrared
devices because of its close lattice matching (the lattice misfit factor is less than 1.5%). 相似文献