AlGaInP/GaInP多量子阱的拉曼光谱

利用LP-MOCVD生长了不同周期的AlGaInP／GaInPMQW样品，并测量了它们的拉曼光谱。由于样品包括了掺杂的电流扩展层和欧姆接触层以及上、下限制层，拉曼光谱中观察到了与掺杂有关的耦合电子(空穴)气-纵光学声子模。根据喇曼光谱的选择定则，结合光致发光谱，发现AIP-LO／TO的相对强度比可以评定晶体AlGaInP MQW的生长质量。     

GaInP/AlGaInP脊形波导激光器器件结构的优化研究

通过优化脊形波导的结构参数可以降低脊形波导激光器的阈值电流,提出了实现亚微米脊宽,从而降低阈值电流的方法。针对脊形波导制作过程中蚀刻深度不易控制的问题,对GaInP/AlGaInP材料中加入蚀刻阻挡层进行了研究。     

脊形波导激光器中GaInP／AlGaInP选择蚀刻性的研究

本文制作了670nmGaInP/AlGaInP应变层量子阱脊形波导激光器,为了进一步优化工艺,在普通的单量子阱材料横向结构中嵌入30－50nm的GaIlP蚀刻阻挡层,用此种材料加工而成的控长1200μm,宽64μm的氧化条激光器的阈值电流密度为340A／cm^2,采用配比为1．0：2．5的HCl:H2O深液对GaInP/AlGaIn进行湿蚀刻研究,得到了较好的选择恂刻性结果。     

GaInP/GaAs/Ge叠层太阳电池的研制及其温度依赖性分析

利用MOCVD方法制备了GaInP/GaAs/Ge叠层太阳电池。测试了I-V特性,并测试分析了该电池性能在30℃至170℃温度范围内的变化情况。测试结果表明,随着温度的升高,短路电流密度略微增大,温度系数为9.8 (μA/cm2)/℃;开路电压以系数-5.6mV/℃急剧下降;填充因子也随之下降（-0.00063 /℃）;电池的转换效率随温度升高线性减小,温度从30℃升高至 130℃时,效率从28%下降至22.1%。最后,本文对该叠层电池随着温度变化的特性给予了详细的理论分析。     

Thermal analysis of high power LED package with heat pipe heat sink

The goal of this study is to improve the thermal characteristics of high power LED (light-emitting diode) package using a flat heat pipe (FHP). The heat-release characteristics of high power LED package are analyzed and a novel flat heat pipe (FHP) cooling device for high power LED is developed. The thermal capabilities, including startup performance, temperature uniformity and thermal resistance of high power LED package with flat heat pipe heat sink have been investigated experimentally. The obtained results indicate that the junction temperature of LED is about 52 °C for the input power of 3 W, and correspondingly the total thermal resistance of LED system is 8.8 K/W. The impact of the different filling rates and inclination angles of the heat pipe to the heat transfer performance of the heat pipe should be evaluated before such a structure of heat pipe cooling system is used to cool high power LED system.     

Thermal analysis of oxide-confined VCSEL arrays

A thermo-electric 3-D analysis of 980 nm vertical cavity surface emitting laser (VCSEL) arrays based on the finite element method (FEM) is presented in this paper. High performance VCSEL array structures with square mesas are modeled by applying a steady-state 3-D heat dissipation model. Several oxide aperture diameters (D_a), substrate thicknesses, current densities, array sizes, heat flux, and temperature profiles are considered. The analysis shows that the maximum internal temperature of a VCSEL array ranges from 306.5 K for a 20 μm D_a, 100 μm substrate thickness, 666 A/cm² current density, and a 1×1 array size to 412 K for a 5 μm D_a, 300 μm substrate thickness, 1200 A/cm² current density, and a 4×4 array size.     

具有不同chip波形的DS/SS系统抗单频干扰的精确性能分析

用领域分析的方法，分析了具有不同chip波形的DS／SS系统单频干扰时的误码性能，讨论了chip波形对系统抗单频干扰能力的影响，将Torrieri的改进高斯近似方法推广应用到一般的chip波形。     

Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling

State-of-the-art devices in the consumer electronics market are relying more and more on Multi-Processor Systems-On-Chip (MPSoCs) as an efficient solution to meet their multiple design constrains, such as low cost, low power consumption, high performance and short time-to-market. In fact, as technology scales down, logic density and power density increase, generating hot spots that seriously affect the MPSoC performance and can physically damage the final system behavior. Moreover, forthcoming three-dimensional (3D) MPSoCs can achieve higher system integration density, but the aforementioned thermal problems are seriously aggravated. Thus, new thermal exploration tools are needed to study the temperature variation effects inside 3D MPSoCs. In this paper, we present a novel approach for fast transient thermal modeling and analysis of 3D MPSoCs with active (liquid) cooling solutions, while capturing the hardware-software interaction. In order to preserve both accuracy and speed, we propose a close-loop framework that combines the use of Field Programmable Gate Arrays (FPGAs) to emulate the hardware components of 2D/3D MPSoC platforms with a highly optimized thermal simulator, which uses an RC-based linear thermal model to analyze the liquid flow. The proposed framework offers speed-ups of more than three orders of magnitude when compared to cycle-accurate 3D MPSoC thermal simulators. Thus, this approach enables MPSoC designers to validate different hardware- and software-based 3D thermal management policies in real-time, and while running real-life applications, including liquid cooling injection control.