溶剂蒸汽辅助制备超薄PVP栅介质膜及性能研究

使用溶剂蒸汽辅助制备超薄PVP栅介质膜,得到了低漏电流密度(E=1 MV/cm时,为1.12×10-9A/cm2;E=2 MV/cm时,为5.42×10-9A/cm2)、膜厚为10 nm的超薄PVP栅介质膜,其单位面积栅电容达到了566 nF/cm2。此外,AFM测试表明溶剂蒸汽辅助退火使薄膜表面粗糙度由0.36 nm降到了0.21 nm,空间电荷限制电流法(SCLC)的分析结果表明薄膜体内陷阱密度减少了26%。     

以Ni-Al为底电极的P(VDF-TrFE)铁电电容器的结构与性能

应用磁控溅射法制备Ni-Al和Pt薄膜,溶胶-凝胶法制备P(VDF-TrFE)铁电共聚物薄膜,在SiO2/Si(001)衬底上首次构架了Pt/P(VDF-TrFE)/Ni-Al异质结电容器。X射线衍射(XRD)结果表明:Ni-Al薄膜为非晶结构,P(VDF-TrFE)薄膜具有较好的结晶质量。研究发现,在20 Hz测试频率下,Pt/P(VDF-TrFE)/Ni-Al电容器具有饱和的电滞回线,在90 V驱动电压下,剩余极化强度与矫顽场分别为7.6μC/cm2和45.7 V。在外加电压为40 V时,薄膜的漏电流密度约为5.37×10-6 A/cm2。漏电机制研究表明,Pt/P(VDF-TrFE)/Ni-Al电容器满足欧姆导电机制。铁电电容器经过109极化反转后没有发现明显的疲劳现象。     

SiO2/聚酰亚胺/SiO2复合薄膜绝缘性能及基于聚酰亚胺复合薄膜的后栅型场致发射性能的研究

使用射频磁控溅射和化学溶液法制备了SiO2/聚酰亚胺(PI)/SiO2绝缘膜。分别使用X射线衍射、扫描电镜对薄膜结构和薄膜表面形貌进行了表征;利用超高阻微电流测试仪测试了SiO2/PI/SiO2复合绝缘膜漏电流和电压击穿特性;采用SiO2/PI/SiO2作为绝缘膜,制作了后栅型场致发射器件,使用场发射测试系统测试了器件的开启电压、发射电流以及发光亮度。结果表明:SiO2/PI/SiO2复合绝缘膜具有高的击穿电压和低的漏电流密度,后栅器件中栅极对阴极表面的电场强度调控作用明显,阳极电压为750V时,栅极开启电压为91 V,阳极电流可达384μA,栅极漏电流仅为59μA,器件最高亮度可达600 cd/m2。     

PMMA分子量对其电学特性的影响

通过分析以PMMA[poly(methyl methacrylate)]为绝缘膜的MIS结构的电学特性,研究了分子量对PMMA薄膜电学特性的影响。PMMA薄膜通过旋涂溶于氯仿的20mg/ml PMMA溶液制成。PMMA薄膜厚度为220nm,临界电场超过1.8MV/cm。测量结果表明:(1)996K分子量PMMA薄膜的单位面积漏电流最小,仅有6.0×10-9/cm2。350K分子量的漏电流较大,为8.5×10-9/cm2;(2)高电场下决定漏电流与场强关系的物理机制是肖特基发射,通过线性拟合计算出银电极与PMMA之间的势垒高度约为0.5eV;(3)分子量大的PMMA陷阱密度小。996K分子的最小,为4.7×1010/cm2。     

五氧化二钽薄膜的Ⅰ-Ⅴ特性

采用直流脉冲反应磁控溅射方法制备了高介电常数五氧化二钽(Ta2O5)薄膜.利用Ta/Ta2O5/Ta的MIM电容结构分析了Ta2O5的电学性能,研究了上电极面积对Ⅰ-Ⅴ特性的影响、Ⅰ-Ⅴ曲线的对称性和零点偏移以及薄膜缺陷和基底粗糙度对MIM电学性能的影响.结果表明,随着上电极面积增大,电容的漏电流密度增大,击穿场强减小.氧化钽薄膜中缺陷的存在和粗糙度增大容易引起漏电流增大,击穿强度降低.当上电极直径为1 mm时,MIM电容的性能最佳:击穿强度为2.22MV/cm,漏电流密度低于1×10-8A/cm2.     

气相沉积聚合法制备聚酰亚胺绝缘薄膜及其性能研究

以联苯四酸二酐和4,4’-二氨基二苯醚为单体原料使用气相沉积聚合(VDP)法制备了聚酰亚胺(PI)绝缘膜,分析不同热亚胺化处理温度对PI薄膜绝缘性能的影响。分别使用红外光谱、俄歇能谱、扫描电镜、原子力显微镜对薄膜成分以及薄膜表面形貌进行了表征;利用超高阻微电流测试仪测试了PI复合绝缘膜漏电流和电压击穿特性。结果表明:热亚胺化300℃/1 h真空(1.0×10-2Pa)处理后的PI绝缘膜内部结构致密,当场强为8.0MV/cm时漏电流密仅为8.2×10-5A/cm2;薄膜击穿场强达到8.42MV/cm,表明PI薄膜具有良好的电学性能以及热稳定性。     

聚偏氟乙烯共聚物薄膜铁电性能和电容特性研究

制备了以聚苯乙烯磺酸(PSSH)为上下界面层的聚(偏氟乙烯)(PVDF)二元共聚物聚(偏氟乙烯-三氟乙烯)[P(VDF-TrFE)]及聚(偏氟乙烯-氯氟乙烯)[P(VDF-CTFE)]的三明治结构电容器,研究了P(VDF-TrFE)和P(VDF-CTFE)2两种共聚物薄膜的铁电性能和电容特性。结果表明,厚度为60nm的Ti/PSSH/P(VDF-TrFE)/PSSH/Ti超薄薄膜表现出优异的铁电性能;而厚度为100nm的Ti/PSSH/P(VDF-CTFE)/PSSH/Ti薄膜表现出较好的电容特性,存储能量密度高达60J/cm3。研究结果为其在电子器件上的应用提供理论指导。     

脉冲激光沉积制备的HfO2薄膜的结构与电学性能

采用脉冲激光沉积（PLD）方法在Si（100）基底上制备了有效氧化层厚度为8．6nm，介电常数为29．3的HfO2薄膜．借助C射线衍射（XRD）、原子力显微镜（AFM）、高分辨透射电镜（HRTEM）分析了样品的微观结构，对电容的C-V与I-V电学特性进行了测试。实验结果表明，该方法制得的HfO2薄膜表面光滑，N2500℃下退火30mm后样品表面粗糙度由0．203nm变为0．498nm，薄膜由非晶转变为简单正交结构，界面层得到有效控制，该栅介质电容具有良好的C-V特性，较低的漏电流密度（4．3×10^-7A/cm^2，@-1V），是SiO2栅介质的理想替代物．     

五氧化二钽薄膜的I—V特性

采用直流脉冲反应磁控溅射方法制备了高介电常数五氧化二钽(Ta_2O_5)薄膜。利用Ta/Ta_2O_5/Ta的MIM电容结构分析了Ta_2O_5的电学性能,研究了上电极面积对I-V特性的影响、I-V曲线的对称性和零点偏移以及薄膜缺陷和基底粗糙度对MIM电学性能的影响。结果表明,随着上电极面积增大,电容的漏电流密度增大,击穿场强减小。氧化钽薄膜中缺陷的存在和粗糙度增大容易引起漏电流增大,击穿强度降低。当上电极直径为1mm时,MIM电容的性能最佳:击穿强度为2.22MV/cm,漏电流密度低于1×10~(-8)A/cm~2。     

DMCPS电子回旋共振等离子体沉积的SiCOH低介电常数薄膜结构及物性研究

本文采用电子回旋共振(ECR)等离子体技术和十甲基环五硅氧烷(DMCPS)源开展了SiCOH薄膜的研究工作,获得了介电常数为2.88的SiCOH低介电常数薄膜.薄膜经400℃热处理后,膜厚减小,最大相对变化率小于15%,呈现较好的热稳定性.薄膜在1MV/cm场强下的漏电流为8.9×10-6A/cm2,且场强达到2.5 MV/cm时,未发生击穿现象,具有较优越的绝缘性能.因此,采用ECR-CVD技术和DMCPS源可以制备热稳定性优良的、绝缘性能优越的低介电常数SiCOH薄膜.     

Electrical characteristics of ZrN metallised metal-oxide-semiconductor and metal-insulator-metal devices

The electrical properties of DC reactive sputtered zirconium-nitride metallized metal-oxide-semiconductor (MOS) and metal-insulator-metal (MIM) devices on TiO₂/p-Si and TiO₂/ZrN films were studied using capacitance-voltage (C-V) and current-voltage (I-V) measurements at room temperature. Capacitances of the ZrN/TiO₂/p-Si MOS device were measured in accumulation mode and inversion mode, from which flat band capacitance was found to be 2.86pF, which corresponds to flat band voltage of −1.7 V. Fixed oxide charged density and interface state density was found to be 1.63× 10¹⁰ cm⁻² and 6.3× 10¹¹ cm⁻² eV⁻¹. I-V characteristics revealed that the leakage current density was of 0.5 mA/cm² in accumulation mode and 2 mA/cm² in inversion mode at a field of 0.12 MV/cm, respectively. Dielectric breakdown of ZrN/TiO₂/p-Si device was found to be 0.12 MV/cm in accumulation mode. Based on the C-V and I-V characteristics, the ZrN/TiO₂/ZrN structure showed no variation in the capacitance value as the bias voltage was changed.     

Characterization of poly(vinylidene fluoride-trifluoroethylene) 50/50 copolymer films as a gate dielectric

Thin films of poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) 50/50 copolymer were prepared by spin coating on p-Si substrate. Thermal behavior of the film was observed by measuring the film thickness with ellipsometry as a function of the temperature and abrupt volume expansion was observed at 130–150 °C. Capacitance-voltage (C-V) and current-voltage (I-V) behavior of the aluminum/P(VDF-TrFE)/p-Si MIS (metal-insulator-semiconductor) structures were studied and dielectric constant of the P(VDF-TrFE) film was measured to be about 15.3 at optimum condition. No hysteresis was observed in the C-V curve for films as deposited and annealed (70–200 °C). Films annealed at temperatures higher than the volume expansion temperature showed substantial surface roughness due to the crystallization. Flat band voltage (V_FB) of the MIS structure with as deposited films was about −0.3 V and increased up to −2.0 V with annealing. This suggested that positive charges were generated in the film. Electronic properties of the annealed P(VDF-TrFE) film at above melting temperature were degraded substantially with larger shift in flat band voltage, low dielectric constant and low breakdown voltage. Organic thin film transistor with pentacene active layer and P(VDF-TrFE) as a gate dielectric layer showed a mobility of 0.31 cm²/V·s and threshold voltage of −0.45 V.     

Freestanding ultrananocrystalline diamond films with homojunction insulating layer on conducting layer and their high electron field emission properties

Freestanding ultrananocrystalline diamond (UNCD) films with homojunction insulating layer in situ grown on a conducting layer showed superior electron field emission (EFE) properties. The insulating layer of the films contains large dendrite type grains (400-600 nm in size), whereas the conducting layer contains nanosize equi-axed grains (5-20 nm in size) separated by grain boundaries of about 0.5-1 nm in width. The conducting layer possesses n-type (or semimetallic) conductivity of about 5.6 × 10(-3) (Ω cm)(-1), with sheet carrier concentration of about 1.4 × 10(12) cm(-2), which is ascribed to in situ doping of Li-species from LiNbO(3) substrates during growth of the films. The conducting layer intimately contacts the bottom electrodes (Cu-foil) by without forming the Schottky barrier, form homojunction with the insulating layer that facilitates injection of electrons into conduction band of diamond, and readily field emitted at low applied field. The EFE of freestanding UNCD films could be turned on at a low field of E(0) = 10.0 V/μm, attaining EFE current density of 0.2 mA/cm(2) at an applied field of 18.0 V/μm, which is superior to the EFE properties of UNCD films grown on Si substrates with the same chemical vapor deposition (CVD) process. Such an observation reveals the importance in the formation of homojunction on enhancing the EFE properties of materials. The large grain granular structure of the freestanding UNCD films is more robust against harsh environment and shows high potential toward diamond based electronic applications.     

Low operating voltage single ZnO nanowire field-effect transistors enabled by self-assembled organic gate nanodielectrics

The development of nanowire transistors enabled by appropriate dielectrics is of great interest for flexible electronic and display applications. In this study, nanowire field-effect transistors (NW-FETs) composed of individual ZnO nanowires are fabricated using a self-assembled superlattice (SAS) as the gate insulator. The 15-nm SAS film used in this study consists of four interlinked layer-by-layer self-assembled organic monolayers and exhibits excellent insulating properties with a large specific capacitance, 180 nF/cm2, and a low leakage current density, 1 x 10(-8) A/cm2. SAS-based ZnO NW-FETs display excellent drain current saturation at Vds = 0.5 V, a threshold voltage (Vth) of -0.4 V, a channel mobility of approximately 196 cm2/V s, an on-off current ratio of approximately 10(4), and a subthreshold slope of 400 mV/dec. For comparison, ZnO NW-FETs are also fabricated using 70-nm SiO2 as the gate insulator. Implementation of the SAS gate dielectric reduces the NW-FET operating voltage dramatically with more than 1 order of magnitude enhancement of the on-current. These results strongly indicate that SAS-based ZnO NW-FETs are promising candidates for future flexible display and logic technologies.     

Thickness and erbium doping effects on the electrical properties of lead zirconate titanate thin films

Thin films of erbium doped lead zirconate titanate (PZT) of different thickness were deposited by sol–gel technique on Pt/TiO₂/SiO₂/Si substrates. Capacitance–voltage measurements show that the dielectric constant continuously increases with the thickness. This is interpreted in terms of effects due to a low permittivity interfacial layer in series with the ferroelectric bulk. The linear fit of the reciprocal of capacitance vs. thickness leads to a true dielectric constant of the ferroelectric of 774 and interfacial capacitance of 14.6 nF. The leakage current properties also depend on thickness and temperature. The calculated interfacial potential barrier height amounts to 0.81 and 0.74 eV, respectively for erbium doped and pure PZT thin films.     

Thickness-dependent leakage current of (polyvinylidene fluoride/lead titanate) pyroelectric detectors

The novel pyroelectric IR detectors have been fabricated using the Polyvinylidene Fluoride (PVDF)/Lead Titanate (PT) pyroelectric bilayer thin films, which were deposited onto Pt(111)/SiO/sub 2//Si(100) substrates by a sol-gel process. The ceramic/polymer structure was constructed of the randomly oriented polycrystalline PT film (/spl sim/1 /spl mu/m) heated at 700/spl deg/C for 1 h and the /spl beta/-phase PVDF film crystallized at 65/spl deg/C for 2 h. The effects of PVDF thin film thickness (100 /spl sim/ 580 nm) on the pyroelectric response of IR detectors were studied. The results show that the depositions of PVDF thin films onto the PT films will cause the leakage current (J) of the detectors decrease from 6.37/spl times/10/sup -7/ A/cm/sup 2/ to 3.86/spl times/10/sup -7/ A/cm/sup 2/. The specific detectivity (D*) measured at 100 Hz decreased from 2.72/spl times/10/sup 7/ cm/spl middot/Hz/sup 1/2//W for detector without PVDF to 1.71/spl times/10/sup 7/ cm/spl middot/Hz/sup 1/2//W for detector with PVDF thickness of 580 nm. By optimizing the ratio of the specific detectivity (D*) to leakage current, D*/J, the detector with PVDF thickness of 295 nm exhibits the best performance.     

在金属基片上以LNO为过渡层制备Pb(Zr0.53Ti0.47)O3薄膜的电性能

采用溶胶-凝胶法和快速热处理工艺,分别以不锈钢(SS)和镍合金(NC)为基片,成功制备了表面均匀、无裂纹的锆钛酸铅(Pb(Zn0.53Ti0.47)O3,简写为PZT)薄膜.为了缓解金属基片与PZT薄膜之间由于晶格常数和热膨胀系数不同所造成的不匹配状态,引入了镍酸镧(LaNiO3,简写为LNO)薄膜作为过渡层.XRD和SEM结果表明,经过600℃下30min的晶化,PZT薄膜已经由无定型转化为钙钛矿相.以LNO为过渡层,在NC金属基片上制备的PZT薄膜具有较高的介电常数和较低的损耗(1kHz下ε=717,tanδ=0.08),较低的漏电流(50kV/cm下J=2.6×10-7A/cm2)以及较好的铁电性能(+Pr=90μC/cm2,-Pr=14 μC/cm2,Ec=32.5kV/cm).同时,在SS基片上,通过引入LNO过渡层,制备的PZT薄膜也具有比较好的性能.     

Microwave synthesis of noncentrosymmetric BaTiO3 truncated nanocubes for charge storage applications

Truncated nanocubes of barium titanate (BT) were synthesized using a rapid, facile microwave-assisted hydrothermal route. Stoichiometric composition of pellets of nanocube BT powders was prepared by two-stage microwave process. Characterization by powder XRD, Rietveld refinement, SEM, TEM, and dielectric and polarization measurements was performed. X-ray diffraction revealed a polymorphic transformation from cubic Pm3?m to tetragonal P4mm after 15 min of microwave irradiation, arising from titanium displacement along the c-axis. Secondary electron images were examined for nanocube BT synthesis and annealed at different timings. Transmission electron microscopy showed a narrow particle size distribution with an average size of 70 ± 9 nm. The remanence and saturation polarization were 15.5 ± 1.6 and 19.3 ± 1.2 μC/cm(2), respectively. A charge storage density of 925 ± 47 nF/cm(2) was obtained; Pt/BT/Pt multilayer ceramic capacitor stack had an average leakage current density of 5.78 ± 0.46 × 10(-8) A/cm(2) at ±2 V. The significance of this study shows an inexpensive and facile processing platform for synthesis of high-k dielectric for charge storage applications.