Fabrication of NbN/AlN/NbN junctions with Al embedding circuits on Si membrane for 1.5 THz SIS mixers

A process has been developed to fabricate NbN tunnel junctions and 1.5 THz SIS mixers with Al electrodes and Al/SiO₂/Al microstrip tuning circuits on thin Si membranes patterned on silicon on insulator wafers (SIMOX). High Josephson current density (J_c up to 2×10⁴ A/cm²) NbN/AlN/NbN and NbN/MgO/NbN SIS junctions have been fabricated with a reasonably good V_m quality factor and energy gap values close to 5 meV at 4.2 K on (100) oriented 3 inches SIMOX wafers covered by a thin (∼8 nm) MgO buffer layer. The sputtering conditions critically influence the dielectric quality of both AlN and MgO tunnel barriers as well as the surface losses of NbN electrodes. 0.6-μm Si/SiO₂ membranes are obtained after processing of a whole wafer and etching the individual chips in EDP. Such a technology is applied to the development of a waveguide/membrane SIS mixer for use around 1.5 THz.     

Role of a Si0.95Ge0.05 epilayer cap on boron diffusion in silicon under inert and dry oxidizing ambient annealing

Silicon (Si) and Si with a 60 nm Si_0.95Ge_0.05 epilayer cap (Si_0.95Ge_0.05/Si) were implanted with 60 keV, 1×10¹³ cm⁻² boron (B) followed by annealing in nitrogen (N₂) or dry oxygen (O₂) in two different anneal conditions. B⁺implantation energy and dose were set such that the B peak is placed inside Si in Si_0.95Ge_0.05/Si samples and concentration independent B diffusion is achieved upon annealing. For samples annealed above 1075 °C, Ge diffusing from the Si_0.95Ge_0.05 epilayer cap in Si_0.95Ge_0.05/Si samples reached the B layer inside Si and resulted in retarded B diffusion compared to the Si samples. For annealing done at lower temperatures, diffusion of Ge from Si_0.95Ge_0.05 epilayer cap does not reach the B layer inside Si. Thus B diffusion profiles in the Si and Si_0.95Ge_0.05/Si samples appear to be similar. B diffusion in dry oxidizing ambient annealing of Si_0.95Ge_0.05/Si samples further depends on the nature of Si_0.95Ge_0.05 oxidation which is set by the duration and the thermal budget of the oxidizing anneal.     

Investigation of Si/SiGe/Si heterostructure implanted by H ion and annealed in vacuum and dry O2 ambient

The 20-nm-thick Si cap layer/74-nm-thick Si_0.72Ge_0.28 epilayer/Si heterostructures implanted by 25 keV H⁺ ion to a dose of 1×10¹⁶ cm⁻² were annealed in ultra-high vacuum ambient and dry O₂ ambient at the temperature of 800 °C for 30 min, respectively. Rutherford backscattering/ion channeling (RBS/C), Raman spectra, high-resolution X-ray diffraction (HRXRD) and atomic force microscopy (AFM) were used to characterize the structural characteristics of the Si_0.72Ge_0.28 layer. Investigations by RBS/C demonstrated that the crystal quality of the Si/Si_0.72Ge_0.28/Si heterostructure sample implanted by 25 keV H⁺ in conjunction with subsequent annealing in dry O₂ ambient is superior to that of identical sample annealing in ultra-high vacuum ambient. The less strain relaxation of SiGe layer of the Si/Si_0.72Ge_0.28/Si heterostructures implanted by H ion and annealed in dry O₂ ambient at the temperature of 800 °C for 30 min could be doublechecked by Raman spectra as well as HRXRD, which was compared with that in an identical sample annealed in ultra-high vacuum ambient for identical thermal budget. In addition, the SiGe layer of the H-implanted Si/SiGe/Si heterostructural sample annealed in dry O₂ ambient accompanied by better crystal quality and less strain relaxation made its surface morphology superior to that of the sample annealed in ultra-high vacuum ambient at the temperature of 800 °C for 30 min, which was also verified by AFM images.     

Growth and characterization of silicon oxide films formed in the presence of Si,SiC, and Si3N4

In order to comparatively study the growth and characterization of silicon oxide films on Si-based substrates, top-cut solar grade silicon (SOG-Si) containing Si₃N₄ rods and SiC lumps were used as raw materials and respectively heated at 1773 K and 1873 K under Ar gas. The samples were investigated by Focus Ion Beam/Scanning Electron Microscope (FIB/SEM) and Energy Dispersive Spectroscopy (EDS). Results indicated that silicon oxides with different morphologies successfully grew on the substrates via various mechanisms. Passive oxidation was evident in the formation of a dense SiO₂ surface layer on the base material at 1773 K, while active oxidation was evident in the formation of SiO₂ with particle, rod, and nanowire-like morphologies, which was the re-oxidation product of SiO at 1873 K under the active-to-passive transition. Si, SiC, and Si₃N₄ have the similar oxidation tendency to form silicon oxides under either passive or active regimes.     

Characterization of interfacial reaction and chemical bonding features of LaOx/HfO2 stack structure formed on thermally-grown SiO2/Si(1 0 0)

A stack structure consisting of ～1.5 nm-thick LaO_x and ～4.0 nm-thick HfO₂ was formed on thermally grown SiO₂ on Si(1 0 0) by MOCVD using dipivaloymethanato precursors, and the influence of N₂ annealing on interfacial reaction for this stack structure was examined by using X-ray photoelectron spectroscopy and Fourier transform infrared attenuated total reflection. We found that compositional mixing between LaO_x and HfO₂ becomes significant from 600 °C upwards and that interfacial reaction between HfLa_yO_z and SiO₂ proceeds consistently at 1000 °C in N₂ ambience.     

Low-temperature crystallization of Ge-rich GeSn layers on Si3N4 substrate

Solid phase crystallization (SPC) of amorphous GeSn (a-GeSn) layers with a Sn content of 2% on various insulating substrates of Si₃N₄, sapphire, and Y₂O₃ have been investigated. We found that Si₃N₄, which has almost same value of a higher surface energy with sapphire and the value is about twice as high as Y₂O₃, could be reduced the SPC temperature of a-GeSn layers (to 400 °C) compared with the other cases. We can see that a maximum grain size as large as 0.9 µm was achieved for polycrystalline GeSn layers on Si₃N₄ by the annealing at 450 °C for 5 h. Correspondingly, a relatively higher Hall hole mobility (180 cm²/Vs) was obtained.     

Thermal stability of compressively strained Si/relaxed Si1-xCx heterostructures formed on Ar ion implanted Si (100) substrates

Thermal stability of compressively strained Si/relaxed Si_1-xC_x heterostructure formed with the defect control by Ar ion implantation was investigated. It was found that compressive strain is sustained up to 900 °C without prominent change in surface roughness. From the X-ray diffraction reciprocal space mapping, it was found that relaxed Si_1-xC_x layer is stable up to at least 800 °C, and compressively strained Si_1-xC_x with relatively large thickness is formed by annealing at temperatures higher than 900 °C owing to redistribution of C atoms. These results indicate that the compressively strained Si/relaxed Si_1-xC_x heterostructure formed by Ar ion implantation technique is available up to at least 800 °C and has a potential to be used at more than 900 °C.     

Effect of additive N2 and Ar gases on surface smoothening and fracture strength of Si wafers during high-speed chemical dry thinning

In this work, we investigated the changes in the surface roughness and fracture strength of bare or mechanically ground Si wafers caused by high-speed chemical dry etching. High-speed chemical dry thinning was achieved by injecting NO gas and additive N₂ and Ar gases directly into the reactor during the supply of F radicals from NF₃ remote plasmas. With the additional injection of N₂ and Ar gases, together with the direct-injected NO gas, the rough surfaces of the mechanically ground Si wafers could be effectively smoothened while keeping the thinning rate of Si very fast, viz. up to 18.2 μm/min. The additive N₂ gas reduced the wafer surface temperature after thinning. The fracture strength of the Si wafers thinned down to 50 μm by the chemical dry etching process was more highly increased, due to the more effective removal of the mechanical damage and stress generated during the mechanical grinding process, as compared to the other final thinning methods such as lapping or plasma etching. The results indicated that the high-speed dry chemical thinning process could be used for the ultra-thin final thinning of Si wafers for next generation three-dimensional packaging technologies.     

Effect of high-temperature annealing on lanthanum aluminate thin films grown by ALD on Si(1 0 0)

Amorphous lanthanum aluminate thin films were deposited by atomic layer deposition on Si(1 0 0) using La(ⁱPrCp)₃, Al(CH₃)₃ and O₃ species. The effects of post-deposition rapid thermal annealing on the physical and electrical properties of the films were investigated. High-temperature annealing at 900 °C in N₂ atmosphere leads to the formation of amorphous La-aluminosilicate due to Si diffusion from the substrate. The annealed oxide exhibits a uniform composition through the film thickness, a large band gap of 7.0 ± 0.1 eV, and relatively high dielectric constant (κ) of 18 ± 1.     

Photophysical properties of nano Si/SiOx composites in Al/composite/mono Si structures for green light emitting and photodetector-Schottky diodes

The concept of the self-formation of a nanocrystallite (nc-) Si/SiO_x : Si_zO_yAl nanocomposite at the Al/oxidized porous silicon interface in the result of solid-phase processes between Al and oxidized porous Si (PS) and the influence of its composition on photophysical properties were developed and experimentally confirmed for the Si chip with optical intra-chip interconnect consisting of light emitting and photodetector diodes and alumina waveguide on oxidized PS surface with aluminum electrodes. The peculiarities of nanocomposite photophysical properties (the refractive index, photoluminiscence (PL) peak situation, PL spectrum shape in the green range) have been shown to be due to the quantum confinement effects (revealed by XPS, Raman spectroscopy) and depend on the Al presence in the nanocomposite (obtained by XPS, IR spectroscopy). The experimental confirmation of this concept is (i) the shift of the nc-Si valence band relatively to that of monocrystalline Si (c-Si) on 0.2–0.7 eV for nc-Si size in 2.5–6.5 nm range; (ii) the decrease of Si nanocrystallite size in the Al presence; (iii) the approach of the value of the refractive index of nc-Si : SiO : Si₂O₃ : Si_zO_yAl nanocomposite at λ=236 nm to that of porous Si with 45% porosity and (iv) the stable green PL spectra in the Si_zO_yAl presence in the nanocomposite.     

Effects of post-annealing on the passivation interface characteristics of AlGaN/GaN high electron mobility transistors

We examined the effects of post-annealing in forming-gas ambient on the spin-on-dielectric (SOD)-buffered passivation as well as the conventional plasma-enhanced chemical vapor deposition (PECVD) Si₃N₄ passivation structure in association with the quantitative analysis of defects at the passivation interfaces of AlGaN/GaN high electron mobility transistors (HEMTs). Before the annealing, the interface state densities (D_it) of the PECVD Si₃N₄ are one-order higher (10¹²–10¹³ cm⁻² eV⁻¹) than those of the SOD SiO_x (10¹¹–10¹² cm⁻² eV⁻¹) as derived from C–V characterization. Clear reduction in D_it from the PECVD Si₃N₄ is extracted to a level of 10¹¹–10¹² cm⁻² eV⁻¹ with a stronger absorption from Si–N peak in Fourier transform infrared spectroscopy spectra after the post-annealing. On the other hand, negligible difference in D_it value is obtained from the SOD SiO_x. In this paper we propose that much lower measurement levels (~156 mA/mm) before the annealing and substantial recovery (~13% increase) after the annealing in maximum drain current density of the AlGaN/GaN HEMTs with Si₃N₄ passivations are due to the original higher density before the annealing and greater reduction in D_it of the PECVD Si₃N₄ after the annealing. Significant reduction after the annealing in gate–drain leakage current (from ~10⁻³ to ~10⁻⁵ A, 100-μm gate width) of the HEMTs with the Si₃N₄ passivation is also supposed to be attributed to the reduction of D_it.     

Ultra-long Si3N4 nanobelts prepared by nanosilicon,nanosilica and graphite

The composition and morphology of obtained products depended on the processing atmosphere using the raw materials of nanosilicon, nanosilica and graphite, with N₂-generating several millimeters long single-crystal Si₃N₄ nanobelts (NBs) and Ar SiC nanobelts. The width and thickness of in situ NBs ranged from 100 to 300 nm and 50–100 nm with an average width of 196 nm, while the width and thickness of ex situ NBs fluctuated from 150 to 500 nm and 80–200 nm with an average width of 436 nm. Alumina-assisted VS mechanism was proposed for the growth mode of in situ growth of Si₃N₄ nanobelts, while a combined mechanism involving VS and VLS was controlled the growth of Si₃N₄ nanobelts obtained on the inner walls of the crucible due to the presence of Fe₂O₃, which provides an effective means of fabricating ultra-long Si₃N₄ nanobelts on an industrial scale.     

Paramagnetic Ge dangling bond type defects at (1 0 0)Si1−xGex/SiO2 interfaces (Invited Paper)

The work addresses the occurrence of Ge dangling bond type point defects at Ge_xSi_1?x/insulator interfaces as evidenced by conventional electron spin resonance (ESR) spectroscopy. Using multifrequency ESR, we report on the observation and characterization of a first nontrigonal Ge dangling bond (DB)-type interface defect in SiO₂/(1 0 0)Ge_xSi_1?x/SiO₂/(1 0 0)Si heterostructures (0.27 ? x ? 0.93) manufactured by the condensation technique, a selective oxidation method enabling Ge enrichment of a buried epitaxial Si-rich SiGe layer. The center, exhibiting monoclinic-I (C_2v) symmetry is observed in highest densities of ～7 × 10¹² cm^?2 of Ge_xSi_1?x/SiO₂ interface for x ～ 0.7, to disappear for x outside the ]0.45–0.87[ interval, with remarkably no copresence of Si P_b-type centers. Neither are trigonal Ge DB centers observed, enabling unequivocal spectral analysis. Initial study of the defect passivation under annealing in molecular H₂ has been carried out. On the basis of all data the defect is depicted as a Ge P_b1-type center, i.e., distinct from a trigonal basic Ge P_b(0)-type center (Ge₃Ge). The modalities of the defect’s occurrence as unique interface mismatch healing defect is discussed, which may widen our understanding of interfacial DB centers in general.     

Influence of atomic layer deposition chemistry on high-k dielectrics for charge trapping memories

In this work we report the performance of the SiO₂/Si₃N₄/HfO₂ and SiO₂/Si₃N₄/ZrO₂ stacks with emphasis on the influence of atomic layer deposition chemistry used for forming the HfO₂ and ZrO₂ blocking layers. Two Hf precursors were employed – tetrakis(ethylmethylamino)hafnium (TEMAH) and bis(methylcyclopentadienyl)methoxymethyl hafnium (HfD-04). For ZrO₂, tetrakis(ethylmethylamino)zirconium (TEMAZ) and bis(methylcyclopentadienyl)methoxymethyl zirconium (ZrD-04) were used as metal precursors. Ozone was used as the oxygen source. The structural characteristics of the stacks were examined by transmission electron microscopy and grazing incidence X-ray diffraction. The electrical properties of the stacks were studied using platinum-gated capacitor structures. The memory performance of the stacks was evaluated by write/erase (W/E) measurements, endurance and retention testing. Endurance measurements revealed the most important difference between the stacks. The films grown from TEMAH and TEMAZ could withstand a significantly higher number of W/E pulses (>3 × 10⁵ in the 10 V/?11 V, 10 ms regime), in comparison to the stacks made from HfD-04 and ZrD-04 precursors (<5 × 10³ W/E cycles). This difference in endurance characteristics is attributed mainly to the different deposition temperatures suited for these two precursors and the nature of the layer formed at the Si₃N₄/HfO₂ and the Si₃N₄/ZrO₂ interfaces.     

Application of non-linear optical second harmonic generation and X-ray absorption and spectroscopies to defect related properties of Hf silicate and Hf Si oxynitride gate dielectrics

Three different Hf oxide based dielectrics have emerged as viable candidates for applications in advanced ULSI devices. This article focuses on two of these: (i) phase separated Hf silicates with (i) 70–85% nano-crystalline HfO₂ with a nano-grain size <2 nm, and 15–30% ～2 nm non-crystalline SiO₂ inclusions, and (ii) Hf Si oxynitride alloys, the most promising of which has a composition, (HfO₂)_0.3(SiO₂)_0.3(Si₃N₄)_0.4 designated as 3/3/4 Hf SiON. X-ray absorption spectroscopy has been applied to identification of defect associated with vacancy structures in phase separated silicates, and network disruption defects in the Hf Si oxynitrides. Optical second harmonic generation is introduced in this article for the first time as a non-invasive approach for detecting macroscopic strain, that is shown to be absent in these low defect density dielectrics, the phase separated Hf silicates, and Hf Si oxynitrides, but present in HfO₂ films, and Hf silicates with lower HfO₂ content, e.g., the 40% HfO₂ film of this article.     

Effect of Ar annealing temperature on SiO2/4H-SiC interface studied by spectroscopic ellipsometry and atomic force microscopy

The authors have investigated the effects of different annealing temperatures in Ar atmosphere on the SiO₂/4H-SiC interfaces by spectroscopic ellipsometry (SE) and atomic force microscopy (AFM). There is a strong correlation between the annealing temperatures and the quality of SiO₂/4H-SiC interface. Annealing at 600 °C can significantly improve the quality of SiO₂/4H-SiC interface with no transition layer. The reasons for such improvement in the quality of the SiO₂/4H-SiC interface after moderate temperature annealing at 600 °C may be explained by the formation and consumption of carbon clusters and silicon oxycarbides during annealing.     

InP and Si metal-oxide semiconductor structures fabricated using oxygen plasma assisted wafer bonding

In this paper, InP metal-oxide-semiconductor (MOS) structures are fabricated by transferring thermally grown SiO₂ to InP from oxidized Si wafers using oxygen plasma assisted wafer bonding followed by annealing at either 125°C or at 400°C. Well-defined accumulation and inversion regions in recorded capacitance-voltage (C-V) curves were obtained. The long-term stability was comparable to what has been previously reported. The structures exhibited high breakdown fields, equivalent to thermally grown SiO₂-Si MOS structures. The transferring process was also used to fabricate bonded Si MOS structures.     

Electronic properties of Si/Si-Ge Alloy/Si(100) heterostructures formed by ECR Ar plasma CVD without substrate heating

By using our low-energy Ar plasma enhanced chemical vapor deposition (CVD) at a substrate temperature below 100 °C during plasma exposure without substrate heating, modulation of valence band structures and infrared photoluminescence can be observed by change of strain in a Si/strained Si_0.4Ge_0.6/Si(100) heterostructure. For the strained Si_0.5Ge_0.5 film, Hall mobility at room temperature was confirmed to be as high as 660 cm² V⁻¹ s⁻¹ with a carrier concentration of 1.3×10¹⁸ cm⁻³ for n-type carrier, although the carrier origin was unclear. Moreover, good rectifying characteristics were obtained for a p⁺Si/nSi_0.5Ge_0.5 heterojunction diode. This indicates that the strained Si-Ge alloy and Si films and their heterostructures epitaxially grown by our low-energy Ar plasma enhanced CVD without substrate heating can be applicable effectively for various semiconductor devices utilizing high carrier mobility, built-in potential by doping and band engineering.     

Scaling the MOSFET gate dielectric: From high-k to higher-k? (Invited Paper)

We discuss options for metal–oxide-semiconductor field-effect transistor (MOSFET) gate stack scaling with thin titanium nitride metal gate electrodes and high-permittivity (‘high-k’) gate dielectrics, aimed at gate-first integration schemes. Both options are based on further increasing permittivity of the dielectric stack. First, we show that hafnium-based stacks such as TiN/HfO₂ can be scaled to capacitance equivalent thickness in inversion (T_inv) of 10 Å and equivalent oxide thickness (EOT) of 6 Å by using silicon nitride instead of silicon oxide as a high-k/channel interfacial layer. This is based on the higher dielectric constant of Si₃N₄ and on its resistance to oxidation. Although the nitrogen introduces positive fixed charges, carrier mobility is not degraded. Secondly, we investigate whether Ti-based ‘higher-k’ dielectrics have the potential to ultimately replace Hf. We discuss oxygen loss from TiO₂ as a main challenge, and identify two migration pathways for such oxygen atoms: In addition to well-known down-diffusion and channel Si oxidation, we have newly observed oxygen up-diffusion through the TiN metal gate, forming SiO₂ at the poly-Si contact. We further address the performance of Si₃N₄ and HfO₂ as oxygen barrier layers.     

Thermal conductivity of AlN thin films deposited by RF magnetron sputtering

Aluminum nitride (AlN) film, which is being investigated as a possible passivation layer in inkjet printheads, was deposited on a Si (1 0 0) substrate at 400 °C by radio frequency (RF) magnetron sputtering using an AlN ceramic target. Dependence on various reactive gas compositions (Ar, Ar:H₂, Ar:N₂) during sputtering was investigated to determine thermal conductivity. The crystallinity, grain size, and Al–N bonding changes by the gas compositions were examined and are discussed in relation to thermal conductivity. Using an Ar and 4% H₂, the deposited AlN films were crystalline with larger grains. Using a higher nitrogen concentration of 10%, a near amorphous phase, finer morphology, and an enhanced Al–N bonding ratio were achieved. A high thermal conductivity of 134 W/mk, which is nine times higher than that of the conventional Si₃N₄ passivation film, was obtained with a 10% N₂ reactive gas mixture. A high Al–N bonding ratio in AlN film is considered the most important factor for higher thermal conductivity.