Staircase Control of Hybrid Cascaded Multi-level Inverter

A cascaded multi-level inverter consists of H-bridge modules that can generally be divided into one with the same DC bus voltage and another with different DC bus voltages. By using the same power device as a standard 7-level 3H-bridge converter, the proposed converter operates with 15-level resolution with separate DC voltage sources of voltage ratio 4:2:1. The analysis of this hybrid cascaded converter with staircase control shows that this proposal can be applied in many power conversion applications, such as flexible alternative current transmission systems, uninterruptible power supply, and electric power conversion, transmission, and storage of renewable energy sources. Simulation results are presented with the proposed 15-level cascaded H-bridge inverter for a low distortion, near-sinusoidal stepped-voltage output, and a laboratory prototype of a 15-level insulated gate bipolar transistor-based cascaded H-bridge inverter is designed and implemented on a digital signal processor. The total harmonic distortion is proved less than 5%.     

Sinusoidal Pulse-width Modulated Three-phase Multi-level Inverter Topology

Abstract—This article presents a sinusoidal pulse-width modulated three-phase multi-level inverter topology. In this configuration, the basic two-level, three-phase inverter is modified to synthesize higher voltage levels by the insertion of two auxiliary switches per phase leg. The multi-level inverter configuration generates output voltage levels similar to the corresponding well-known conventional diode-clamped flying capacitors and cascaded H-bridge inverters but with fewer power circuit components and more simplicity. For output voltage and frequency variations demanded by such applications as variable-speed drives, active power filters, photovoltaic power conversions, etc., the sinusoidal pulse-width modulation technique is employed in the generation of the gating signals for the proposed three-phase multi-level inverter. A balanced three-phase R-L load is applied at the inverter output terminals, and the inverter performance is compared with that of other sinusoidal pulse-width modulated conventional multi-level inverter configurations. The validity of the proposed multi-level inverter topology and the modulation scheme are verified through simulations and experiments.     

Cascaded Multi-level Inverter Topology Developed from a Modified H-bridge

In this paper, a single-phase cascaded multi-level inverter topology is proposed. It is basically developed from a modified H-bridge module. This topology reduces the switch count, the gate drive requirement, and voltage stress. The significant advantages of the proposed inverter are modular structure, simpler control, and lower number of switches. The Nearest Level Control algorithm is employed to generate the gating signals for the power switches. To verify the performance of the proposed structure, simulation results are carried out by MATLAB (The MathWorks, Natick, Massachusetts, USA)/SIMULINK. Experimental results are presented to validate the simulation results.     

基于SPWM控制的级联型五电平逆变器仿真研究

针对三电平逆变器输出电压谐波分量高和IGBT承受回路电压过大的问题,采用SPWM控制的级联型五电平逆变器进行改进,分析了级联型五电平逆变器的拓扑结构及工作原理,对载波SPWM控制策略进行了研究,在不同调制比下通过Mat-lab/Simulink仿真,对该控制技术进行了谐波分析,得出了一种适合于级联型五电平逆变器的调制方法。     

级联型多电平逆变器准单极性控制策略

级联型多电平逆变器采用低压H桥串联实现高压输出,其良好的输出电压与电流波形,使其在中高压变频器中逐渐得到广泛的运用.而对级联多电平逆变器的控制均采用双极性多重载波水平移相控制,需要实时计算多重载波与调制波比较产生的多路PWM波,所以主控制器工作量较大,且容易产生较大的计算误差.提出了"准单极性"多重载波水平移相控制,载波仅为正极性,且有一半周期为零电平,其可大大降低主控制器工作量与减小计算误差,实验结果证明了其较双极性多重载波水平移相控制具有更好的输出电压波形和启动性能,其在级联型多电平逆变器中不失为一种有效的控制方法.     

一种优化的级联型多电平变换器拓扑

本文提出了一种优化的级联型多电平变换器，它可以由任意个任意类型的H-桥单元级联构成。各个H-桥通过设置合适的直流电压比，可以得到最大电平数的输出。相对于传统的级联型拓扑，在得到相同输出电平的情况下，新拓扑可以使用较少数量的开关器件和较少数量的独立电压源，从而简化电路，降低成本。本文以两电平H-桥(2-H)和飞跨电容型三电平H-桥(3-H)级联构成的拓扑为例进行了分析研究，并采用混合调制的方法通过仿真验证了该优化拓扑的可行性。     

A Single-phase Hybrid Multi-level Inverter

This article presents a single-phase 17-level hybrid multi-level inverter. The cascaded unit is made up of two five-level inverter configurations: a diode-clamped inverter and an inverter constituted of a main inverting H-bridge leg and level-clamping half-bridge circuit. The asymmetrically cascaded inverters have a separate DC input ratio of 1:3 that affects reduction in the power circuit component count in the single-phase multi-level inverter system. The operational principles, modulation schemes, and switching functions have been analyzed in detail. Fast fourier transform analysis of the output voltage waveform was carried out, and a low total harmonic distortion value of 7.61% was obtained. The validity of the proposed hybrid multi-level inverter is verified through simulation and experimental results.     

一种通用的H桥级联多电平逆变器SVPWM控制

H桥级联多电平逆变器调速系统中,电压矢量数目过多,存在计算困难及电压矢量优化选择的问题.对多电平系统电压矢量的特点和规律进行深入分析,提出了一种简单、通用的电压空间矢量脉宽调制( SVPWM)控制算法.该算法可减小谐波畸变,降低开关频率,能很容易地确定参考电压矢量位置和各矢量作用时间,且占用存储空间小,无需查表.最后,通过13电平H桥级联型逆变器驱动系统的实验,验证了该方法的有效性.     

A Cascaded Multi-level Inverter Topology with Improved Modulation Scheme

This article proposes a single-phase, cascaded multilevel inverter topology. Each of the cascaded unit cells is made up of a main inverting H-bridge leg and a level-clamping half-bridge circuit. The single-carrier, multilevel pulse-width modulation scheme is employed to generate gating signals fort he power switches. The modulation scheme is hybridized to enable the output voltage of the proposed inverter configuration, inherit the features of switching-loss reduction from fundamental pulse-width modulation, and good harmonic performance from multiple sinusoidal pulse-width modulation. A sequential switching scheme is embedded with the already employed hybrid modulation to overcome unequal switching losses among the power devices. A simple base pulse-width modulation circulation scheme is also introduced in this work to get resultant sequential switching hybrid pulse-width modulation circulation that balances power dissipation among the power modules. The proposed inverter configuration was subjected to a resistor-inductor load, and the respective numbers of output voltage level were synthesized. Fast Fourier transform (FFT) analyses of the output voltage waveforms were carried out. Analysis of the conduction power losses in the power semiconductor switches of the proposed inverter topology is given. Simulations and experiments are carried out on a 3.07-kW rated prototype of the proposed inverter for a resistor-inductor load.     

一种差分对称型五电平逆变器拓扑及分析

大多数多电平逆变器通过前级结构产生不同水平的电压,后级连接到H桥臂以改变输出电压的方向。由于H桥谐波成分高,并且增加了成本,故提出一种差分对称型五电平逆变器。该逆变器拓扑结构对称、控制简单、谐波低,不需要额外的桥臂来改变输出电压的方向,其本身既能产生多个电平又能改变输出电压方向。此外,该逆变器在一个运行周期中,电容均只有一个模态放电,因此电容充电时间大于放电时间,故有足够的能量供给负载。利用MATLAB/Simulink对所提逆变器进行了仿真分析,并搭建了样机进行试验验证,仿真和试验结果与理论分析一致,证明了所提逆变器的有效性。     

基于DSP的新型单相电流型多电平逆变器的研究

现有的多电平变换技术主要是针对电压型逆变器,但随着超导储能技术的发展,电流型逆变器的储能效率问题必将得到解决,电流型多电平逆变器也将得到广泛应用。本文提出了一类新型单相直接式电流型多电平拓扑,该类拓扑结构非常简单,所用开关器件和均流电感的数目非常少。文中分析了由该类拓扑组成的单相五电平、七电平变流器的工作原理,并将拓扑扩展到N电平的情况。针对所提出的单相五电平电流型逆变器,进行了仿真分析。最后根据实验情况,给出了一种用DSP产生控制信号的方法。五电平电路的仿真结果和实验波形验证了所提出拓扑的正确性和可行性。     

采用波形合成法的级联型多电平逆变器谐波控制

为改善级联型多电平逆变器输出电压波形质量,对通过控制逆变单元开关角实现级联多电平逆变器谐波控制的方法进行了分析研究。针对解方程组法消除特定谐波中高次多变量方程组难于求解的问题,提出了一种波形合成消除特定谐波的方法。利用此方法可通过简单的三角公式递推计算获得实现特定谐波消除的开关角。依据理论计算结果进行的例证演示列出了开关角所有可能的取值情况,说明通过逆变器开关角的选择可同时实现输出电压中特定谐波的消除及基波幅值的调节。仿真与实验结果验证了该方法的可行性。     

基于三次谐波注入的级联多电平逆变器

详细分析了调制波变换技术和三次谐波注入多电平逆变器的原理。以及三次谐波注入后逆变器的调制信号与输入直流电压的关系。并且,分析了在级联多电平逆变器开环PWM控制下,一般SPWM与三次谐波注入的不同。提出三次谐波注入法能够在不影响负载电流电压的情况下实现载波调制的优化控制,提高电压利用率。在Matlab／Simulink环境下通过仿真,证实了理论的正确性。     

A New Cascaded Multi-level Inverter Topology with Reduced Number of Components and Charge Balance Control Methods Capabilities

In this article, a new basic unit for cascaded multi-level inverter is proposed. This inverter is able to increase the number of output voltage levels and reduces the number of power electronic devices. To generate all voltage levels at the output, five different algorithms to determine the magnitude of DC voltage sources are suggested. This inverter is compared with conventional cascaded multi-level inverters. The comparisons show that the proposed topology needs fewer DC voltage sources and power switches, less variety of the magnitude of DC voltage sources, and smaller amounts of blocked voltage by switches. As a result, the installation space and total cost of the inverter decrease. As it is impossible to use charge balance control methods for the asymmetric cascaded multi-level inverters, the developed topology based on the proposed cascaded inverter–the sub-symmetric topology with the usability of charge balance control methods–is proposed. A new algorithm is proposed to determine the magnitude of DC voltage sources. In addition, full-wave and half-wave charge balance control methods are applied in the proposed developed topology. The accurate performance of the proposed topology by applying charge balance control methods is verified through the simulation and experimental results of an 81-level sub-symmetric inverter.     

Improved Configuration of Multilevel Inverter with Reduced Semiconductor Devices

In DC/AC power conversion, multi-level inverter (MLI) incorporates a large number of semiconductor devices, which increases its cost and complexity. Moreover, the recently introduced topology uses a large variety of semiconductor switches. Therefore, a great attention is paid toward increasing output voltage levels with less variety and reduced number of switches as compared to conventional topologies. In this paper, improved configuration of symmetrical and asymmetrical MLI is proposed. Improvement is brought on both quantitative and qualitative basis, which led to a reduction in number of semiconductor devices and its variety. Analysis of power losses of the proposed topology is carried out and compared with CHB. A wide range of comparison with recently proposed topologies is made in order to show the novelty and contribution of the proposed topology. Multi-Carrier Pulse Width Modulation strategy is adopted for generating the switching pulses. The detailed simulation study of the proposed topology has been carried out using MATLAB/SIMULINK and validated experimentally for 7-level and 81-level inverter.     

基于三次谐波注入的级联多电平逆变器

详细分析了调制波变换技术和三次谐波注入多电平逆变器的原理,以及三次谐波注入后逆变器的调制信号与输入直流电压的关系。并且,分析了在级联多电平逆变器开环PWM控制下,一般SPWM与三次谐波注入的不同。提出三次谐波注入法能够在不影响负载电流电压的情况下实现载波调制的优化控制,提高电压利用率。在Matlab／SimulinK环境下通过仿真,证实了理论的正确性。     

级联多电平逆变器空间矢量调制算法零序电压分布及优化算法

逆变器输出电压中的零序分量在电机中形成共模电压,它通过寄生回路产生的共模电流会损坏电机轴承、造成绕组绝缘的破坏以及产生电磁干扰。本文在将常规dq0坐标旋转45°后的新坐标平面中,研究了空间矢量对应的零序分量的分布规律。结果表明,只要适当地减小调制系数,逆变器输出电压矢量的零序分量幅值就可以小于一定的限制值。基于该规律,提出了一种将级联型多电平逆变器输出零序电压幅值的相对值限制为1/3的空间矢量调制算法。仿真和实验结果表明,该调制方法对零序电压的抑制是有效的,并且计算简单、易于实现。     

阶梯波合成技术级联多电平变换器功率均衡策略

针对采用阶梯波合成策略级联型多电平逆变器存在的功率均衡问题,该文提出有功功率均衡法和循环脉冲功率均衡法两种功率均衡策略,前者的优点是不论级联单元个数多少,逆变器实现功率均衡所需时间仅为一个输出周期,缺点是会影响输出电压波形质量;后者的优点是不影响输出电压的波形质量,缺点是随着级联单元个数的增多,逆变器实现功率均衡的时间变长。该文详细分析两种均衡策略的工作原理及特点,并进行实验验证,实验结果表明两种功率均衡策略是可行的。     

双低压型混合级联逆变器的改进混合调制

为解决混合级联九电平逆变器中的电流倒灌问题和降低功率平衡方法的数字设计难度,提出了一种改进的混合调制策略。该混合调制策略可分为两步:首先,通过改进混合级联九电平逆变器拓扑及混合调制方法消除电流倒灌问题;然后再利用逻辑运算对低压单元开关管的初始驱动信号进行功率平衡优化,得到低压单元开关管的实际驱动信号,进而简化功率平衡方法。仿真和实验结果表明:该策略能够在较低调制度下,实现逆变器的高压单元工作在基波频率和2个低压单元的功率平衡。     

Balancing Switching Losses in Three-phase,Five-level Pulse-width Modulation Switched Voltage Source Inverter Using Hybrid Modulation Techniques

This article proposes a new switching strategy for a three-phase, five-level switched voltage source inverter. The single-carrier, multi-level pulse-width modulation (PWM) scheme is employed to generate gating signals for the power switches. The proposed modulation scheme is hybridized to enable the output voltage of the inverter configuration, inheriting the features of switching-loss reduction from fundamental PWM and good harmonic performance from multiple sinusoidal PWM. A sequential switching scheme is embedded with the already-employed hybrid modulation to overcome unequal switching losses and, therefore, differential heating among the power devices. Operational principles with switching functions are given. For an R-L load, Fast Fourier Transform (FFT) analyses of the output voltage waveforms were carried out, and the corresponding total harmonic distortion value of 26.09% was obtained. To verify the performance of the proposed modulation scheme, simulations and experiments are conducted on a 1.2-kW rated prototype of the inverter; adequate results are presented.