集成硅微机械光压力传感器

介绍了一种新颖的集成硅微机械光压力传感器的结构、工作原理、制造工艺和实验结果。该传感器是利用半导体集成电路微细加工技术和各向异性腐蚀相结合的方法，将传输、获取信息的光波导，敏感弹性硅膜和光电探测器集成在一块三维硅基片上得到的。它具有灵敏度高、抗干扰能力强、自身无需电源、防爆、成本低和可靠性高等优点。     

CMOS integrated silicon pressure sensor

The sensor described includes a four-arm piezoresistance bridge circuit, an amplifier, and a bridge excitation circuit. This circuit is used to stabilize changes in sensitivity due to variations in temperature and supply voltage. The sensor was fabricated using a self-aligned double-poly Si gate p-well CMOS process combined with an electrochemical etch-stop technique using N/SUB 2/H/SUB 4/-H/SUB 2/O anisotropic etchant for the thin-square diaphragm formation. The silicon wafer was electrostatically adhered to a glass plate to minimize thermally induced stress. Less than a /spl plusmn/0.5% sensitivity shift and less than a /spl plusmn/5-mV offset shift were obtained in the 0-70/spl deg/C range, with a 1-V/kg/cm/SUP 2/ pressure sensitivity. By using a novel excitation technique, a sensitivity change of less than /spl plusmn/1.5% under a /spl plusmn/10% supply voltage variation was also achieved.     

硅电容压力传感器敏感器件的研究

研制的硅电容压力传感器芯体采用微机械加工技术,加工精度高,易于批量化生产。结构上采用对称的差动电容形式,并将其封装在专用基座中,适用于中、微压力的高精度测量,可用于目前通用压力传感器的升级产品。     

Integrated signal conditioning for silicon pressure sensors

A silicon-diaphragm pressure sensor containing on-chip circuitry for signal conditioning has been designed for applications in biomedicine. The device requires no off-chip components and only two external leads, making it suitable for use with multisensor catheters having diameters less than 1.5 mm. The output is a temperature-compensated high-frequency FM analog representation of the applied pressure signal. The device exhibits 1-percent resolution and accuracy over the physiological pressure and temperature ranges. Circuit techniques applicable to a variety of active sensors are descried.     

MOS Integrated Circuit Reliability

This paper presents information on the reliability of MOS integrated circuits based on p-channel enhancement-mode transistors, and describes their failure modes and mechanisms. The principal failure mechanisms were ion migration at the surface and oxide shorting. The results of experimental studies of the effects of variations in construction, processing, and levels of stress are presented, and are compared with other available information on MOS integrated circuit reliability. The failure rate for commercially available complex MOS arrays is on the order of 0.001 to 0.01 per 1000 h of operating life at 125°C for arrays containing approximately 600 p-channel transistors. This corresponds to a failure rate on the order of 5 × 10?6 to 5 × 10?5 per equivalent gate per 1000 h. The effects of device complexity, operating temperature, and other factors are discussed. A reliability prediction equation for MOS integrated circuits is derived from available information. An overall activation energy for functional failure mechanisms of approximately 5 kcal/mole (?0.2 eV/molecule) is considered applicable to typical MOS integrated circuits. Thus, the failure rate of MOS devices operated at 50°C ambient temperature can be predicted to be on the order of 10?6 to 10?5 per equivalent gate per 1000 h.     

Nonlinear analysis of a CMOS integrated silicon pressure sensor

This paper reports theoretical and experimental results of analysis on the nonlinear characteristics of a CMOS integrated pressure sensor with a square silicon diaphragm. It is shown that nonlinearity is caused by both the large diaphragm deflection and the nonlinear piezoresistance of the resistors. The optimum layout for the piezoresistors to minimize their nonlinearity is also shown. The measured nonlinearity for the fabricated device agrees well quantitatively with the numerically analyzed nonlinearity.     

Integrated MOS analog delay line

A 16-stage, fixed or variable analog delay line that makes use of integrated p-channel MOS field-effect transistors is described. The delay line relies on `sample' and `hold' techniques and makes use of the inherent characteristics of p-channel MOS transistors. The delay line provides unit gain with a dynamic range of 1 volt. The bandwidth of the delay line is 0.8 MHz under nonsampling conditions. The lowest sampling rate was found to be 50 Hz. A built-in capacitive compensation technique using signals opposite in phase reduces feedthrough of the sampling signal and final filtering requirements. Investigation of the problems of obtaining unity gain and dynamic range led to the development of a computer-aided analysis that provides a family of dc transfer characteristics of cascaded p- channel MOS `half-stages' when a variation of either a material or electrical parameter is made.     

Temperature compensation of piezoresistive micro-machined porous silicon pressure sensor by ANN

Porous silicon based micro-machined peizoresistive pressure sensors are fabricated and tested in the range of 0–1 bar and temperature range of 25–80 °C. The dependence of pressure sensitivity on the variation of ambient temperature is investigated. An intelligent online temperature compensation scheme using ANN technique has been described. The proposed scheme leads to an error reduction of approximately 98% from temperature uncompensated value. A hardware implementation of the proposed scheme using micro-controller is also described.     

Mechanism of formation of the response of a hydrogen gas sensor based on a silicon MOS diode

Experimental data on the dependence of the flat-band voltage and relaxation time for the capacitance of the space-charge region in an MOS diode (Pd-SiO₂-n-Si) on the hydrogen concentration in a hydrogen/air gaseous mixture are discussed. It is assumed that variation in the flat-band voltage U _fb in an MOS structure with the thickness d = 369 nm subjected to a hydrogen/air gaseous mixture can be accounted for by the formation of dipoles in the Pd-SiO₂ gap due to polarization of hydrogen atoms (H _a ). An analytical expression describing the dependence of variation in the flat-band voltage ΔU _fb on the hydrogen concentration \(n_{H_2 } \) was derived. In MOS structures with d ≤ 4 nm (or MOS diodes), the value of ΔU _fb is mainly controlled by passivation of the centers responsible for the presence of the surface acceptor-type centers at the SiO₂-n-Si interface by hydrogen atoms. Analytical expressions describing the dependences of ΔU _fb and the capacitance relaxation time in the space-charge region on \(n_{H_2 } \) are derived. The values of the density of adsorption centers and the adsorption heat for hydrogen atoms at the Pd-SiO₂ and SiO₂-n-Si interfaces are found.     

Reliability of Complementary MOS Integrated Circuits

This paper describes the results of tests of the stability and reliability of complementary MOS (CMOS) integrated circuits (IC). Operating life-tests at 125°C indicated excellent stability of electrical characteristics of both n-channel and p-channel transistors. Over three million device-hours of accelerated operating life-tests indicated a calculated failure rate, at a 60-percent s-confidence level, of 0.08%/1000 hours at 125°C, which corresponds to 0.01%/1000 hours at 55°C or 0.003%/1000 hours at 25°C. Field-usage reliability data on three satellites in orbit indicate a total failure rate of 0.003%/1000 hours (over thirty-four million operating hours with no failures). The observed failure rates are compared with other available data on IC reliability, and it is concluded that the reliability of CMOS ICs is equal to that of p-channel MOS circuits or of bipolar digital circuits of equal complexity, when each type is prepared by a well-controlled process, and operated at the same temperature. The operating temperature of CMOS IC chips in electronic systems is, however, generally lower since logic functions are accomplished at lower dissipation per gate.     

Shielded silicon gate complementary MOS integrated circuit

An electrostatic shield for complementary MOS integrated circuits was developed to minimize the adverse effects of stray electric fields created by the potentials in the metal interconnections. The process is compatible with silicon gate technology. n-doped polycrystalline silicon was used for all the gates and the shield. The effectiveness of the shield was demonstrated by constructing a special field plate over certain transistors. The threshold voltages obtained on a oriented silicon substrate ranged from 1.5 to 3 V for either channel. Integrated inverters performed satisfactorily from 3 to 15 V, limited at the low end by the threshold voltages and at the high end by the drain breakdown voltage of the n-channel transistors. The stability of the new structure with an n-doped silicon gate as measured by the shift inC-Vcurve under 200°C ± 20 V temperature-bias conditions was better than conventional aluminum gate or p-doped silicon gate devices, presumably due to the doping of gate oxide with phosphorous. The advantages of the new structure are: avoidance of field inversion, elimination of guard rings, and thinner and more stable oxides.     

Substrate current in silicon p-channel MOS transistors

Substrate currents are observed in silicon p-channel MOSFET devices. These currents are similar to those observed in n-channel MOSFETs but have a markedly higher threshold voltage.     

A self-scanned image sensor employing MOS structure

Studies were carried out on a self-scanned image sensor comprising a linear integrated-circuit array of photodiodes and metal-oxide-semiconductor (MOS) transistors. It was found that the maximum scanning rate is about 2.5×10⁵bits/s, and that the value is mainly restricted by the photo-induced current and the junction capacitance of the photodiode.     

An integrated thermo-capacitive type MOS flow sensor

A prototype of a new thermo-capacitive integrated flow sensor consisting of a floating-gate MOS transistor has been developed. Tantalum pentoxide is the dielectric material between the top (control) gate and the floating-gate. The temperature dependence of the dielectric constant is about 375 ppm/°C. The process flow is compatible with standard MOS process and augmented to include a capacitor module and bulk micromachining. The output voltage change at the flow velocity of 20 m/s is about 26 mV at 57 mW of heater power. The sensitivity in the 0-4 m/s flow velocity region is 4.25 mV(m/s)^-1     

Integrated silicon microspectrometers

Microspectrometers, which read color and the results from analytical chemistry, are used for quality inspection in industry and agriculture. They read the chromatography results by measuring the IR absorption of the chemical constituent between the IR source and the grating. Micromachining can implement the dispersion and detection elements in a silicon microspectrometer so that it can analyze the spectrum of incident light. The microspectrometer may either operate an array of detectors, each with a uniform spectral response, or scan the dispersion element using a single calibrated detector. Compared to bulky macroscopic devices, this microspectrometer has inferior spectral resolution but its small size and low cost more than compensates for this limitation in many applications     

Integrated silicon anemometer

At present, planar silicon technology allows one to construct very sophisticated integrated circuits for the processing of electronic signals. In the letter, an integrated silicon sensor for the measurement of gas flow is introduced.     

Fabrication of silicon MOS devices using X-ray lithography

This paper reports on the high-yield fabrication of silicon MOS transistors using X-ray lithography, measurements and annealing of fast surface states and oxide charges created by X-ray irradiation, and design considerations for submicrometer linewidth X-ray lithography on 7.5-cm diameter silicon wafers.     

Radiative recombination in a silicon MOS tunnel structure

Recombination luminescence spectra of tunnel Al/SiO₂/p-Si MOS structures have been studied experimentally. A mathematical reconstruction of these spectra taking into account the loss by photon reabsorption is carried out. For the first time, the experimental data are presented in absolute units (W eV^?1). A relationship is shown between the shape of the spectrum and the energy of injected electrons, which is defined by the applied voltage. The rate of energy loss by photon emission has been estimated. The effect of the oxide degradation on the luminescence characteristics of MOS structures is considered.