共查询到20条相似文献,搜索用时 125 毫秒
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基于Matlab与DSP的FIR数字滤波器软硬件实现 总被引:5,自引:5,他引:0
给出了利用Matlab与DSP技术相结合的语音信号FIR滤波的软件、硬件实现方法。分析了FIR滤波器的特性,给出了FIR滤波器的Matlab仿真,介绍了在DSP硬件系统中的实现过程,实现了对语音信号的FIR滤波处理。 相似文献
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在简要分析卫星数字视频广播DVB-S系统发送端信道处理系统设计理论的基础上,针对其中的基带脉冲整形插值滤波器,通过其DSP软件实现方法和FPGA硬件实现方法的详细比较,最终选用FPGA硬件方法来实现内插的有限冲击响应(FIR)数字滤波器.通过MATLAB仿真为该插值滤波器建立了完整的数学模型,同时结合系统的要求及协议标准,提出了该插值滤波器的FPGA 优化设计实现方法. 相似文献
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简要介绍了FIR数字滤波器的结构特点和基本原理,提出基于FPGA和DSP Builder的FIR数字滤波器的基本设计流程和实现方案。在Matlab/Simulink环境下,采用DSP Builder模块搭建FIR模型,根据FDATool工具对FIR滤波器进行了设计,然后进行系统级仿真和ModelSim功能仿真,其仿真结果表明其数字滤波器的滤波效果良好。通过SignalCompiler把模型转换成VHDL语言加入到FPGA的硬件设计中,从QuartusⅡ软件中的虚拟逻辑分析工具SignalTapⅡ中得到数字滤波器实时的结果波形图,结果符合预期。 相似文献
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基于DSP的数字正交解调器的设计与实现 总被引:3,自引:2,他引:1
随着软件无线电技术的迅速发展,数字正交解调技术也越来越成熟.介绍了一种基于希尔伯特带通滤波器的正交解调的数字实现方案,并在TI公司的DSP集成开发环境CCS软件中进行软件仿真并验证了该方案的可行性;最后在以DSP、FPGA等芯片为主的硬件平台上进行硬件仿真测试,同样验证了该方案的正确性与准确性. 相似文献
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This paper presents a high-speed FIR channel filter using residue number system (RNS) whose frequency response can be reconfigured
to adapt to a multitude of channel filtering specifications of a multi-standard software defined radio (SDR) receiver. The
channel filters in the channelizer of an SDR extract multiple narrowband channels corresponding to different communication
standards from the wideband input signal. The proposed architecture has been synthesized on TSMC 0.18 μm CMOS standard cell
technology. Synthesis result shows that the proposed reconfigurable FIR channel filter, for a Digital Advanced Mobile Phone
Systems (D-AMPS) example, offers speed improvement of 42% and AT complexity reduction of 26% over existing reconfigurable
FIR method. 相似文献
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The most computationally intensive part of the wideband receiver of a software defined radio (SDR) is the intermediate frequency (IF) processing block. Digital filtering is the main task in IF processing. The computational complexity of finite impulse response (FIR) filters used in the IF processing block is dominated by the number of adders (subtracters) employed in the multipliers. This paper presents a method to implement FIR filters for SDR receivers using minimum number of adders. We use an arithmetic scheme, known as pseudo floating-point (PFP) representation to encode the filter coefficients. By employing a span reduction technique, we show that the filter coefficients can be coded using considerably fewer bits than conventional 24-bit and 16-bit fixed-point filters. Simulation results show that the magnitude responses of the filters coded in PFP meet the attenuation requirements of wireless communication standard specifications. The proposed method offers average reductions of 40% in the number of adders and 80% in the number of full adders needed for the coefficient multipliers over conventional FIR filter implementation methods 相似文献
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The design of transmit finite-impulse response (FIR) filters with few coefficients in frequency division multiplexing data transmission systems is considered. In these systems, quality objectives are imposed for transmission over channels affected by additive white Gaussian noise (AWGN) and over channels affected by AWGN plus adjacent channel interference (ACI). The goal of this letter is: given that an adaptive receive filter, possibly cooperating with an adaptive decision feedback equalizer, is used for the AWGN channel and for the AWGN plus ACI channel, what is the best fixed FIR transmit filter to use for both channel cases? This goal is achieved by optimizing the compromise between the performance of the system on the two mentioned channels. Also, the advantages of the proposed design over a rival method based on a fixed receive filter are demonstrated. 相似文献
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Software defined radio (SDR) is emerging as a powerful platform for future generation cellular systems, due to its capability
to operate conforming to multiple mobile radio standards. Channelizer in an SDR operates at the highest sampling rate and
hence a low complexity design is needed for the most computationally intensive part of the SDR receiver. The channel filters
in the channelizer extracts radio channels of varying bandwidths, corresponding to various communication standards from the
wideband input signal. An architecture for implementing low complexity, low power and reconfigurable channel filter for the
SDR mobile handsets, based on multi-stage frequency response masking (FRM) is proposed in this paper. The proposed architecture
is unique in a way that it is able to effectively exploit the redundancy in multi-stage realization by utilizing the common
masking filters and also capable of extracting varying bandwidth channels. Design examples show that the proposed architecture
offers 47.5% complexity reduction and 18.1% power reduction over single-stage FRM approach. 相似文献
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Huan Zhou Lihua Xie Cishen Zhang 《Signal Processing, IEEE Transactions on》2002,50(7):1685-1698
This paper studies the H2 optimal deconvolution problem for periodic finite impulse response (FIR) and infinite impulse response (IIR) channels. It shows that the H2 norm of a periodic filter can be directly quantified in terms of periodic system matrices and linear matrix inequalities (LMIs) without resorting to the commonly used lifting technique. The optimal signal reconstruction problem is then formulated as an optimization problem subject to a set of matrix inequality constraints. Under this framework, the optimization of both the FIR and IIR periodic deconvolution filters can be made convex, solved using the interior point method, and computed by using the Matlab LMI Toolbox. The robust deconvolution problem for periodic FIR and IIR channels with polytopic uncertainties are further formulated and solved, also by convex optimization and the LMIs. Compared with the lifting approach to the design of periodic filters, the proposed approach is simpler yet more powerful in dealing with multiobjective deconvolution problems and channel uncertainties, especially for IIR deconvolution filter design. The obtained solutions are applied to the design of an optimal filterbank yielding satisfactory performance 相似文献
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We address the problem of finite impulse response (FIR) filter design for uniform multiple-input multiple-output (MIMO) sampling. This scheme encompasses Papoulis' generalized sampling and several nonuniform sampling schemes as special cases. The input signals are modeled as either continuous-time or discrete-time multiband input signals, with different band structures. We present conditions on the channel and the sampling rate that allow perfect inversion of the channel. Additionally, we provide a stronger set of conditions under which the reconstruction filters can be chosen to have frequency responses that are continuous. We also provide conditions for the existence of FIR perfect reconstruction filters, and when such do not exist, we address the optimal approximation of the ideal filters using FIR filters and a minmax l/sub 2/ end-to-end distortion criterion. The design problem is then reduced to a standard semi-infinite linear program. An example design of FIR reconstruction filters is given. 相似文献
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Yuan-Pei Lin See-May Phoong 《Signal Processing, IEEE Transactions on》2001,49(11):2648-2658
Discrete multitone modulation transceivers (DMTs) have been shown to be very useful for data transmission over frequency-selective channels. The DMT scheme is realized by a transceiver that divides the channel into subbands. The efficiency of the scheme depends on the frequency selectivity of the transmitting and receiving filters. The receiving filters with good stopband attenuation are also desired for combating narrowband noise. The filterbank transceiver or discrete wavelet multitone (DWMT) system has been proposed as an implementation of the DMT transceiver that has better frequency band separation, but usually, intersymbol interference (ISI) cannot be completely cancelled in these filterbank transceivers, and additional equalization is required. We show how to use over interpolated filterbanks to design ISI-free FIR transceivers. A finite impulse response (FIR) transceiver with good frequency selectivity can be designed, as demonstrated by the design examples 相似文献
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Low-Area/Power Parallel FIR Digital Filter Implementations 总被引:4,自引:0,他引:4
This paper presents a novel approach for implementing area-efficient parallel (block) finite impulse response (FIR) filters that require less hardware than traditional block FIR filter implementations. Parallel processing is a powerful technique because it can be used to increase the throughput of a FIR filter or reduce the power consumption of a FIR filter. However, a traditional block filter implementation causes a linear increase in the hardware cost (area) by a factor of L, the block size. In many design situations, this large hardware penalty cannot be tolerated. Therefore, it is important to design parallel FIR filter structures that require less area than traditional block FIR filtering structures. In this paper, we propose a method to design parallel FIR filter structures that require a less-than-linear increase in the hardware cost. A novel adjacent coefficient sharing based sub-structure sharing technique is introduced and used to reduce the hardware cost of parallel FIR filters. A novel coefficient quantization technique, referred to as a scalable maximum absolute difference (MAD) quantization process, is introduced and used to produce quantized filters with good spectrum characteristics. By using a combination of fast FIR filtering algorithms, a novel coefficient quantization process and area reduction techniques, we show that parallel FIR filters can be implemented with up to a 45% reduction in hardware compared to traditional parallel FIR filters. 相似文献
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Reconfigurable non-uniform channel filters are now being widely used in software define radio (SDR). The hardware implementation of these filters requires low complexity, low chip area and low power consumption. The frequency response masking (FRM) approach is proved to be a good candidate for the realization of a sharp digital finite impulse response (FIR) filter with low complexity. To reduce the complexity further, this paper gives an optimal design method which makes the channel filters totally multiplier-less. This is done in two steps. The channel filters are designed using the FRM approach with continuous filter coefficients. To obtain multiplier-less design, these filter coefficients are converted to finite-precision coefficients using signed power of two (SPT) space and the filter coefficients are synthesized in the canonic signed-digit (CSD) format. But this may lead to degradation of the filter performance. Hence the filter coefficients synthesis in the CSD format is formulated as an optimization problem. Several meta-heuristic algorithms like Differential Evolution (DE), Artificial Bee Colony (ABC), Harmony Search Algorithm (HSA) and Gravitational Search Algorithm (GSA) are modified and deployed and the best one is selected. 相似文献