用氧化镉(CdO)为发射区的InGaAsP/InP双异质结晶体管

本文提出和研制了一个新型的InGaAsP/InP双极型晶体管.在单片集成电路中它能与1.55μmInGaAsP/InP双异质结激光器共容而组成一个晶体管-激光器器件.该晶体管的主要特点是采用氧化镉(CdO)薄层作为器件发射区,由InP组成收集区而形成NpN双异质结晶体管.测量结果表明晶体管能双向工作,测得的正向共发射极电流增益为40(V_(CE)=5V,Ic=1mA),反向增益为8(V_(CE)=1.5V,Ic=100μA).文中还给出了h_(fe)—I_c特性和晶体管CdO-InGaAsP发射结的伏安特性.     

准平面型InAlAs/InGaAs异质结双极晶体管和单片集成激光器驱动电路

提出和制作了准平面型InAlAs/InGaAs异质结双极晶体管。该管主要采用硅离子注入法在半绝缘磷化铟衬底中形成隐埋型集电区以代替台面型集电区。晶体管的实测结果如下:h_(fe)=100,f_T=10GHz(V_(CE)=3V,I_c=10mA)。作为单片光电集成方面的实例,研制成功了由三个InGaAs/InAlAsHBT和一个电阻组成的激光器驱动电路,其电流调制速率高达4Gbit/s。     

InP异质结晶体管

提出了准平面构成的InP HBT新结构。用Si离子注入在半绝缘In P:Fe上形成隐埋n型区来代替通常采用的外延n型收集区,可有效降低器件的高度,减小寄生参数,提高器件的可靠性。测量结果表明,晶体管的h_(fe)=100,V_(CE)=3～4V,f_T=10GHz。     

硅异质结晶体管的试制

本文较详细地分析了Si/α-Si异质结晶体管(HBT)的微波性能和工艺优点,简述了工艺过程,初步实验结果证实:Si/α-Si HBT具有较好的小电流特性,晶体管的h_(fe)=12(V_(CE=10V,I_C=1mA),BV_(CEO)=20V。     

透明CdO膜发射区InGaAs光电晶体管

研制出一种新型的InGaAs光电晶体管。其发射区采用导电率高(σ=5×10~3Ω~(-1)cm~(-1))禁带宽(E_g(Γ)=2.5eV)的氧化镉(CdO)透明膜,形成宽发射区。测试结果表明,该管具有较宽的波长响应(λ=0.5～1.6μm),共发射极电流增益h_(fe)为10(V_(CE)=3V,I_C=1mA)。并对发射结的伏安恃性、h_(fe)-I_C及暗电流等进行了讨论。     

GaAlAs/GaAs宽禁带发射极异质结微波双极型晶体管的设计制造和性能

本文比较详细地叙述了GaAlAs/GaAs宽禁带发射极异质结微波双极型晶体管的设计原理、制作工艺和实验结果。在叙述原理时着重于与Si微波功率管的对比,并将实验结果和理论值进行了对比和分析,指出了进一步改进高频性能的途径。已经得到的初步实验结果为:击穿电压BV_(ceo)=80V,l_(cmax)=200mA(发射结面积为A_B=2×10~(-4)cm~2),电流增益h(fe)=20～300,最大振荡频率f_(max)=1.2GHz,特征频率f_T=2.0GHz(V_(ce)=20V,I_c=20mA),实测到的温度-电流增益h_(fe)曲线说明晶体管的工作温度可高达350℃。     

肖特基收集极宽发射极GaAlAs/GaAs高速开关晶体管的试制及其性能

本文比较详细地述叙了一种新型器件,即肖特基砷化镓异质结双极型高速开关晶体管的设计原理、制作工艺和实验结果。本晶体管的主要特点是利用金属-半导体为收集结,因而从根本上消除了存贮时间t_s产生的原因,另外利用镓铝砷-砷化镓形成宽发射结可以在发射区中进行轻掺杂的特点,使器件的发射结电容C_(Te)大为降低,以达到缩短其它三个时间常数的目的。目前器件所达到的指标为: BV_(beo)=6V,h_(FE)=30,I_(cm)=70mA,f_(max)=500MHz(V_(ce)=1.5V,I_c=10mA)小信号时,脉冲上升时间和下降时间均为1.5ns。大信号测量表明,即使晶体管进入深饱和状态也观察不到贮存时间t_s。     

1985年北京邮电学院硕士学位研究生入学试题及题解

试题名称:电子电路一、计算下列各题:1.某放大电路的直流简化电路如图1所示,晶体管 BG 的直流放大系数β为50,且工作于放大区。试近似求出 BG 的基极电流 I_B,集电极电流 I_C,集电极至发射极之间的电压 V_(CE)。2.图2(a)为用理想运算放大器组成的电路(略去了各运算放大器同相输入端的直流平衡电阻)。若 u_1(t),u_2(t)的波形如图2(b)所示,试画出 u_0(t)的波形。3.图3为集成运算放大器中某一级的原理电路,各管直流放大系数β都很大(BG_1、BG_2的基极直流接地)。试近似求恒流管 BG_3的电流 I_0。二、某负反馈放大器的交流简化电路如图4所示。已知:h_(ic1)=h_(ie2)=1.5kΩ;h_(fe1)=h_(fe2)=50;h_(oe1)=h_(oe2)=0;h_(re1)=h_(re2)=0;R_8=300Ω;R_(c1)=1.2kΩ;R_(e1)=300Ω;R_(c2)=1kΩ;R_f=2.3kΩ。求电路的电压放大系数 K_(vf)=V_0/V_(?)     

用于衬底馈电逻辑电路(SFL)的PNP宽发射极砷化镓双极型晶体管

本文从原理上分析了GaAs-I~2L电路相对于Si-I~2L电路的改进潜力,指出了PNP电流源管的基本难点在于过短的空穴扩散长度,从而相应提出了衬底馈电逻辑SFL(Substrate fed logic)GaAs电路的概念,本文比较详细地介绍了PNP-GaAs晶体管的制作工艺,并给出了相应的实验结果,初步的数据为电流增益h_(fe)=40,发射极-收集极击穿电压BV_(ceo)=2～3V,本文同时也给出了NPM和NPN-GaAs晶体管的开关特性。     

超高频双差分对管DQ401

1.DQ401主要参数指标I_(CEO)≤0.1μA(V_(CE)=10V);BV_(CEO)≥20V(I_(CE)=1mA);BV_(CBO)≥25V(I_(CB)=10μA);BV_(EBO)≥5V(I_(EB)=10μA);β≥40(V_(CE)=6V,I_C=10mA,f_O=200MHz);(β_1-β_2)/β_2≤5%,V_(BE1)-V_(BE2)≤2mV(V_(CE)=6V,I_C=10mA);f_T≥1000MHz(V_(CE)=6V,I_C=10mA、f_O=200MHz);I_(CM)≥20mA(单管最大工作电流);P_(CM)≥100mW(单管功耗).     

1000-V, 30-A 4H-SiC BJTs with high current gain

This paper presents the development of 1000 V, 30A bipolar junction transistor (BJT) with high dc current gain in 4H-SiC. BJT devices with an active area of 3/spl times/3 mm/sup 2/ showed a forward on-current of 30 A, which corresponds to a current density of 333 A/cm/sup 2/, at a forward voltage drop of 2 V. A common-emitter current gain of 40, along with a low specific on-resistance of 6.0m/spl Omega//spl middot/cm/sup 2/ was observed at room temperature. These results show significant improvement over state-of-the-art. High temperature current-voltage characteristics were also performed on the large-area bipolar junction transistor device. A collector current of 10A is observed at V/sub CE/=2 V and I/sub B/=600 mA at 225/spl deg/C. The on-resistance increases to 22.5 m/spl Omega//spl middot/cm/sup 2/ at higher temperatures, while the dc current gain decreases to 30 at 275/spl deg/C. A sharp avalanche behavior was observed at a collector voltage of 1000 V. Inductive switching measurements at room temperature with a power supply voltage of 500 V show fast switching with a turn-off time of about 60 ns and a turn-on time of 32 ns, which is a result of the low resistance in the base.     

162GHz自对准InP/InGaAs异质结双极型晶体管

报道了发射极自对准的InP基异质结双极型晶体管.在集电极电流Ic=34.2mA的条件下,发射极面积为0.8μm×12μm的InP HBT截止频率fT为162GHz,最大振荡频率fmax为52GHz,最大直流增益为120,偏移电压为0.10V,击穿电压BVCEO达到3.8V(Ic=0.1μA).这种器件非常适合在高速低功耗方面的应用,例如OEIC接收机以及模拟数字转换器.     

Temperature-dependence investigation of a high-performance inverteddelta-doped V-shaped GaInP/InxGa1-xAs/GaAspseudomorphic high electron mobility transistor

A newly designed inverted delta-doped V-shaped GaInP/In_xGa_1-xAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) has been successfully fabricated and studied. For a 1×100 μm² device, a high gate-to-drain breakdown voltage over 30 V at 300 K is found. In addition, a maximum transconductance of 201 mS/mm with a broad operation regime for 3 V of gate bias (565 mA/mm of drain current density), a very high output drain saturation current density of 826 mA/mm, and a high DC gain ratio of 575 are obtained. Furthermore, good temperature-dependent performances at the operating temperature ranging from 300 to 450 K are found. The unity current gain cutoff frequency f_T and maximum oscillation frequency f_max up to 16 and 34 GHz are obtained, respectively. Meanwhile, the studied device shows the significantly wide and flat gate bias operation regime (3 V) for microwave performances     

High-performance RF mixer and operational amplifier BiCMOS circuits using parasitic vertical bipolar transistor in CMOS technology

The electrical characteristics of the parasitic vertical NPN (V-NPN) BJT available in deep n-well 0.18-/spl mu/m CMOS technology are presented. It has about 20 of current gain, 7 V of collector-emitter breakdown voltage, 20 V of collector-base breakdown voltage, 40 V of Early voltage, about 2 GHz of cutoff frequency, and about 4 GHz of maximum oscillation frequency at room temperature. The corner frequency of 1/f noise is lower than 4 kHz at 0.5 mA of collector current. The double-balanced RF mixer using V-NPN shows almost free 1/f noise as well as an order of magnitude smaller dc offset compared with CMOS circuit and 12 dB flat gain almost up to the cutoff frequency. The V-NPN operational amplifier for baseband analog circuits has higher voltage gain and better input noise and input offset performance than the CMOS ones at the identical current. These circuits using V-NPN provide the possibility of high-performance direct conversion receiver implementation in CMOS technology.     

GAT双极晶体管的高频高压兼容特性

建立了 GAT器件集电结耗尽层电位分布和电场分布的二维解析模型 ,定量研究了 GAT的栅屏蔽效应和 GAT的基区穿通电压 VPI,并且解释了该器件实现高频率与高电压兼容的实验结果 .该模型可供优化设计双极型高频、高压、低饱和压降功率器件参考     

N-shaped negative differential resistance in a transistor structurewith a resistive gate

Voltage-controlled negative differential resistance (NDR) characteristics in a N-AlGaAs/p⁺-GaAs/n-GaAs transistor structure are proposed and demonstrated. The gate, made using self-aligned p-type diffusion, is placed in the n-GaAs collector layer instead of the p⁺-GaAs base layer, resulting in a so-called resistive gate. For a fixed gate voltage, the device current is modulated by the applied anode voltage. Under appropriate gate voltage with respect to the anode, the device shows good voltage-controllable NDR characteristics, including large peak-to-valley current ratios (PTV's) and a voltage extension in the N-shaped curve which is equivalent to the common-emitter breakdown voltage in a transistor. A numerical model based on the transistor model for the carrier transport in this device, taking account of the influence of the applied anode voltage on the gate, is proposed. The experimental results show large room temperature PTV's (e.g., 140 at a gate bias of 1.5 V) and large voltage extension in N-shaped curves (about 9 V). Reasonable agreement between theoretical and experimental results is observed     

高频4H-SiC双极晶体管的研制

研制出国内第一个高频4H-SiC双极晶体管.该器件采用了双台面结构和叉指结构,室温下的最大直流电流增益(β)为3.25,集电结击穿电压BVCBO达200 V.器件的β随温度的升高而降低,具有负的温度系数,这种特性使该器件容易并联,避免出现热失控现象.器件的高频特性由矢量网络分析仪测量得到,截止频率.fT为360 MHz、最高振荡频率fmax为160 MHz.     

A New InP/InGaAs Double Heterojunction Bipolar Transistor With a Step-Graded InAlGaAs Collector Structure

An interesting InP/InGaAs double heterojunction bipolar transistor with a step-graded InAlGaAs layer at the base-collector (B-C) heterojunction is fabricated and studied. Simulated results reveal that the potential spike at the B-C heterointerface is completely eliminated. Experimentally, the operation regime is wider than 11 decades in magnitude of the collector current (I_c = 10^-12 A to I_c = 10^-1 A). Furthermore, the studied device exhibits a relatively high common-emitter breakdown voltage and low output conductance even at high temperature. In the microwave characteristics, the unity current gain cutoff frequency f_T = 72.7 GHz and the maximum oscillation frequency f _max = 50 GHz are achieved for a nonoptimized device (A_E = 6 times 6 mum²).     

Breakdown behavior of GaAs/AlGaAs HBTs

Avalanche breakdown behavior at the collector junction of the GaAs/AlGaAs HBT (heterojunction bipolar transistor) has been studied. Junction breakdown characteristics displaying hard breakdown, soft breakdown, and negative resistance breakdown behavior were observed and are interpreted by analysis of localized microplasma effects, uniform microplasma-free behavior, and associated current gain measurements. Light emission from the collector-base junction of the GaAs/AlGaAs HBT was observed and used to investigate breakdown uniformity. Using a simple punchthrough breakdown model, the theoretical breakdown curves at different collector doping concentrations and thicknesses were computed and found to be in agreement with maximum breakdown voltages measured from devices displaying the most uniform junction breakdown. The serious current gain degradation of GaAs/AlGaAs HBTs at low current densities was analyzed in connection with the measurement of a large collector-emitter breakdown voltage. The unexpected functional relationship between the collector-emitter breakdown voltage and collector-base breakdown voltage is explained by the absence of a hole-feedback effect for devices not exhibiting transistor action