The design and implementation of a multi‐wing chaotic attractor based on a five‐term three‐dimension system

The last two decades have seen great progress about the generation and circuit realization of multi‐wing chaotic attractor. In this paper, several multi‐scroll chaotic attractors are generated from a five‐term system by adding a piecewise linear function. Moreover, some basic properties in terms of symmetry and dissipation, equilibrium points, eigenvalues of the Jacobian matrices, Lyapunov exponent spectrum, bifurcation diagram, and Poincaré map are studied. In particular, an analog circuit is designed to implement the proposed multi‐scroll attractors, which are different from the traditional attractors. Furthermore, an integrated circuit diagram is designed to realize the fractional‐order multi‐scroll attractors. Finally, the performed experimental results confirm the theoretical analysis, and our work lends itself to many potential applications in engineering. Copyright © 2015 John Wiley & Sons, Ltd.     

On constructing complex grid multi‐wing hyperchaotic system: Theoretical design and circuit implementation

This paper further investigates some novel methods for generating complex grid multi‐wing hyperchaotic attractors from four‐dimensional (4D) quadratic hyperchaotic systems, based on our previous works. First, a modified double‐wing hyperchaotic Lü system by using non‐uniform variable scaling transformation is obtained, and n‐wing hyperchaotic system equipped with a duality‐symmetric multi‐segment quadratic function is also constructed. Then, by switching control in the z direction, mirror symmetry conversion and rotation transformation, three classes of n × m‐wing hyperchaotic systems are respectively realized. Finally, two types of improved module‐based circuits are designed for generating various grid multi‐wing hyperchaotic attractors. One characteristic of the proposed approaches lies in their generality, which is also suitable for constructing 4D grid multi‐wing hyperchaotic Lorenz and Chen systems. Both numerical simulation and circuit implementation have demonstrated the feasibility and effectiveness of the proposed approaches. Copyright © 2010 John Wiley & Sons, Ltd.     

Dynamics of the forced negative conductance series LCR circuit

In this paper, we make a revisit of a simple LCR circuit introduced earlier in 2005 by Thamilmaran et. al., and present the circuit simulation studies of its dynamics using the PSpice circuit simulator package. This is a simple sinusoidally forced series LCR circuit, employing an ordinary single PN junction diode in conjunction with a negative conductance as its nonlinearity. In circuit theoretic terms, this circuit is a modified form of the forced van der Pol type oscillator and is interesting because it exhibits a dual nature, namely, a forced van der Pol type circuit behaviour and an MLC circuit type behaviour for different parametric ranges. In addition, statistical studies have shown the circuit to possess strong chaoticity. Subsequent works on this circuit have shown the birth of strange nonchaos through four different routes, namely, the Heagy-Hammel route, gradual fractalization route, intermittency route, and Bubbling route. In lieu of these, we look at the circuit afresh and study its dynamics in an exhaustive manner. These studies reveal many new bifurcations and routes to chaos. These results have been verified using hardware experiments in addition to numerical computations.     

A pulsed power supply with sag compensation using controlled gradational voltage

A pulsed power supply with sag compensation using controlled gradational voltage to increase the flatness of output waveforms has been developed. The sag compensation circuit consists of compensation units connected in series. Each compensation unit consists of capacitances, diodes, and semiconductor switches. The capacitances of each unit are charged with different voltages by 2ⁿ(V₀,2V₀,4V₀,…). The compensation voltage, which has 2ⁿ?1 steps, is generated by switching the semiconductor switches of each unit in a binary sequence. Using this method, compensation voltage waveforms up to 6.2 kV with 31 steps can be obtained with five compensation units. The sag compensation circuit has been adapted to a direct switch‐type pulsed power supply, which generates 7 kV pulsed voltage with a pulse width of 700µs, thus realizing sag compensation. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 150(4): 54–63, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20017     

High-order non-linear circuit elements: Circuit-theoretic properties

Highei- and mixed-order non-linear circuit elements have been introduced to provide a logically complete formulation for non-linear circuit theory. In this paper, we analyse the circuit-theoretic properties of these elements, including reciprocity, passivity and losslessness. We have derived necessary and sufficient conditions for a higher- or mixed-order n-port element to be reciprocal or antireciprocal. We have shown that under very mild assumptions, most non-linear higher-order 2-terminal elements are active and not lossless. Finally, we show that the number of lossless linear higher-order 2-terminal elements far exceeds that of the passive linear elements.     

When is a device passive?

Passivity is perhaps the most basic concept in circuit theory. Unfortunately, the existing definitions of passivity are too restrictive and often contradict one another. In this paper, a new passivity definition is proposed which is applicable to all n-port and (n + 1)-terminal devices—including time-varying, non-linear, and distributed circuit elements. This definition generalizes and reconciles several recent conflicting definitions.     

Overvoltages caused by switching unloaded cable lines by a vacuum switch

The paper presents results of the studies on overvoltages generated while switching unloaded medium voltage (MV) power cable lines by a vacuum switch. The studies were carried out while switching real MV cable lines and their physical models. It has been found that overvoltages and overcurrents are generated during switching, and that under certain conditions they may reach significant values. These values depend on the source side circuit parameters, on kinematics vacuum switch parameters as well as on parameters of a switched cable line.Abbreviations AR Arc reignition - V_p Test voltages - t_bpn Time without current between subsequent ARs - k_szn Coefficient of ground overvoltage in the source side circuit after AR occurrence - k_swn Coefficient of ground overvoltage in the source side circuit after switching off n AR - k_czn Coefficient of overvoltage in the research circuit after AR occurrence - k_cwn Coefficient of overvoltage in the research circuit after switching off current of n AR - k_pcn Coefficient of overvoltage in the research circuit as an effect of overloading the capacity of the cable line or its physical model as a result of AR     

Sufficient conditions for the unique solvability of linear networks containing memoryless 2-ports

Combinatorial necessary and sufficient conditions for the unique solvability of linear networks containing n-ports are well known for the ‘general’ case. They are only necessary if relations among n-port parameters are also taken into consideration. In the present paper combinatorial sufficient conditions are presented for linear networks containing RLC elements and memoryless 2-ports. The somewhat surprising result is proved that whether a 2-port can cause certain types of singularities can be predicted before the interconnection. A concept, similar to the normal tree (which intersects ideal transformers by one, gyrators by two or no edges) is introduced for arbitrary 2-ports. Its existence implies unique solvability. Relations to previous results and algorithmical aspects are also discussed.     

Analysis and reduction of radiated EMI noise from converter systems

It is well known that high dv/dt rates on switching devices are the source of EMI noise. This paper describes a mechanism and reduction methods of radiated EMI noise on IGBTs. The radiated EMI noise is generated by oscillating current flowing through the IGBT's output capacity and the snubber circuit, which we call equivalent circuit of radiated EMI noise. The oscillating current of the equivalent circuit is forced to flow by high dv/dt rates of IGBT switching operation. Radiated EMI noise can be analyzed by frequency evolution of oscillating current. The results of this analysis show the relationship of high‐frequency impedance of the equivalent circuit to radiated EMI noise, as well as the behavior of the IGBT's switching voltage waveform. In addition, it is indicated that using a di/dt control gate drive circuit is effective as a means for reducing radiated EMI noise. It is clarified that the standard for industrial equipment of CISPR can be satisfied by using the proposed gate drive circuit. The effects of the method have been verified by experimental and simulational results. © 1999 Scripta Technica, Electr Eng Jpn, 130(1): 106–117, 2000     

Novel chaotic behavior in the Muthuswamy–Chua system using Chebyshev Polynomials

In this paper, three kinds of memristors with memristance functions obtained from the Chebyshev polynomials are used in the Muthuswamy–Chua system, which has only three circuit elements: a linear passive inductor, a linear passive capacitor and a nonlinear active memristor. We use multivariable second‐order polynomial functions of current and memristor state for the internal state function of the memristor. This enables our system to generate not only double‐scroll but also four‐scroll attractors. Systematic studies of chaotic behavior in these systems are performed using phase portraits, bifurcation diagrams and Lyapunov exponents. Simulation results show that all these systems exhibit chaotic behavior over a range of control parameters. Copyright © 2014 John Wiley & Sons, Ltd.     

Z Copy‐Controlled Gain‐Current Differencing Buffered Amplifier and its applications

The Z Copy‐Controlled Gain‐Current Differencing Buffered Amplifier (ZC‐CG‐CDBA) is introduced in the paper. In addition to the well‐known CDBA, the input Current Differencing Unit (CDU) is modified and completed by special circuits. Analogously to the conventional CDBA, the z terminal is internally connected to the input of voltage buffer. The current gain from the difference input p, n to the output z can be controlled electronically or by an external device. In addition, an independent high‐impedance output zc is available, providing difference current I_p?I_n. In the paper, the extension of application range of the ZC‐CG‐CDBA compared with the conventional CDBA is referred to. The novel circuit element is assembled from commercial integrated circuits and its principle is verified experimentally on a universal second‐order filter. Copyright © 2010 John Wiley & Sons, Ltd.     

Symmetry‐aware placement algorithm using transitive closure graph representation for analog integrated circuits

Recently several topological representations have been explored as alternatives to the conventional absolute‐coordinate representation for integrated circuit layout automation. Those topological representations, however, lack one or more aspects in capturing the solution space subject to symmetry constraints, which are abundant in analog layouts. In this paper, we explore the use of transitive closure graphs (TCGs) to represent analog placements, i.e. placements with symmetry constraints. We define a set of conditions so that a TCG satisfying these conditions, referred to as a symmetric‐feasible TCG, will correspond to a valid symmetric placement and vice versa. We then present an O(n²) algorithm, where n is the number of cells to be placed, to build a symmetric placement from a symmetric‐feasible TCG, a problem known as packing. We further describe a set of random perturbation operations on existing symmetric‐feasible TCGs to generate new symmetric‐feasible TCGs with time complexity of O(n) . This allows our TCG‐based symmetry‐aware analog placer to search only the symmetric‐feasible TCG solution space, leading to a substantial reduction of the search space and solution time. Experimental results on several analog circuits have confirmed the superiority of the TCG representation to the conventional absolute‐coordinate representation as well as several other topological representations in analog layout design. Copyright © 2008 John Wiley & Sons, Ltd.     

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

An ultralow power CMOS voltage reference for body implantable devices is presented in this paper. The circuit core consists of only regular threshold voltage PMOS transistors, thus leading to a very reduced output voltage dispersion, defined as σ/μ, and extremely low power consumption. A mathematical model of the generated reference voltage was obtained by solving circuit equations, and its numerical solution has been validated by extensive electrical simulations using a commercial circuit simulator. The proposed solution incorporates a passive RC low-pass filter, to enhance power supply rejection (PSR) over a wide frequency range, and a speed-up section, to accelerate the switching-on of the circuit. The prototype was implemented in 0.18 μm standard CMOS technology and is able to operate with supply voltages ranging from 0.7 to 1.8 V providing a measured output voltage value of 584.2 mV at the target temperature of 36° C. The measured σ/μ dispersion of the reference voltage generated is 0.65% without the need of trimming. At the minimum supply of 0.7 V, the experimental power consumption is 64.5 pW, while the measured PSR is kept below –60 dB from DC up to the MHz frequency range.     

Linear bipolar OTAs employing exponential‐law circuits

This paper presents design of linear bipolar OTAs, which are composed of two function blocks; one is an exponential‐law circuit and the other is a core cell. Multi‐tanh cells are employed as the core cell. This kind of OTA has lower power dissipation relatively to the conventional multi‐tanh cell. According as the order of the multi‐tanh core cell becomes higher, the number of circuit realization for the core cell increases. For example, we have two OTAs for the core circuit of an emitter‐coupled pair and four OTAs for the doublet core cell. Thus, we consider the generalized OTAs for an arbitrary order n of the core cell and obtain a formula to give the realization number of the linear OTAs for n. According to the formula, there must be eight OTAs in the case of n=3. All of the eight OTAs are examined. Analysis and simulation results show that the OTAs have advantage in their characteristics, such as linear input range, power dissipation, noise, and frequency response. Copyright 2004 John Wiley & Sons, Ltd.     

Realization of a general all‐pole current transfer function by using CBTA

In this article, a general all‐pole current transfer function synthesis procedure using current backward transconductance amplifiers (CBTAs) is proposed. The proposed configuration uses n current backward transconductance amplifiers and n grounded capacitors as the only type of passive elements. The circuit is eligible to realize any all‐pole transfer characteristics with a given strictly Hurwitz (stable) denominator polynomial. Further, it is straightforward to find the values of the passive elements from the coefficients of this polynomial by using the Routh–Hurwitz algorithm as in the realization of a two‐element kind passive network synthesis. In this sense and as far as the author's knowledge, it is the only active structure that can be synthesized like a passive two‐element kind Cauer circuit. The simulations that are performed using PSPICE exhibit satisfactory results coherent with the theory. Copyright © 2011 John Wiley & Sons, Ltd.     

Rectifier circuits for optimal frequency conversion

It is proved that a circuit consisting of non-linear passive resistances and of any linear invariant passive elements cannot convert power from frequencies ω₁ and ω₂ into power at frequency mω₁ + nω₂ with an efficiency better than 1/(|m| + |n|)². Circuits attaining that efficiency are constructed for all m, n, so that the condition is both necessary and sufficient. For m = μt, n = vt, |μ| + |v| = 2^s (all literals are integers), the optimal circuit consists of a finite number of rectifiers and tuned circuits. For values of m, n that are not of the above form an infinite number of tuned circuits is necessary, but an efficiency better than 93 per cent of the optimum is attainable by simple finite circuits in all cases.     

A note on high-Q active networks

Levi's and Zeheb's approach for approximating a high-Q second-order section by n sections with lower Q's is compared with the optimal solution of this problem proposed by Khazanov. Tables relating the maximum error in the approximation to the values of n and the achievable Q-reduction (QR) are also given. They should prove useful to the designer. Finally, some comments on sensitivities are added.     

Generating 2n‐wing attractors from Lorenz‐like systems

In this paper, the existence of 2n‐wing chaotic attractors in a family of Lorenz‐like systems is confirmed by both numerical simulation and circuit realization. By replacing a nonlinear cross‐product or square term in an original Lorenz‐like system with a newly designed multi‐segment quadratic function, multi‐wing attractor can be generated. The main design idea is to increase the number of index‐2 equilibrium points of the system. This approach can not only generate multi‐wing attractors in different Lorenz‐like systems, but can also allow the flexibility in specifying a precise number of wings to be created. Copyright © 2008 John Wiley & Sons, Ltd.     

Resistance and capacitance of 4 × n cobweb network and two conjectures

A classic problem in electric circuit theory studied by numerous authors over 160 years is the computation of the resistance between two nodes in a resistor network, yet some basic problem in m × n cobweb network is still not solved ideally. The equivalent resistance and capacitance of 4 × n cobweb network are investigated in this paper. We built a quaternion matrix equation and proposed the method of matrix transformations in terms of the network analysis. We proposed a brief equivalent resistance formula and find that the equivalent resistance is expressed by cos(kπ/9) in a series of strict calculation. Meanwhile, an equivalent resistance of infinite networks is gained. Using the inverse mapping relation between capacitance parameters and resistance parameters, the equivalent capacitance formula is also given for the 4 × n capacitance cobweb network. By analyzing and comparing the equivalent resistances of the 1 × n, 2 × n, 3 × n and 4 × n cobweb networks, two conjectures on the equivalent resistance and capacitance of the m × n cobweb network are proposed. Copyright © 2013 John Wiley & Sons, Ltd.     

Switched capacitor circuit for 1/f noise generation using a power-law circuit

A simple switched capacitor (SC) circuit is given which realizes a one-dimensional discrete dynamical system X_n+1 = X_n + ux^z generating intermittent chaos with a 1/f-shaped power spectrum. an integrated circuit with a pair of logarithmic and antilogarithmic amplifiters can easily realize the power-law term x^z which plays a key role in generating l/fnoise. an inevitable small offset voltage ? in the SC circuit governs the cut-off frequency of 1/f noise, and when the dynamical system is modified by introducing an effective ?, the ‘indirect method’ enables us to get the precise power spectrum in the modified system.