Electrothermal investigation of the switching effect in p-Type TllnSe2, TllnTe2, and TIGaTe2 chain chalcogenide semiconductors

Large p-type TlInSe₂, TlInTe₂, and TlGaTe₂ single crystals have been grown by the Bridgman-Stockbarger method, starting from stoichiometric melts. The first observations of the switching process in p-type TlGaTe₂ single crystal are reported. Current-voltage (I-V) characteristics of symmetrical In/p-TlInSe₂/In, In/p-TlInTe₂/In, and In/p-TlGaTe₂/In structures exhibit two distinct regions: an ohmic region at low current densities and nonlinear regions (S-shape) having negative differential resistance (NDR) at moderate and higher current densities. An electrothermal model was used to explain the nonlinear behavior. The nonlinear behavior of the I–V curves was studied at different ambient temperatures in the 100–340K region; the sample temperature and the threshold voltage of the NDR region were examined as a function of the current density and the ambient temperature, respectively. The electrothermal model is a satisfactory explanation.     

Memory Switching Characteristics in Amorphous Ga<Subscript>2</Subscript>Se<Subscript>3</Subscript> Films

Ga₂Se₃ films were deposited by the thermal evaporation of the bulk material onto pyrographite substrates under vacuum. The I–V characteristic curves were found to be typical for a memory switch. They exhibited a transition from an ohmic region in the lower-field region to a non-ohmic region in the high-field region in the preswitching region, which has been explained by the Poole–Frenkel effect. The temperature dependence of the resistance in the ohmic region was found to be that of a thermally activated process. It was also found that the mean value of the switching voltage increased linearly with increasing film thickness in the range from 291 nm to 516 nm, while it decreased exponentially with increasing temperature in the range from 298 K to 393 K. The results were explained in accordance with the electrothermal model for the switching process.     

Design and characterization of the negative differential resistance circuits using the CMOS and BiCMOS process

We investigate four novel negative-differential-resistance (NDR) circuits using the combination of the standard Si-based n-channel metal-oxide-semiconductor field-effect-transistor (NMOS) and SiGe-based heterojunction bipolar transistor (HBT). By suitably designing the parameters, we can obtain the Λ- or N-type current–voltage (I–V) curve. Especially, the peak current of the combined I–V curve could be easy adjusted by the external voltage. In application, we utilize the NDR circuit to design an inverter circuit based on the monostable–bistable transition logic element. The fabrication of these NDR circuits and applications could be completely implemented by the simple and standard Si-based CMOS or SiGe-based BiCMOS process without using the complex and expensive process such as metalorganic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).     

Electrical switching in single crystal VO2

I–V characteristics of single crystal vanadium dioxide has been measured using a constant current source in the ambient temperature region 220–325°K. The temperature of the crystal surface has also been measured. It is observed that the switching voltage (V_th) increases but the current at switching (I_th) decreases with decreasing temperature, giving a temperature independent threshold power (V_th × I_th). At switching, the temperature of the crystal surface increases only by 3–6°K above ambient for different ambient temperatures. These results can be qualitatively explained by assuming that a filament (channel) is formed before switching. The switching occurs when the temperature of this filament of finite width approaches the semiconductor-metal transition temperature. The initial width of the channel at switching decreases with decreasing temperature and at a given ambient temperature the channel width increases with increasing current in the post breakdown region.     

MWIR and LWIR HgCdTe Infrared Detectors Operated with Reduced Cooling Requirements

In this work, we analyze Auger suppression in HgCdTe alloy-based device structures and determine the operation temperature improvements expected when Auger suppression occurs. We identified critical material (absorber dopant concentration and minority-carrier lifetime) requirements that must be satisfied for optimal performance characteristics. Calculated detectivity values of Auger-suppressed and standard double-layer planar heterostructure (DLPH) devices demonstrate consistently higher maximum background-limited temperatures over a range of cutoff wavelengths and generally higher detectivity values achieved by Auger-suppressed detectors. Furthermore, these devices can operate with comparable performance at up to 100 K higher than DLPH detectors operating at reference temperatures above 100 K. Results of these simulations demonstrate that Auger-suppressed detectors provide a significant advantage over DLPH devices for high-temperature operation and are a viable candidate for thermoelectrically cooled detectors. Experimental dark current–voltage (I–V) characteristics between 120 K and 300 K were fitted using numerical simulations. By fitting the temperature-dependent I–V experimental data, we determined that the observed negative differential resistance (NDR) is due to Auger suppression. More specifically, NDR is attributed to full suppression of Auger-1 processes and partial (~70%) suppression of Auger-7 processes. After Auger suppression, the remaining leakage current is principally limited by the Shockley–Read–Hall recombination component. Part of the leakage current is also due to a residual Auger-7 current in the absorber due to the extrinsic p-type doping level. Analysis and comparison of our theoretical and experimental device results in structures where Auger suppression was realized are also presented.     

Conductivity of Hg<Subscript>3</Subscript>In<Subscript>2</Subscript>Te<Subscript>6</Subscript> crystals in high electric fields

The effect of electric field and temperature on the conductivity of bulk Hg₃In₂Te₆ crystals is investigated. It is shown that the I–V characteristics in high electric fields are of the S type with the effect of switching into a low-resistance state. The critical voltage of transition from the Ohm law to the exponential dependence of the current (I) on the voltage (U) and the threshold voltage of transition into the region of negative differential resistance dU/dI = s< 0 linearly depend on the sample thickness. The activation energies of conductivity in low and high electric fields are determined. It is established that the superlinear portion of the I–V characteristic with dU/dI > 0 is described by the dependence of the type I = I ₀ exp(U/U ₀) and caused by the electron transitions from the local centers with the energy level E _t = 0.19 eV.     

Device Characteristics of GaInSb/AlGaSb Quantum Well Lasers Monolithically Grown on GaAs Substrates by Using an Interfacial Misfit Array

We report the device characteristics of GaInSb/AlGaSb quantum well (QW) lasers monolithically grown on GaAs substrates by using an interfacial misfit (IMF) array. The IMF array localized at the GaSb/GaAs interface can accommodate the 7.8% lattice mismatch between GaAs substrates and GaSb buffer layers, resulting in the formation of a GaSb buffer with a very low defect density on GaAs substrates. Top-top and top-bottom metal contact methods are applied to the Ga_0.9In_0.1Sb/GaSb QW edge-emitting lasers monolithically grown on GaAs substrates for characterizing current–voltage (I–V) and output power–current (L–I) curves. The potential drop at the IMF array of ~0.7 V is elucidated by comparing I–V characteristics with these two contact methods. L–I characteristics and electroluminescence spectra shows room-temperature lasing at 1.83 μm from a 1.25-mm-long top-top contact device containing six-layer Ga_0.9In_0.1Sb QWs with a threshold current density (J _th) of 860 kA/cm². This IMF technique will enable a wide range of lasing wavelengths from near- to mid-wavelength infrared regimes on a GaAs platform.     

Characterization by Internal Photoemission Spectroscopy of Single-Crystal CVD Diamond Schottky Barrier Diodes

Internal photoemission spectroscopy measurements have been performed to study the electrical characteristics of Schottky diodes on boron-doped single-crystalline chemical vapor deposited (SC-CVD) diamond. These measurements were compared with current–voltage (I–V) and current–temperature (I–T) measurements. Schottky contact barrier heights and ideality factors have been measured on Schottky contacts formed on four samples with Au, Ni, and Al contact metallizations. I–V and I–T measurements were performed in the temperature range from 300 K to 500 K. The internal photoemission method, which is less influenced by local variations in the Schottky barrier height than the other two methods, yielded the highest values of Schottky barrier heights to p-type material: Φ_B = 1.78 eV to 2.10 eV, depending on the choice of contact metal and sample boron concentration.     

I-V characteristics of high-voltage 4H-SiC diodes with a 1.1-eV Schottky barrier

The I-V characteristics of high-voltage 4H-SiC diodes with a Schottky barrier ∼1.1 eV in height are measured and analyzed. The forward I-V characteristics proved to be close to “ideal” in the temperature range of 295–470 K. The reverse I-V characteristics are adequately described by the model of thermionic emission at the voltages to 2 kV in the temperature range of 361–470 K if, additionally, a barrier lowering with an increase in the band bending in the semiconductor is taken into account.     

A 1.8-V 0.7 ppm/°C high order temperature-compensated CMOS current reference

A high order curvature compensation technique for current reference generator which exploits the I–V characteristic of MOS to achieve I _SC (T ^m ) (m ≥ 2) is described. I _SC (T ^m ) is a self-compensated current which corrects its negative three-order TC (Temperature Coefficient) and linear TC by itself. Then, I (T ²) is achieved also by exploiting the I–V characteristic of MOS, for correcting the other negative high order parts of I _SC (T ^m ). This circuit operates on a 1.8 V power supply and is compatible with a standard n-well 0.5-μm digital CMOS process. The circuit realizes a temperature coefficient of 0.7 ppm/°C, a deviation of the simulated output current of 0.011% from −20°C to + 150°C and 97.5 dB PSRR through HSPICE simulation.     

Detailed Analysis of Temperature Characteristics of an InGaP/InGaAs/Ge Triple-Junction Solar Cell

Temperature characteristics of an InGaP/InGaAs/Ge triple-junction solar cell were analyzed in detail using an equivalent circuit calculation. The current–voltage (I–V) characteristics of single-junction solar cells (InGaP, InGaAs, Ge solar cells) were measured at various temperatures. Fitting of I–V curves between measured and calculated data was carried out, and the diode parameters and temperature exponents of the single-junction solar cells were extracted. The parameters for each single-junction solar cell were used in the equivalent circuit model for the triple-junction solar cell, and calculations of solar cell performance were carried out. Measured and calculated results of the I–V characteristics at various temperatures agreed well.     

Ultraviolet Photodetection Properties of a Pt Contact on a Mg<Subscript>0.1</Subscript>Zn<Subscript>0.9</Subscript>O/ZnO Composite Film

We report on the ultraviolet (UV) photodetection properties of a Pt contact on a sol-gel Mg_0.1Zn_0.9O/ZnO composite structure on a glass substrate. In the dark, the current–voltage (I–V) characteristics between the Pt and Ag contacts on the top of the ZnO film were linear while that on the Mg_0.1Zn_0.9O/ZnO composite film were rectifying, suggesting the formation of a Schottky diode on the latter. The ideality factor, n, and the reverse leakage current density, J _R , of the Schottky diode were greater than 2 and 2.36 × 10⁻² A cm⁻² at −5 V, respectively. Under ultraviolet light, the I–V characteristics become linear. The maximum photo-to-dark current ratio observed was about 63. The composite film showed good sensitivity to UV light with wavelengths of less than 400 nm, though the photoresponse process was found to be slow.     

Nature of E c −0.37 eV centers and the formation of high-resistivity layers in n-type silicon

The DLTS and Van der Pauw methods are used to investigate the production of E _c −0.37 eV centers responsible for the formation of high-resistivity layers in n-type Si irradiated with electrons and annealed in the temperature range 80–320 °C. An analysis of the experimental data leads to a conclusion as to the composition of the E _c −0.37 eV centers ([V-O-C]) and to the conclusion that their formation is stimulated by a flux of interstitial atoms away from the interface into the interior of the semiconductor during annealing accompanied by the reactions: 1) I+C_s→C_i,C_i+[V-O]→[V-O-C] (dominant reaction); 2) I+V ₂→V,V+[C-O]→[V-O-C]. Fiz. Tekh. Poluprovodn. 31, 993–997 (August 1997)     

Influence of deep traps on current transport in Pd-p(n)-CdTe structures

The current-voltage characteristics and photovoltage of Pd-p(n)-CdTe structures and changes in them produced by pulsed hydrogen treatment have been investigated. The current transport in Pd-n-CdTe structures [I∼exp(αV)] is found to be linked with double injection of carriers occurring as a result of their capture at trapping centers that are uniformly distributed over energy. The semiconductor regime of double injection with I∼V ² is important for Pd-p-CdTe structures. A series of deep trapping centers, including those in the interval 0.75–0.83 eV, is responsible for the extended relaxation of the photovoltage and dark current after a hydrogen pulse (H₂). Fiz. Tekh. Poluprovodn. 33, 492–493 (April 1999)     

MBE-Grown II–VI and Related Nanostructures

Nanostructures of II–VI semiconductor materials could potentially offer novel and superior physical (in particular, optoelectronic) properties with respect to their bulk counterparts. Herein, we present our most recent research on several II–VI and related nanostructures grown by molecular beam epitaxy (MBE) technique. These include a ZnSe nanograting. This nanograting structure was realized at the surface of Fe/ZnSe bilayers grown on GaAs(001) substrates by thermal annealing. A model based on an Ewald construction is presented to explain its unusual reflection high-energy electron diffraction (RHEED) patterns. The formation mechanism of this one-dimensional (1D) nanostructure is possibly related to surface energy minimization, together with an Fe–Se exchange interaction and Fe-induced decomposition of several top ZnSe atomic layers during thermal annealing. Another nanostructure investigated was the ZnS Schottky barrier embedded with Fe quantum dots (QDs). Here, a Au/ZnS/Fe-QDs/ZnS/n ⁺-GaAs(100) Schottky barrier structure containing five layers of spherical Fe quantum dots with a diameter of ~3 nm was fabricated. Its I–V characteristic measured from 5 K to 295 K displays negative differential resistance (NDR) for temperature ≤50 K. Staircase-like I–V characteristics were also observed at low temperature in some devices fabricated from this structure. Possible mechanisms that can account for the observed unusual I-V characteristic in this structure are presented. Finally, laterally grown Fe nanowires (NWs) on a ZnS surface were prepared. Under high growth/annealing temperature, two types of Fe NWs with specific orientations can be grown on the ZnS(100) surface. We propose a mean-field model that the torque exerted by type A Fe NWs could effectively turn the two components of type B Fe NWs slightly toward the ZnS [110] direction, leading to the observed misalignment of type B Fe NWs.     

Impact of Bi Deficiencies on Ferroelectric Resistive Switching Characteristics Observed at p‐Type Schottky‐Like Pt/Bi1–δFeO3 Interfaces

This work reports a resistive switching effect observed at rectifying Pt/Bi_1–δFeO₃ interfaces and the impact of Bi deficiencies on its characteristics. Since Bi deficiencies provide hole carriers in BiFeO₃, Bi‐deficient Bi_1–δFeO₃ films act as a p‐type semiconductor. As the Bi deficiency increased, a leakage current at Pt/Bi_1–δFeO₃ interfaces tended to increase, and finally, rectifying and hysteretic current–voltage (I–V) characteristics were observed. In I–V characteristics measured at a voltage‐sweep frequency of 1 kHz, positive and negative current peaks originating from ferroelectric displacement current were observed under forward and reverse bias prior to set and reset switching processes, respectively, suggesting that polarization reversal is involved in the resistive switching effect. The resistive switching measurements in a pulse‐voltage mode revealed that the switching speed and switching ratio can be improved by controlling the Bi deficiency. The resistive switching devices showed endurance of >10⁵ cycles and data retention of >10⁵ s at room temperature. Moreover, unlike conventional resistive switching devices made of metal oxides, no forming process is needed to obtain a stable resistive switching effect in the ferroelectric resistive switching devices. These results demonstrate promising prospects for application of the ferroelectric resistive switching effect at Pt/Bi_1–δFeO₃ interfaces to nonvolatile memory.     

Conduction mechanism of an infrared emitting diode: Impedance spectroscopy and current-voltage analysis

The bias dependent complex impedance spectra of a conventional GaAs based infrared emitting diode have been studied in the temperature range 150–300 K. It is found that for bias voltages lower than 0.7 V, the device behaves like a pure capacitor. However for V _dc ≥ 0.7 V, an equivalent circuit model composed of a parallel resistor (R _p ) and capacitor (C _p ) network connected with a series resistance (R _s ) can be used to describe the individual impedance contributions from interfacial and bulk regions of the diode. Fitting of experimental data to the proposed ac model reveal that the value of parallel device capacitance C _p increases with temperature whereas the parallel resistance R _p component decreases. The tendency of parallel resistance and parallel capacitance as a function of temperature is expected that thermally activated current transport mechanism dominates in the forward bias, which coincides with the analysing results of the dark forward current-voltage (I–V) characteristics. The temperature dependent I–V variations suggest that recombination in the depletion region has a paramount role.     

Vertical Transport in GaN/AlGaN Resonant Tunneling Diodes and Superlattices

Using the transfer matrix formalism, we have theoretically studied the vertical ballistic transport in GaN/AlGaN resonant tunneling diodes (RTDs) and superlattices with a small number of periods. We have calculated the transmission probability versus the longitudinal electron energy (T–E) and the current density–voltage (J–V) characteristics. Calculations of both T–E and J–V characteristics have been performed for different Al contents in the barriers. The asymmetry effects due to the internal electric field in the barriers are discussed. Applied to the RTD structure, our calculations demonstrate: (i) the increase of the peak-to-valley ratio of the negative differential resistance (NDR) with increasing Al content in the barriers, (ii) the dependence of the J–V resonance values on the current direction, and (iii) the asymmetry of the NDR with respect to the current direction due to the huge internal electric field in the structure. In the case of multiple quantum well structure (MQWS), the calculation results confirm the same trends as in the RTD case when the Al content is varied. In spite of the fact that it is more difficult to analyze the results in the case of MQWS, the obtained calculations demonstrate the applicability of the used model and of the numerical method to study GaN/AlGaN devices based on quantum well (QW) heterostructures. Furthermore, a design of an optimized 7QW structure operating symmetrically whatever the direction of the applied voltage is presented.     

Defect centroid,patial distribution,and areal density in process-induced radiation-damaged IGFETs with gate insulators grown at 1000 and 800° C

IGFET devices were fabricated with “dry” gate oxides grown at 1000 and 800° C in the thickness range 5–50 nm. They were then exposed in an electrically unbiased state to Al K_α x-ray (1.49 keV) radiation to simulate process-induced ionizing radiation exposure. Gate oxide defects were measured before and after irradiation using optically assisted electron injection. Following irradiation and injection, the measured voltage shifts indicate that radiation-induced “extrinsic” defects are localized near, but not exactly at, the Si/SiO₂ interface.ΔV _T is found to be linear int _ox for oxide thicknesses where the top electrode resides above the defect region, and quadratic int _ox for thicknesses where the top electrode encroaches upon the defect region. For very thin oxides,ΔV _T is observed to approach zero. Application of a defect distribution model based on this behavior reveals that the oxidation temperature does not influence the distribution of radiation-induced defects, but does influence their concentration; with the 800° C oxides always containing more defects than the 1000° C oxides. A gate oxide thickness regime of less than 5-6 nm is identified in which radiation-induced threshold voltage shifts are observed to approach zero.     

Anomalous Peak in the Forward-Bias <Emphasis Type="Italic">C</Emphasis>–<Emphasis Type="Italic">V</Emphasis> Plot and Temperature-Dependent Behavior of Au/PVA (Ni,Zn-doped)/<Emphasis Type="Italic">n</Emphasis>-Si(111) Structures

In this study, the temperature-dependent mean density of interface states (N_SS)(N_{\rm SS}) and series resistance (R_S)(R_{\rm S}) profiles of Au/PVA (Ni,Zn-doped)/n-Si(111) structures are determined using current–voltage (I−V) and admittance spectroscopy [capacitance–voltage (C–V) and conductance–voltage G/ω–V] methods. The other main electronic parameters such as zero-bias barrier height (F_B0)(\Phi_{{\rm B}0}), ideality factor (n), and doping concentration (N _D) are also obtained as a function of temperature. Experimental results show that the values of F_B0\Phi_{\rm{B}0}, n, R _S, and N _SS are strongly temperature dependent. The values of F_B0\Phi_{\rm{B}0} and R _S increase with increasing temperature, while those of n and N _SS decrease. The C–V plots of Au/PVA (Ni,Zn-doped)/n-Si(111) structures exhibit anomalous peaks in forward bias (depletion region) at each temperature, and peak positions shift towards negative bias with increasing temperature. The peak value of C has been found to be strongly dependent on N _SS, R _S, and temperature. The experimental data confirm that the values of N _SS, R _S, temperature, and the thickness and composition of the interfacial polymer layer are important factors that influence the main electrical parameters of the device.