Multiple-output all-optical header processing technique based ontwo-pulse correlation principle

A serial all-optical header processing technique based on a two-pulse correlation principle in a semiconductor laser amplifier in a loop mirror (SLALOM) configuration that can number of output ports is presented. The demonstrated experimentally at a 10 Gbit/s Manchester encoded data stream. Experimental evidence is provided in the case of two different output ports     

基于SOA-XPM的光数据包信息头提取

提出一种新型光数据包结构,给出基于该结构的光数据包的组包和信息头提取方案.设计了基于SOA-XPM的全光逻辑与门,利用该与门在2.5Gbit/s的传输速率下对光数据包信息头提取方案进行了数值模拟.结果表明,采用该结构的光数据包具有信息头内容提取容易的优点,适合在全光交换网络中传输.     

Optical packet switching and buffering by using all-optical signal processing methods

We present a 1 /spl times/ 2 all-optical packet switch. All the processing of the header information is carried out in the optical domain. The optical headers are recognized by employing the two-pulse correlation principle in a semiconductor laser amplifier in loop optical mirror (SLALOM) configuration. The processed header information is stored in an optical flip-flop memory that is based on a symmetric configuration of two coupled lasers. The optical flip-flop memory drives a wavelength routing switch that is based on cross-gain modulation in a semiconductor optical amplifier. We also present an alternative optical packet routing concept that can be used for all-optical buffering of data packets. In this case, an optical threshold function that is based on a asymmetric configuration of two coupled lasers is used to drive a wavelength routing switch. Experimental results are presented for both the 1 /spl times/ 2 optical packet switch and the optical buffer switch.     

Demonstration of optical label processing with timing pulse generator

A timing pulse generator that extracts the first pulse of a packet and uses it in a pattern-matching optical label processor is proposed. The label processor is demonstrated in a 1/spl times/2 optical packet switching system. The packet switching system operation was polarisation independent for 10 Gbit/s packets.     

All-optical header processing system based on time-to-wavelength conversion for pure DPSK packets

Presented is a novel asynchronous all-optical header processing system for pure DPSK packets based on time-to-wavelength conversion of the header information that requires only four optical functions independently of the number of headers. Experimental results at 12.5 Gbit/s demonstrate that four DPSK headers are distinguished at four distinct outputs. The system requires low optical power, is highly scalable, and allows for potentially high-speed operation and photonic integration in a single chip.     

A packet header recognition assigning the position of a signal inthe time axis and its application to all-optical self-routing

We describe an all-optical circuit that recognizes by a packet the header [virtual channel identifier (VCI): 16 bits and virtual path identifier (VPI): 8 bits] extracted from a cell for self-routing. The circuit's operation is confirmed by an experiment in the recognition of four header bits, and an all-optical routing experiment is carried out with a sequence of four cells, which are composed of two header bits. The output from the header recognition circuit appears in a signal assigned In the time axis according to the header information. The signal controls the switch in the switching system. The proposed header recognition and self-routing circuits are successfully demonstrated by the experiments     

利用TOAD实现全光逻辑操作的实验研究

未来的全光分组交换网中,全光逻辑操作将起到至关重要的作用。在对太赫兹光非对称解复用器(TOAD)进行详尽理论分析的基础上,提出了基于TOAD实现的全光与门、全光或门方案,并对这些方案进行了20Gbit／s的实验验证,讨论了实验结果。     

First demonstration of simultaneous demultiplexing from 40 Gbit/sinto two channels of 20 Gbit/s by SOA-based all-optical polarisationswitch

Simultaneous demultiplexing from 40 Gbit/s data signal into two channels of 20 Gbit/s using semiconductor optical amplifier (SOA) based all-optical polarisation switch has been demonstrated. Error-free operation was confirmed with no power penalty. This is the first experimental demonstration to prove the full-switching capability of the SOA-based Mach-Zehnder interferometer (MZI) all-optical switch at such a high bit rate regime     

一种基于改进TOAD结构的全光分组信头提取方案

文中提出了一种基于改进的太赫非对称光解复用器（TOAD：Terahertz Optical Asymmetric Demultiplexer）结构和差分调制的方案,用以完成光分组交换网络中的全光分组级信头提取。分组包中信头与净荷的速率分别为2．5Gbit／s和40Gbit／s。经数值仿真得到系统对信头和净荷的开关比可达15dB以上。此外,还具体讨论了SOA-TOAD的系统参数对性能的影响,从而得到使其性能优化的系统参数。     

Investigation of all-optical error detection circuit using SOA-MZI-based XOR gates at 10 Gbit/s

The operation of an all-optical error detection circuit consisting of an all-optical exclusive OR (XOR) gate for an encoder and two-stage all-optical XOR gates for a decoder using SOA-MZIs has been investigated. 10 and 40 Gbit/s operation of all-optical XOR gates were obtained. Error signals in the syndrome at 10 Gbit/s based on the all-optical XOR gates were achieved for the first time.     

Demonstration of 20 Gbit/s all-optical logic XOR in integratedSOA-based interferometric wavelength converter

The results of optical logic exclusive-OR (XOR) at up to 20 Gbit/s in an integrated SOA-based Mach-Zehnder interferometer are presented. For the first time, to the knowledge of the authors, BER measurements are demonstrated on 10 Gbit/s optical logic XOR, with zero penalty. In addition. For the first time 20 Gbit/s all-optical XOR, with an integrated device that allows simple, stable, and efficient operation, is demonstrated     

Demonstration and performance analysis for the off-ramp portion ofan all-optical access node

Ultrafast processing of packets is demonstrated and the performance analyzed for the off-ramp portion of an all-optical access node. The off-ramp consists of synchronized fiber lasers driving an all-optical header processor that includes nonlinear optical loop mirrors (NOLM), electrooptic router, and demultiplexer in the form of a two-wavelength NOLM. We achieve switching contrasts of 10:1 for the header processor and demultiplexer with switching energies of 10 pJ and 1 pJ, respectively. Also, a proposed measurement technique to obtain eye diagrams is used to analyze the all-optical header processor using the synchronized lasers. Using this technique, we obtain an eye diagram with a Q value of 7.1±0.36, which corresponds to a worst case BER value of 8.8×10^-12 for a 95% confidence level. Finally, simulation models are used to verify and compare the experimental results, and we find good agreement. We also use the model to study the various causes for the degradation of the Q value through our system     

All-Optical-Packet Header and Payload Separation for Unslotted Optical-Packet-Switched Networks

A novel all-optical header and payload separation technique that can be utilized in unslotted optical-packet-switched networks is proposed. The technique uses two modified terahertz optical asynchronous demultiplexers: One is for packet header extraction with differential modulation scheme, and the other performs a simple XOR operation between the packet and its self-derived header to get the separated payload. The main virtue of this system is simple structure and low-power consumption. Through numerical simulations, the operating characteristics of the scheme are illustrated. In addition, the parameters of the system are discussed and designed to optimize the performance of the scheme.     

基于级联半导体光放大器实现全光逻辑与门的改进方案

基于级联半导体光放大器(SOA)实现全光逻辑与门的方案中,第一级输出信号质量直接影响逻辑与运算结果.采用载流子恢复较慢的体材料半导体光放大器用于第一级转换,在10 Gbit/s以上得不到理想的转换结果,限制了该方案实现逻辑与门的速率.利用光纤延时干涉仪(DI)和第一级半导体光放大器级联可以改善第一级输出信号质量,从而有效提高第二级全光逻辑与门的实现速率.阐述了改进方案中延时干涉仪的作用,并进行了数值模拟.根据实验结果,采用载流子恢复较慢的半导体光放大器级联延时干涉仪能够实现高速归零(RZ)信号和非归零(NRZ)信号的反码,从而得到较高速率的全光逻辑与门.实验实现了20 Gbit/s的伪随机归零和非归零信号的全光逻辑与门,对40 Gbit/s的结果进行了分析和讨论.     

All-optical label processor/erasure for label swapping of 12.5 Gbit/s spectrally separated bit-serial DPSK label and payload

A novel all-optical label processor/erasure for DPSK spectrally separated label and payload is demonstrated. Experimental results show the recognition of two different labels at 12.5 Gbit/s at distinct outputs, while the label is simultaneously erased allowing for a new label insertion. The low power and asynchronous label processor/erasure can be scaled to distinguish a larger number of labels, to operate at higher bit rate, and then can be potentially used in an optical label switching network.     

OPSnet: design and demonstration of an asynchronous high-speed optical packet switch

This paper presents the results of the optical packet switched network (OPSnet) project, which investigated the design of an asynchronous optical packet switch suitable for the core of an optical transport network (OTN). The requirements for the switch were to control and route variable-length packets transmitted at bit rates beyond 100 Gbit/s. The subsystems and techniques used are analyzed and presented. Fast header encoding and passive decoding is based on the differential phase-shift keying (DPSK) method. The dual-pump four-wave mixing (d-p FWM) wavelength-conversion technique, in combination with an arrayed waveguide grating (AWG), is utilized for packet switching. An advanced and fully controllable mechanism for the packet-switch control is presented, which is implemented on field programmable gate array (FPGA) technology. The control wavelength is generated using a tunable laser, the actual wavelength and new header values are provided utilizing fast header recognition and look-up tables. The integration of the subsystems is discussed, and the results of a four-output port asynchronous packet-switch demonstrator operating at 40 Gbit/s are presented. Finally, the switch limitations are examined and design issues are discussed.     

A Reconfigurable Optical Header Recognition System for Optical Packet Routing Applications

We demonstrate a reconfigurable all-optical packet processing system. The key device is a code-reconfigurable header decoder based on a fiber Bragg grating. The performance of the system is tested for different packet headers, and error-free operation is confirmed     

640 Gbit/s (64-Wavelength $,times,$10 Gbit/s) Data-Rate Wide-Colored NRZ-DPSK Optical Packet Switching and Buffering Demonstration

We demonstrated optical packet switching and buffering operation of a DWDM/NRZ-DPSK optical packet, whose payload-data-rate is 640 Gbit/s (64-wavelength$,times,$10 Gbit/s), for transparent optical packet switch systems for the first time. Error-free (bit-error-rate ${≪}10^{- 9}$) operation including 200-Gchip/s PSK optical label processing was achieved for all 64-wavelength-channel 10 Gbit/s DPSK packet-payloads. In addition, the higher tolerance of DPSK format for packet power fluctuation compared with OOK one was verified in an optical packet switch system.      

Optical signal processing based on self-induced polarization rotation in a semiconductor optical amplifier

We demonstrate novel optical signal processing functions based on self-induced nonlinear polarization rotation in a semiconductor optical amplifier (SOA). Numerical and experimental results are presented, which demonstrate that a nonlinear polarization switch can be employed to achieve all-optical logic. We demonstrate an all-optical header processing system, an all-optical seed pulse generator for packet synchronization, and an all-optical arbiter that can be employed for optical buffering at a bit rate of 10 Gb/s. Experimental results indicate that optical signal processing functions based on self-polarization rotation have a higher extinction ratio and a lower power operation compared with similar functions based on self-phase modulation.     

40 Gbit/s RZ wavelength converter in a monolithically integrated chip with a tunable laser

An all-optical wavelength-switch module with 40 Gbit/s capacity is integrated monolithically in InP. The device combines an SOA-based wavelength converter and a fast-tunable 8-channel multi-frequency laser. Error-free operation is demonstrated.