聚酰亚胺为栅绝缘层的并五苯场效应晶体管

以真空蒸发的有机半导体材料并五苯为有源层,以旋涂的聚酰亚胺作为栅绝缘层,以真空蒸发的Al为栅、源和漏电极,成功制作了顶接触式并五苯有机场效应晶体管(OFET).测试表明,在源漏电压为70 V时,器件的载流子迁移率μ为0.079 cm2/V·s,器件的开关电流比为1.7×104.     

Triacetate cellulose gate dielectric organic thin-film transistors

Here, we report on the performance and the characterization of all solution-processable top-contact organic thin-film transistors (OTFTs) consisting of a natural-resourced triacetate cellulose gate dielectric and a representative hole-transport poly[2,5-bis(3-dodecylthiophen-2-yl)thieno[3,2-b]thiophene] (pBTTT) semiconductor layer on rigid or flexible substrates. The bio-based triacetate cellulose layer has an important role in the OTFT fabrication because it provides the pBTTT semiconducting polymer with highly suitable gate dielectric properties including a low surface roughness, hydrophobic surface, appropriate dielectric constant, and low leakage current. The triacetate cellulose gate dielectric-based pBTTT OTFTs exhibit an average filed-effect mobility of 0.031 cm²/Vs similar to that obtained from a SiO₂ gate dielectric-based OTFT device in ambient conditions. Even after a bending stimulation of 100 times and in an outward bending state, the flexible triacetate cellulose gate pBTTT OTFT device still showed excellent electrical device performance without any hysteresis.     

The role of water in the device performance of n-type PTCDI-C8 organic field-effect transistors with solution-based gelatin dielectric

Gelatin is a natural protein, which works well as the gate dielectric for N,N-dioctyl-3,4,9,10-perylene tetracarboxylic diimide (PTCDI-C₈) organic field-effect transistors (OFETs). An aqueous solution process was applied to form the gelatin gate dielectric on poly(ethylene terephthalate) (PET) by spin-coating and subsequent casting. The field-effect mobility in the saturation regime (μ_FE,sat) and the threshold voltage (V_T) values of a typical 40 nm PTCDI-C₈ OFET are (0.22 cm² V⁻¹ s⁻¹, 55 V) in vacuum and (0.74 cm² V⁻¹ s⁻¹, 2.6 V) in air ambient. The maximum voltage shift in hysteresis is also reduced from 10 V to 2 V when the operation environment for PTCDI-C₈ OFETs is changed from vacuum to air ambient. Nevertheless, a slight reduction of electron mobility was found when the device was stressed in the air ambient. The change in the device performance has been attributed to the charged ions generation owing to water absorption in gelatin in air ambient.     

Materials and interfaces issues in pentacene/PTCDI-C8 ambipolar organic field-effect transistors with solution-based gelatin dielectric

Gelatin is a natural protein, which works well as the gate dielectric for pentacene/N,N-dioctyl-3,4,9,10-perylene tetracarboxylic diimide (PTCDI-C₈) ambipolar organic field-effect transistors (OFETs) in air ambient and in vacuum. An aqueous solution process was used to form the gelatin gate dielectric film on poly(ethylene terephthalate) (PET) by spin-coating and subsequent casting. Pentacene morphology and interface roughness are two major factors affecting the electron and hole field-effect mobility (μ_FE) values of pentacene/PTCDI-C₈ ambipolar OFETs in vacuum and in air ambient. In contrast, water absorption in gelatin has higher contribution to the electron and hole μ_FE values in air ambient. The ambipolar performance of pentacene/PTCDI-C₈ ambipolar OFETs depends on their layer sequence. For example, when PTCDI-C₈ is deposited onto pentacene, i.e. in the structure of PTCDI-C₈/pentacene, unbalanced ambipolar characteristics appear. In contrast, better ambipolar performance occurs in the structure of pentacene/PTCDI-C₈. The optimum ambipolar characteristics with electron μ_FE of 0.85 cm² V⁻¹ s⁻¹ and hole μ_FE of 0.95 cm² V⁻¹ s⁻¹ occurs at the condition of pentacene (40 nm)/PTCDI-C₈ (40 nm). Surprisingly, water absorption plays a crucial role in ambipolar performance. The device performance changes tremendously in pentacene/PTCDI-C₈ ambipolar OFETs due to the removal of water out of gelatin in vacuum. The optimum ambipolar characteristics with electron μ_FE of 0.008 cm² V⁻¹ s⁻¹ and hole μ_FE of 0.007 cm² V⁻¹ s⁻¹ occurs at the condition of pentacene (65 nm)/PTCDI-C₈ (40 nm). The roles of layer sequence, relative layer thickness, and water absorption are proposed to explain the ambipolar performance.     

Pentacene organic field-effect transistors with polymeric dielectric interfaces: Performance and stability

Low-voltage pentacene organic field-effect transistors (OFETs) with different gate dielectric interfaces are studied and their performance in terms of electrical properties and operational stability is compared. Overall high electrical performance is demonstrated at low voltage by using a 100 nm-thick high-κ gate dielectric layer of aluminum oxide (Al₂O₃) fabricated by atomic layer deposition (ALD) and modified with hydroxyl-free low-κ polymers like polystyrene (PS), divinyltetramethyldisiloxane-bis(benzocyclobutene) (BCB) (Cyclotene™, Dow Chemicals), and as well as with the widely used octadecyl-trichlorosilane (OTS). Devices with PS and BCB dielectric surfaces exhibit almost similar electrical performance with high field-effect mobilities, low subthreshold voltages, and high on/off current ratios. The higher mobility in pentacene transistors with PS can be correlated to the better structural ordering of pentacene films, as demonstrated by atomic force microscopy (AFM) images and X-ray diffraction (XRD). The devices with PS show good electrical stability under bias stress conditions (V_GS = V_DS = −10 V for 1 h), resulting in a negligible drop (2%) in saturation current (I_DS) in comparison to that in devices with OTS (12%), and to a very high decay (30%) for the devices with BCB.     

Pentacene organic thin-film transistors-molecular ordering andmobility

Pentacene-based organic thin-film transistors (TFT's) with field-effect mobility as large as 0.7 cm²/V·s and on/off current ratio larger than 10⁸ have been fabricated. Pentacene films deposited by evaporation at elevated temperature at low-to-moderate deposition rates have a high degree of molecular ordering with micrometer-sized and larger dendritic grains. Such films yield TFT's with large mobility. Films deposited at low temperature or by flash evaporation have small grains and poor molecular ordering and yield TFT's with low mobility     

基于聚合物电介质的并五苯场效应晶体管

采用顶接触结构分别在SiO2、聚甲基丙烯酸甲酯(PMMA)绝缘层上制备了以并五苯为有源层的两种有机场效应晶体管(OFET),其中SiO2绝缘层采用热生长法制备,PMMA绝缘层采用溶液旋涂法制备。与常规基于无机绝缘层的器件相比,采用聚合物为绝缘层后,不但器件的制作工艺简化和成本降低,而且器件性能大幅提高,经测试,器件的迁移率提到0.153cm2/Vs,而阈值电压降低6V。采用原子力显微镜(AFM)、X射线衍射(XRD)等对器件性能提高的原因进行了详细分析。     

High-mobility pentacene thin-film transistors with copolymer-gate dielectric

Pentacene thin-film transistors have been obtained using polymethyl-methacrylate-co-glyciclyl-methacrylate (PMMA-GMA) as the gate dielectric. The optimum active layer thickness in thin-film transistors (OTFTs) was investigated. The present devices show a wide operation voltage range. The on/off current ratio is as high as 10⁵. In linear region (), the field-effect mobility of device increases with the increase in gate field at low-voltage region (), and a mobility of 0.33 cm²/V s can be obtained when . In saturation region, the mobility increases linearly with the gate field, and a high mobility of 1.14 cm²/V s can be obtained at . The influence of voltage on mobility of device was investigated.     

Polycrystalline silicon films and thin-film transistors using solution-based metal-induced crystallization

Polycrystalline silicon (poly-Si) films consisting of dish-like and wadding-like domains were obtained with solution-based metal-induced crystallization (SMIC) of amorphous silicon. The Hall mobility of poly-Si was much higher in dish-like domains than in wadding-like domains. Thin-film transistors (TFTs) have been prepared using those two kinds of poly-Si films as the active layer, followed by the phosphosilicate glass (PSG) nickel gettering. The field effect mobility of dish-like domain poly-Si TFTs and wadding-like poly-Si TFTs were 70/spl sim/80 cm/sup 2//V/spl middot/s and 40/spl sim/50 cm/sup 2//V/spl middot/s, respectively. With a multi-gate structure, the leakage current of poly-Si TFTs was reduced by 1 to 2 orders of magnitude. In addition, the gate-induced drain leakage current (GIDL) and uniformity of the drain current distribution were also improved. P-type TFTs fabricated using SMIC exhibited excellent reliability.     

Pentacene-based organic thin-film transistors

Organic thin-film transistors using the fused-ring polycyclic aromatic hydrocarbon pentacene as the active electronic material have shown mobility as large as 0.7 cm²/V-s and on/off current ratio larger than 10⁸; both values are comparable to hydrogenated amorphous silicon devices. On the other hand, these and most other organic TFT's have an undesirably large subthreshold slope. We show here that the large subthreshold slope typically observed is not an intrinsic property of the organic semiconducting material and that devices with subthreshold slope similar to amorphous silicon devices are possible     

Facile polymer gate dielectric surface-modification for organic thin-film transistors using self-assembled surfactant layer

We demonstrate facile polymer gate dielectric surface-modification method for organic thin-film transistors (OTFTs). We simply introduce self-assembled surfactant layer onto the top surface of poly(4-vinylphenol) (PVP) dielectric by spin coating PVP solution mixed with sodium dodecyl sulfate and tridecafluorohexane-1-sulfonic acid potassium salt as additive agents. The surfactant-modified PVP layer acquires various merits compared to pristine PVP layer in terms of surface smoothness and hydrophobicity, as confirmed by contact angle measurement, atomic force microscopy analyses, grazing incident X-ray diffraction and near-edge X-ray absorption fine structure spectroscopy. The resulting OTFTs with the conventional semiconducting poly(2,5-bis(3-hexadecylthiophen-2-yl)thieno[3,2-b]thiophene) as the active layer and surfactant-modified PVP as the dielectric layer reveal overall ascendency over the OTFT with pristine PVP, especially in terms of operating hysteresis and reliability. The effects of hydrophobicity of surfactants on the surface properties of PVP as well as the OTFT performances are fully discussed in conjunction with various characterization tools.     

Ta2O5 as gate dielectric material for low-voltage organic thin-film transistors

In this paper we report the use of Ta₂O₅ as gate dielectric material for organic thin-film transistors. Ta₂O₅ has already attracted a lot of attention as insulating material for VLSI applications. We have deposited Ta₂O₅ thin-films with different thickness by means of electron-beam evaporation. Being a relatively low-temperature process, this method is particularly suitable for organic thin-film transistor fabrication on plastic substrates. Deposition and patterning are achieved in one step by the use of shadow masks. The dielectric can be evaporated on top of the semiconducting layer. In this way a large variety of structures can be realized. Poly(3-hexylthiophene) was used as semiconducting material in the transistor structure. Such transistors are operating at voltages smaller than −3 V. Having a high dielectric constant (ε_r=21), Ta₂O₅ facilitates the charge carrier accumulation in the transistor channel at much lower electrical fields. The properties of the dielectric material as well as the operation of the organic transistors with a Ta₂O₅ gate dielectric are discussed.     

Stacked pentacene layer organic thin-film transistors with improvedcharacteristics

Using two layers of pentacene deposited at different substrate temperatures as the active material, we have fabricated photolithographically defined organic thin-film transistors (OTFTs) with improved field-effect mobility and subthreshold slope. These devices use photolithographically defined gold source and drain electrodes and octadecyltrichlorosilane-treated silicon dioxide gate dielectric. The devices have field-effect mobility as large as 1.5 cm²/V-s, on/off current ratio larger than 10⁸, near zero threshold voltage, and subthreshold slope less than 1.6 V per decade. To our knowledge, this is the largest field-effect mobility and smallest subthreshold slope yet reported for any organic transistor, and the first time both of these important characteristics have been obtained for a single device     

Printing-induced improvements of organic thin-film transistors

To understand the observation of improved pentacene (Pn) thin-film transistor mobility in flexible printed devices, a method for performing electrical measurements of organic thin-film transistors (OTFT) during the process of transfer printing has been developed. Different sample configurations were designed to test two aspects of the printing process: (1) the formation of the source/drain contacts a Pn thin-film, and (2) the formation of the transfer printed Pn/dielectric interface. In situ measurements show that pressure-induced contacts of gold (Au) electrodes result in a factor of seven mobility improvement compared with evaporation of top Au electrodes on an otherwise identical device configuration. Annealing the laminated device up to 90 °C caused no further improvement, and heating above 90 °C degraded performance. The mobility of a transfer printed device with the rough, as-grown top surface of the Pn in contact with the dielectric was found to increase dramatically with subsequent annealing for a sample temperature up to 120 °C. This is attributed to annealing-induced structural changes in the Pn film at elevated temperatures, consistent with X-ray bulk measurements showing enhanced crystal morphology in transfer printed Pn thin-films.     

High-performance bottom electrode organic thin-film transistors

Pentacene-based organic field effect transistors (FETs) exhibit enormous potential as active elements in a number of applications. One significant obstacle to commercial application remains: no completely lithographic process exists for forming high-performance devices. Processing constraints prevent electrodes from being lithographically patterned once the semiconductor is deposited, but depositing the electrodes before the semiconductor leads to low-performance transistors. By using self-assembled monolayers (SAMs) to change the surface energy of the metal electrodes and morphology of the pentacene subsequently grown on the electrodes, high-performance transistors may be formed using a process compatible with lithographic definition of the source and drain electrodes     

Pentacene thin-film transistors with sol-gel derived amorphous Ba0.6Sr0.4TiO3 gate dielectric

An amorphous Ba_0.6Sr_0.4TiO₃ (BST) film with the thickness of 200 nm was deposited on indium-tin-oxide (ITO)-coated glass substrate through sol-gel route and post-annealing at 500 °C. The dielectric constant of the BST film was determined to be 20.6 at 100 kHz by measuring the Ag/BST/ITO parallel plate capacitor, and no dielectric tunability was observed with the bias voltage varying from −5 to 5 V. The BST film shows a dense and uniform microstructure as well as a smooth surface with the root-mean-square (RMS) roughness of about 1.4 nm. The leakage current density was found to be 3.5 × 10⁻⁸ A/cm² at an applied voltage of −5 V. The transmittance of the BST/ITO/glass structure is more than 70% in the visible region. Pentacene based transistor using the as-prepared BST film as gate insulator exhibits a low threshold voltage of −1.3 V, the saturation field-effect mobility of 0.68 cm²/Vs, and the current on/off ratio of 3.6 × 10⁵. The results indicate that the sol-gel derived BST film is a promising high-k gate dielectric for large-area transparent organic transistor arrays on glass substrate.     

Quasistatic compact modelling of organic thin-film transistors

A compact model for the quasistatic charge and capacitances in organic thin-film transistor (OTFT) is derived and implemented for the simulation of organic circuits. A model for organic ring oscillator circuits is also developed. Comparing the models to experimental data, the simulation qualitatively reproduces the experimental data for frequency, amplitudes and waveforms. The simulation results indicate that the quasistatic model underestimates the capacitances in organic circuits, and it is shown that the geometrical capacitances originating from layout and gate overlap dominate in organic ring oscillators.     

一种廉价电极的并五苯场效应晶体管

采用底栅顶接触结构,研究制备了以并五苯为有源层、聚甲基丙烯酸甲酯(PMMA)为绝缘层的全有机场效应晶体管(OFET),其中绝缘层采用溶液旋涂法制备,电极采用MoO3/Al双层电极。与传统采用单一Au为电极的器件相比,采用双层电极的器件性能大幅提高,经测试,器件的迁移率达到了0.133cm2/Vs,开关电流比可以达到2.61×105。对采用MoO3修饰层提高性能的作用机理进行了详细论证。     

A cross-linked poly(methyl methacrylate) gate dielectric by ion-beam irradiation for organic thin-film transistors

The electrical characteristics of pentacene organic thin-film transistors (OTFTs) using cross-linked poly(methyl methacrylate) (PMMA) as the gate dielectric are reported. Ultra-thin films of cross-linked PMMA could be obtained by spin-coating and subsequent irradiation using a 1.515 MeV ⁴He⁺ ion beam. The resulting film, with a thickness of 33 nm, possessed a low leakage current density of about 10^?6 A cm^?2 for fields up to 2 MV cm^?1. OTFTs incorporating the cross-linked dielectric operated at relatively low voltages, <10 V, and exhibited a mobility of 1.1 cm² V^?1 s^?1, a threshold voltage of ?1 V, a sub-threshold slope of 220 mV per decade and an on/off current ratio of 1.0 × 10⁶.     

Rubrene thin-film transistors with crystalline channels achieved on optimally modified dielectric surface

We report on the fabrication of rubrene thin-film transistors (TFTs) with surface-modified dielectrics adopting several kinds of self-assembled-monolayer (SAM) on SiO₂/p⁺?Si substrate. With the dielectric of lower surface energy, the crystalline rubrene growth or amorphous-to-crystalline transformation kinetics is faster during in-situ vacuum post-annealing, which was performed after rubrene vacuum deposition. In the present study, hexamethyldisilazane (HMDS) was finally determined to be the most effective SAM interlayer for polycrystalline rubrene channel formation. Our rubrene TFT with HMDS-coated SiO₂ dielectric showed quite a high field mobility of ～10^?2 cm²/V s and a high on/off current ratio of ～10⁵ under 40 V.