An analysis of small-signal substrate resistance effect in deep-submicrometer RF MOSFETs

Two different explanations of the S/sub 22/ kink phenomenon in deep-submicrometer RF MOSFETs have been reported: Hjelmgren and Litwin (see IEEE Trans. Electron Devices, vol.48, no.2, p.397-399, 2001) attributed the phenomenon to the substrate resistance, while Lu et al. (see ibid., vol.49, no.2, p.333-340, 2001) concluded that it results from the transconductance, or simply speaking, the size of the transistor. In this paper, we extend the dual-feedback circuit methodology for the three-terminal FET model proposed by Lu et al. into a more general four-terminal model in order to account for the influence of the substrate resistance. Our results show that, for a given MOSFET, either substrate resistance or transconductance may cause a kink in S/sub 22/. In addition to the single kink, which results from the above two factors, the double kinks, which appear when the substrate resistance of a MOSFET is within a middle range (approximately 10/sup 2/ to 10/sup 4/ /spl Omega/), can also be accounted for by our extended model. Experimental data representative of 0.25 /spl mu/m gate MOSFETs are adopted to verify our theory. Excellent agreement between theoretical values and experimental data has been found, which indicates our theory can successfully explain the S/sub 22/ kink phenomenon in deep-submicrometer RF MOSFETs.     

Analysis of temperature-induced saturation threshold voltage degradation in deep-submicrometer ultrathin SOI MOSFETs

This paper presents a systematic study of the temperature lowering influence on the saturation threshold voltage degradation in ultrathin deep-submicrometer fully depleted silicon-on-insulator (SOI) MOSFETs. It is observed that the difference between the threshold voltage obtained with low and high drain bias, increases at lower temperatures for nMOSFETs, whereas it is weakly temperature-dependent for pMOSFETs. Experimental results and two-dimensional numerical simulations are used to support the analysis. The influence of applied back gate bias on threshold voltage variation is also studied. It is demonstrated that the higher doping level into the body region provided by the halo ion implantation associated to the floating-body increases both the multiplication factor and the parasitic bipolar gain as the temperature is lowered contributing to the threshold voltage degradation. The absence of halo implantation efficiently improves this degradation. The use of double gate structure, even with high body doping level, suppress the saturation threshold voltage degradation in cryogenic operation.     

Inverter performance of deep-submicrometer MOSFETs

Switching delay measurements are reported for self-aligned, almost fully scaled, liquid-nitrogen-temperature operation NMOS inverters with deep-submicrometer gate lengths. The shortest delay per stage of 13.1 ps was measured in 0.1-μm gate-length circuits. Circuit simulations based on the measured device characteristics show that still shorter delay times can be reached with such a technology     

Random telegraph noise of deep-submicrometer MOSFETs

The random telegraph noise exhibited by deep-submicrometer MOSFETs with very small channel area (⩽1 μm²) at room temperature is studied. Analysis of the amplitude of the current fluctuations reveals that the trapped charges generate noise through modulation of the carrier mobility in addition to the carrier number. Parameters needed for modeling the carrier mobility fluctuation effect on the flicker noise in conventional MOSFETs are extracted directly from the random telegraph noise data     

p-channel germanium MOSFETs with high channel mobility

The fabrication and performance of p-channel germanium MOSFETs having a nitrided native oxide gate insulator are reported. A self-aligned dummy-gate process suitable for circuit integration is utilized. Common-source characteristics exhibit no looping and indicate a peak room-temperature channel mobility of 770 cm²/V-s. These results provide further evidence that a high-performance germanium CMOS technology is possible     

Influence of high channel doping on the inversion layer electron mobility in strained silicon n-MOSFETs

In this letter, we investigate the dependence of electron inversion layer mobility on high-channel doping required for sub-50-nm MOSFETs in strained silicon (Si), and we compare it to co-processed unstrained Si. For high vertical effective electric field E/sub eff/, the electron mobility in strained Si displays universal behavior and shows enhancement of 1.5-1.7/spl times/ compared to unstrained Si. For low E/sub eff/, the mobility for strained Si devices decreases toward the unstrained Si data due to Coulomb scattering by channel dopants.     

Normally-off 4H-SiC trench-gate MOSFETs with high mobility

A new 4H-SiC trench-gate MOSFET structure with epitaxial buried channel for accumulation-mode operation, has been designed and fabricated, aiming at improving channel electron mobility. Coupled with improved fabrication processes, the MOSFET structure eliminates the need of high dose N⁺ source implantation. High dose N⁺ implantation requires high-temperature (1550 °C) activation annealing and tends to cause substantial surface roughness, which degrades MOSFET threshold voltage stability and gate oxide reliability. The buried channel is implemented without epitaxial regrowth or accumulation channel implantation. Fabricated MOSFETs subject to ohmic contact rapid thermal annealing at 850 °C for 5 min exhibit a high peak field-effect mobility (μ_FE) of 95 cm²/V s at room temperature (25 °C) and 255 cm²/V s at 200 °C with stable normally-off operation from 25 °C to 200 °C. The dependence of channel mobility and threshold voltage on the buried channel depth is investigated and the optimum range of channel depth is reported.     

Influence of doping on threshold current of semiconductor lasers

Doping of the active layer of a semiconductor laser reduces the threshold carrier density, the more so the higher the doping level. As a consequence, the threshold current goes through a minimum dependent on doping. This minimum arises for doping densities of the order of 1018 cm?3, and lies about 25% below the value without doping for an n-doped InGaAsP laser. As the temperature dependence of the threshold current is simultaneously weaker (T0?85°), appropriate n-doping may improve the efficiency of a semiconductor laser. Additionally, it is shown that n-doping is more favourable than p-doping.     

On the influence of substrate doping on the input conductance and the induced gate noise in MOSFETs

The input conductance g_gs and its associate noise spectrum $\text{S}{}_{\mathrm{g}}\text{(?)}$ in MOSFETs is evaluated numerically and expressed in terms of a doping parameter φ. The results augment earlier calculations by Klaassen. For g_gs a function F₂(φ) is introduced that depends only slowly on φ and on the bias voltages V_g′ and V_b′. Expressing the noise in terms of the parameter $\text{β =}\text{S}{}_{\mathrm{g}}\text{(?)}\text{(4kTg}{}_{\mathrm{gs}}\text{)}$, it is found that β is practically independent of φ, V_g′ and V_b′.     

Effect of doping concentration on the grain boundary trap density and threshold voltage of polycrystalline SOI MOSFETs

PolySOI MOSFETs have been fabricated on undoped and doped polycrystalline silicon films and characterized to study the effect of doping on grain boundary passivation. The grain boundary trap density (N_ST) and threshold voltages have been extracted experimentally to evaluate the extent of grain boundary passivation by the dopants. Charge sheet model based on the effective doping concentration has been employed to analytically estimate the threshold voltages using the experimentally determined grain boundary trap density and grain size (L_g) as model parameters. The variation of threshold voltages with increasing doping concentration for the range of N_A ? (N_ST/L_g) has been studied both by simulation and experiments and the results are presented. Analytically estimated threshold voltages and experimental results show that the threshold voltage falls with increase in the dopant concentration and that this effect is indeed due to the reduction in N_ST as a result of the grain boundary passivation by the dopants.     

A new threshold voltage model for deep-submicron MOSFETs with nonuniform substrate dopings

A simple but accurate threshold voltage model for deep-submicron MOSFETs with nonuniform dopings is described in this paper. In this model, a simplified quasi-delta substrate doping profile is used to approximate the nonuniformity. We apply a hyperbola function to avoid the discontinuous problem at the boundary between different doping regions. By adjusting the parameter δ, the actual gradual doping profile can be obtained. A substrate-bias dependent model of short channel effect is also introduced which describes the reduction of substrate-bias effect in deep-submicron devices. The model developed is in good agreement with two-dimensional numerical simulation.     

Trade-off analysis of the p-base doping on ruggedness of SiC MOSFETs

Reliability represents a very important factor for the design of Silicon Carbide (SiC) power metal oxide semiconductor field effect transistors (MOSFETs). Ruggedness of the device during abnormal operating conditions like the short circuit (SC) and avalanche conduction (during unclamped inductive switching - UIS) is an important aspect of reliability. Often, variation in design parameters to improve ruggedness during SC and UIS shows negative impact on the nominal operating performance. This paper presents a comprehensive analysis of the impact of modification of p-base doping on the performance of a 1.2 kV SiC MOSFET during SC and UIS by means of TCAD simulations. The improvement in MOSFET ruggedness by optimizing the p-base doping and its influence on the nominal operating performance is evaluated.     

Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs

Quantum-mechanical (QM), or carrier energy-quantization, effects on the subthreshold characteristics, including the threshold voltage (V/sub t/), of generic undoped double-gate (DG) CMOS devices with ultrathin (Si) bodies (UTBs) are physically modeled. The analytic model, with dependences on the UTB thickness (t/sub Si/), the transverse electric field, and the UTB surface orientation, shows how V/sub t/ is increased, and reveals that 1) the subthreshold carrier population in higher-energy subbands is significant, 2) the QM effects in DG devices with {110}-Si surfaces, common in FinFETs, are comparable to those for {100}-Si surfaces for t/sub Si/>/spl sim/4 nm, 3) the QM effects can increase the gate swing, and (iv) the QM effects, especially for t/sub Si/相似文献   

Accurate evaluation of mobility in high gate-leakage-current MOSFETs by using a transmission-line model

The effect of high gate-leakage current on the accuracy of mobility evaluation was investigated. This investigation showed that a high gate leakage current makes it difficult to measure the mobility accurately in the case of using a conventional equivalent circuit with lumped circuit elements. To measure the mobility accurately, the authors therefore used a transmission-line model. Its validity was experimentally confirmed by using the capacitance-frequency characteristic of the gate of MOSFETs. The transmission-line model shows that a high gate-leakage current induces a voltage distribution in the channel, which causes a serious error in the mobility evaluation. Accordingly, a precision parameter, which clarifies the relation between channel length and measurement error, was defined. This parameter was then used to define a criterion for channel length for accurately measuring mobility. The channel-length criterion was used to successfully evaluate the mobility of n-MOSFETs with gate dielectrics of 1.4-nm-thick oxynitride (SiON).     

Modelling the threshold voltage of short-channel silicon-on-insulator MOSFETs

A simple analytical model for the threshold voltage of short-channel, thin-film, fully-depleted silicon-on-insulator MOSFETs is presented. The model is based on the analytical solution for the two-dimensional potential distribution in the silicon film, which is taken as the sum of the long-channel solution to the Poisson equation and the short-channel solution to the Laplace equation. The model shows close agreement with numerical PISCES simulation results. The equivalence between the proposed model and the parabolic model of Young (1989) is also proven.<>     

Compact model for long-channel cylindrical surrounding-gate MOSFETs valid from low to high doping concentrations

This paper presents a compact model for the electrostatic potentials and the current characteristics of doped long-channel cylindrical surrounding-gate (SRG) MOSFETs. An analytical expression of the potentials is derived as a function of doping concentration. Then, the mobile charge density is calculated using the analytical expressions of the surface potential at the surface and the difference of potentials between the surface and the center of the silicon doped layer. Using the expression obtained for the mobile charge, a drain current expression is derived. Comparisons of the modeled expressions with the simulated characteristics obtained from the 3D ATLAS device simulator for the transfer characteristics, as well for the output characteristics, show good agreement within the practical range of gate and drain voltages and for doping concentrations ranging from 10¹⁶ cm⁻³ to 5 × 10¹⁸ cm⁻³.     

Effect of radiation-induced oxide-trapped charge on mobility inp-channel MOSFETs

It is shown that radiation-induced oxide-trapped charge contributes to an increase in mobility in p-channel MOSFETs. A new scattering mechanism involving retardation of surface-roughness scattering due to oxide-trapped charge is proposed in order to explain the observed mobility increase     

The sensitivity of threshold voltage of ion-implanted MOSFET's to substrate doping and oxide thickness fluctuations

When the gate region of a MOSFET is implanted in order to adjust, the threshold voltage, the sensitivity of the threshold voltage to fluctuations in substrate doping will be affected. It is shown here that when the implanted ion is of the Same impurity type as the substrate, this sensitivity is lower than for a similar, unimplanted structure. However, the converse is found to he true when the implanted ion is of opposite type and the device is operating in a deep-depletion mode. The latter result has obvious importance in view of substrate–doping fluctuations over the surface of a single silicon wafer, and more so between many different wafers. The effect on the threshold voltage of oxide thickness variations is also investigated, and it is found there is a range of implant energy and dose over which the sensitivity can be very small. This is associated, however, with a sharp rise in the sensitivity outside this range.