具有P型浮空区的槽栅IGBT结构

本文提出了一种具有P型浮空层的新型槽栅IGBT结构,它是在之前所提的一种积累层沟道控制的槽栅IGBT(TAC-IGBT)基础之上引入了一浮空P型层。此结构在维持原有TAC-IGBT低的正向导通压降和更大正向偏置安全工作区（FBSOA）的同时,减小了器件的泄漏电流,提高了器件的击穿电压,也使得器件的短路安全工作区大大提高,且制造简单,设计裕度增大。仿真结果表明：对于1200V的IGBT器件,具有P型浮空层的新型槽栅IGBT结构漏电比TAC-IGBT小近一个量级,击穿电压提高近150V。     

具有P型浮空层的新型载流子存储槽栅双极晶体管

文中提出了一种具有P型浮空层的载流子存储槽栅双极晶体管。引入P型浮空层,可以增加载流子存储层厚度和掺杂浓度,有效地提高了近发射极的电导调制作用,降低积累层电阻和扩展电阻,使得导通损耗大大减小。同时,P型浮空层改善了传统结构中的电场分布,提高器件击穿电压。仿真结果表明：新结构较传统槽栅IGBT和载流子存储槽栅双极晶体管正向导通压降分别降低约20%和17%,正向阻断电压提高了100V以上,且没有使得短路安全工作区（SCSOA）减小。     

一种带有超结浮空层的槽栅场阻IGBT

本文提出了一种带有超结浮空层的槽栅场阻IGBT,它具有高的击穿电压(>1200V),低的正向压降和快速的关断能力。高掺杂的 SJ 浮空层在阳极侧引入了电场峰的同时优化了器件内载流子分布,带来关态击穿电压提高,开态、开关态能量损耗减少等好处。在保持电荷平衡的前提下,增加 SJ 浮空层的厚度可以提高击穿电压和降低正向压降,降低 P 型阳极浓度可以减少关断损耗。与传统结构相比,新结构击穿电压提高了100V,正向压降降低了0.33V（电流密度为100A/cm2）,关断时间缩短了60%。     

高压高阻断增益的水平沟道场控晶闸管

水平沟道场控晶闸管(简称LFCT)是由垂直沟道场控晶闸管发展而来的,它具有开关速度快、与集成电路工艺兼容等特点。我们采用刻蚀V型槽来代替栅扩散,已制成最大正向阻断电压为200V,可关断电流为2A的LFCT,其正向电压阻断增益达40～200。     

1700 V精细沟槽栅IGBT器件设计

为了改善绝缘栅双极型晶体管(IGBT)器件关断损耗和导通压降之间的折中关系,同时降低器件制造成本,基于1 700 V电压平台设计了一种采用精细沟槽栅结构的IGBT。采用TCAD软件进行仿真,研究衬底电阻率、衬底厚度、沟槽栅深度、沟槽栅宽度、载流子存储层注入剂量、沟槽栅元胞结构等因素对精细沟槽栅IGBT器件性能参数的影响,确定了最优工艺参数,并对1 700 V精细沟槽栅IGBT芯片进行流片和封装。测试结果显示,相比普通沟槽栅IGBT模块,1 700 V精细沟槽栅IGBT模块在芯片面积减小34.2%的情况下,关断损耗降低了8.6%,导通压降仅升高5.5%,器件性价比得到了优化。     

一种积累型槽栅超势垒二极管

提出了一种积累型槽栅超势垒二极管,该二极管采用N型积累型MOSFET,通过MOSFET的体效应作用降低二极管势垒。当外加很小的正向电压时,在N+区下方以及栅氧化层和N-区界面处形成电子积累的薄层,形成电子电流,进一步降低二极管正向压降;随着外加电压增大,P+区、N-外延区和N+衬底构成的PIN二极管开启,提供大电流。反向阻断时,MOSFET截止,PN结快速耗尽,利用反偏PN结来承担反向耐压。N型积累型MOSFET沟道长度由N+区和N外延区间的N-区长度决定。仿真结果表明,在相同外延层厚度和浓度下,该结构器件的开启电压约为0.23 V,远低于普通PIN二极管的开启电压,较肖特基二极管的开启电压降低约30%,泄漏电流比肖特基二极管小近50倍。     

底栅和顶栅结构全透明氧化锌薄膜晶体管的制备

报道了制备在50mm石英玻璃衬底上的透明氧化锌薄膜晶体管(ZnO-TFT),采用了底栅和顶栅两种结构进行比较.ZnO沟道层由射频磁控溅射方法制备,SiO2薄膜作为栅绝缘层.结果发现底栅结构的ZnO-TFT具有较好的电学性质,该器件工作在n沟道增强模式,具有较好的夹断效应和饱和特性,其场效应迁移率、阈值电压和电流开关比分别为18.4cm2/(V·s),-0.5V和104.顶栅结构的ZnO-TFT则工作在n沟道耗尽模式,没有明显的饱和特征.不同结构ZnO-TFT电学性质的差别可能是由于不同的ZnO/SiO2界面特性所致.两种结构的ZnO-TFT在可见光波段都有很高的光学透过率.     

底栅和顶栅结构全透明氧化锌薄膜晶体管的制备

报道了制备在50mm石英玻璃衬底上的透明氧化锌薄膜晶体管(ZnO-TFT),采用了底栅和顶栅两种结构进行比较.ZnO沟道层由射频磁控溅射方法制备,SiO2薄膜作为栅绝缘层.结果发现底栅结构的ZnO-TFT具有较好的电学性质,该器件工作在n沟道增强模式,具有较好的夹断效应和饱和特性,其场效应迁移率、阈值电压和电流开关比分别为18.4cm2/(V·s),-0.5V和104.顶栅结构的ZnO-TFT则工作在n沟道耗尽模式,没有明显的饱和特征.不同结构ZnO-TFT电学性质的差别可能是由于不同的ZnO/SiO2界面特性所致.两种结构的ZnO-TFT在可见光波段都有很高的光学透过率.     

一种低功耗4H-SiCIGBT的仿真研究

针对传统沟槽栅4H-SiC IGBT关断时间长且关断能量损耗高的问题,文中利用Silvaco TCAD设计并仿真了一种新型沟槽栅4H-SiC IGBT结构.通过在传统沟槽栅4H-SiC IGBT结构基础上进行改进,在N+缓冲层中引入两组高掺杂浓度P区和N区,提高了N+缓冲层施主浓度,折中了器件正向压降与关断能量损耗.在...     

超结硅锗功率二极管电学特性的研究

超结SiGe功率开关二极管可以克服常规Si功率二极管存在的一些缺陷,如阻断电压增大的同时,正向导通压降也将增大,反向恢复时间也变长。该新型功率二极管有两个重要特点:一是由轻掺杂的p型柱和n型柱相互交替形成超结结构,代替传统功率二极管的n-基区;二是p+区采用很薄的应变SiGe材料。该器件可以同时实现高阻断电压、低正向压降和快速恢复的电学特性。与相同器件厚度的常规Si功率二极管相比较,反向阻断电压提高了42%,反向恢复时间缩短了40%,正向压降减小了约0.1V(正向电流密度为100A/cm2时)。应变SiGe层中Ge含量和器件的基区厚度是影响超结SiGe二极管电学特性的重要参数,详细分析了该材料参数和结构参数对正向导通特性、反向阻断特性和反向恢复特性的影响,为器件结构设计提供了实用的参考价值。     

Insulated gate bipolar transistor with trench gate structure of accumulation channel

An accumulation channel trench gate insulated gate bipolar transistor (ACT-IGBT) is proposed. The simu-lation results show that for a blocking capability of 1200 V, the on-state voltage drops of ACT-IGBT are 1.5 and 2 V at a temperature of 300 and 400 K, respectively, at a collector current density of 100 A/cm~2. In contrast, the on-state voltage drops of a conventional trench gate IGBT (CT-IGBT) are 1.7 and 2.4 V at a temperature of 300 and 400 K,respectively. Compared to the CT-IGBT, the ACT-IGBT has a lower on-state voltage drop and a larger forward bias safe operating area. Meanwhile, the forward blocking characteristics and turn-off performance of the ACT-IGBT are also analyzed.     

High current density 800-V 4H-SiC gate turn-off thyristors

4H-SiC gate turn-off thyristors (GTOs) were fabricated using the recently developed inductively-coupled plasma (ICP) dry etching technique. DC and ac characterisation have been done to evaluate forward blocking voltage, leakage current, on-state voltage drop and switching performance. GTOs over 800 V dc blocking capability has been demonstrated with a blocking layer thickness of 7 μm. The dc on-state voltage drops of a typical device at 25 and 300°C were 4.5 and 3.6 V, respectively, for a current density of 1000 A/cm². The devices can be reliably turned on and turned off under an anode current density of 5000 A/cm² without observable degradation     

Shielding region effects on a trench gate IGBT

In this paper we introduced the shielding region concept in order to relieve the electric field concentrated on the trench bottom corner. The shielded trench gate insulated gate bipolar transistor (IGBT) is a trench gate IGBT with a P+shielding region located in the bottom of a trench gate. By simulation results, we verified that a shielding region reduced the electric fields not only in the gate oxide but also in the P-base region. Compared with conventional trench gate IGBT, about 33% increment of forward breakdown voltages are achieved, but little forward voltage drop, which causes on-state loss to be increased by about 0.06 V in the shielded trench gate IGBT.     

Trench gate IGBT structure with floating P region

A new trench gate IGBT structure with a floating P region is proposed,which introduces a floating P region into the trench accumulation layer controlled IGBT(TAC-IGBT).The new structure maintains a low on-state voltage drop and large forward biased safe operating area(FBSOA)of the TAC-IGBT structure while reduces the leakage current and improves the breakdown voltage.In addition,it enlarges the short circuit safe operating area(SCSOA)of the TAC-IGBT,and is simple in fabrication and design.Simulation results indicate that,for IGBT structures with a breakdown voltage of 1200 V, the leakage current of the new trench gate IGBT structure is one order of magnitude lower than the TAC-IGBT structure and the breakdown voltage is 150 V higher than the TAC-IGBT.     

4H-SiC TSOB结势垒肖特基二极管静态特性

为增强器件的反向耐压能力,降低器件的漏电功耗,采用Silvaco TCAD对沟槽底部具有SiO₂间隔的结势垒肖特基二极管(TSOB)的器件特性进行了仿真研究。通过优化参数来改善导通压降(V_F)-反向漏电流(I_R)和击穿电压的折衷关系。室温下,沟槽深度为2.2 μm时,器件的击穿电压达到1 610 V。正向导通压降为2.1 V,在V_F=3 V时正向电流密度为199 A/cm²。为进一步改善器件的反向阻断特性,在P型多晶硅掺杂的有源区生成一层SiO₂来优化漂移区电场分布,此时改善的器件结构在维持正向导通压降2.1 V的前提下,击穿电压达到1 821 V,增加了13%。在1 000 V反向偏置电压下,反向漏电流密度比普通结构降低了87%,有效降低了器件的漏电功耗。普通器件结构的开/关电流比为2.6×10³(1 V/-500 V),而改善的结构为1.3×10⁴(1 V/-500 V)。     

The dual gate base resistance controlled thyristor

A new device concept, called the dual gate base resistance controlled thyristor (DG-BRT), is introduced for simultaneously obtaining the low on-state voltage drop of a thyristor together with a good forward biased safe operating area. The two gates are used to control an N-channel and a P-channel MOSFET integrated with a thyristor structure using the DMOS process. When a positive bias is applied to both gates, the device operates in the thyristor-mode with a low on-state voltage drop at even high current densities. When a negative bias is applied to the OFF-gate, the device operates in the IGBT-mode with the saturated current controlled by the positive bias applied to the ON-gate. The results of two-dimensional numerical simulations and measurements performed on devices with 600 V forward blocking capability are reported     

Trench SJ IGBT 的仿真研究

本文对沟槽型超结绝缘栅双极晶体管(trench SJ IGBT)进行了全面的分析,并通过Sentaurus TCAD仿真软件将其与沟槽型场截止绝缘栅双极晶体管(trench FS IGBT)进行了详尽的对比,仿真结果显示,在相同的条件下与trench FS IGBT 相比,trench SJ IGBT 的击穿电压提高了100 V,饱和导通压降降低了0.2 V,关断损耗减少了50%。最后,文章研究了电荷不平衡对trench SJ IGBT 的动静态参数的影响。对各参数和它们对电荷不平衡的灵敏度之间的折中进行了讨论。     

A novel optimization design for 3.3 kV injection-enhanced gate transistor

This paper introduces a homemade injection-enhanced gate transistor (IEGT) with blocking voltage up to 3.7 kV. An advanced cell structure with dummy trench and a large cell pitch is adopted in the IEGT. The carrier concentration at the N-emitter side is increased by the larger cell pitch of the IEGT and it enhances the P-i-N effect within the device. The result shows that the IEGT has a remarkablely low on-state forward voltage drop (V_CE(sat)) compared to traditional trench IGBT structures. However, too large cell pitch decreases the channel density of the trench IEGT and increases the voltage drop across the channel, finally it will increase the V_CE(sat) of the IEGT. Therefore, the cell pitch selection is the key parameter consideration in the design of the IEGT. In this paper, a cell pitch selection method and the optimal value of 3.3 kV IEGT are presented by simulations and experimental results.     

A novel TFS-IGBT with a super junction floating layer

A novel trench field stop (TFS) IGBT with a super junction (SJ) floating layer (SJ TFS-IGBT) is proposed.This IGBT presents a high blocking voltage (>1200 V), low on-state voltage drop and fast turn-off capability. A SJ floating layer with a high doping concentration introduces a new electric field peak at the anode side and optimizes carrier distribution, which will improve the breakdown voltage in the off-state and decrease the energy loss in the on-state/switching state for the SJ TFS-IGBT. A low on-state voltage (VF) and a high breakdown voltage (BV) can be achieved by increasing the thickness of the SJ floating layer under the condition of exact charge balance. A low turn-off loss can be achieved by decreasing the concentration of the P-anode. Simulation results show that the BV is enhanced by 100 V, VF is decreased by 0.33 V (at 100 A/cm2) and the turn-off time is shortened by 60%, compared with conventional TFS-IGBTs.