温度补偿晶体管的结构设计

本文给出了条状非对称基区温度补偿晶体管的纵向参数、版图设计、确定基区电阻比的关系式以及这种结构的温度补偿晶体管基区电阻计算公式.实验结果表明,本文给出的条状结构非对称基区温度补偿晶体管基区电阻比的函数关系式所确定的η有最佳的温度补偿效果.     

改进的微波晶体管结构

本文描述了采用分开的工艺过程来形成有源基区和无源基区的一种改进的微波晶体管结构。在这种结构中,由于采用重掺杂的无源基区具有小的薄层电阻,所以可以得到低的基区电阻,又由于无源基区的横向扩散,因而减小了发射极的有效宽度。同时,用离子注入形成的有源基区可以独自取得最佳化,以改进电流增益截止频率。具有改进结构的晶体管,与具有同样几何图形但用通常双扩散工艺所制造的晶体管相比,在4千兆赫下,前者的噪声系数为2.3分贝,后者为3.6分贝。     

基于多晶外基区及SIC技术的高速NPN管设计

提出了一种先进的双多晶硅非自对准NPN管的器件结构,并实际用于一种高性能NPN管的研制.该器件结构主要通过多晶外基区减小基区电阻和基区结面积,以及使用SIC技术减小集电极电阻的方式,极大地提升了NPN管的特征频率.通过实际工艺流片验证,实现了BVCEO=5.6 V、fT=13.5 GHz的高速NPN管.该器件结构较双多晶自对准器件结构易于加工,可以广泛用于其他高速互补双极器件的研制.     

新型恒压控制型负阻HBT的研制进展

研究了HBT产生负阻的可能机制,通过对材料结构和器件结构的特殊设计,采用常规台面HBT工艺,先后研制出3类高电流峰谷比的恒压控制型负阻HBT.超薄基区HBT的负阻特性是由超薄基区串联电阻压降调制效应造成的,在GaAs基InGaP/GaAs和AlGaAs/GaAs体系DHBT中均得到了验证.双基区和电阻栅型负阻HBT均为复合型负阻器件.双基区负阻HBT通过刻断基区,电阻栅负阻HBT通过在集电区制作基极金属形成集电区反型层,构成纵向npn与横向pnp的复合结构,由反馈结构(pnp)的集电极电流来控制主结构(npn)的基极电流从而产生负阻特性.3类负阻HBT与常规HBT在结构和工艺上兼容,兼具HBT的高速高频特性和负阻器件的双稳、自锁、节省器件的优点.     

低温硅双极晶体管基区优化设计

常规双极晶体管在７７Ｋ下电流增益和频率性能都严重退化。本文首先分析了低温双极晶体管基区Ｇｕｍｍｅｌ数，基区方块电阻，渡越时间和穿通电压等参数与温度及基区掺杂的关系，然后讨论了低温双极器件基区的优化设计问题。     

InP/InGaP/GaAsSb/InGaAsSb/InP双异质结双极晶体管设计北大核心

应用半导体器件的电阻电容计算理论和SILVACO ATLAS软件,在综合考虑载流子渡越时间和电阻电容延迟时间对增益截止频率的影响下设计了一种InP/InGaP/GaAsSb/InGaAsSb/InP双异质结双极晶体管(DHBT)结构。该结构中在基区与发射区之间加入P型半导体层以降低基区与发射区之间的电子势垒,并通过引入梯度渐变材料及优化掺杂分布提高基区电场、增强集电区中易趋近于零区域的电场,器件的电流增益截止频率得到显著提升。此外,还列出了InGaP和InGaAsSb材料的禁带宽度和电子亲合势、P型GaAs_(0.51)Sb_(0.49)和InGaAsSb材料的电子迁移率的近似计算公式。     

SOI LIGBT抗闩锁效应的研究与进展

概述了绝缘层上硅横向绝缘栅双极晶体管(SOI LIGBT)抗闩锁结构的改进历程,介绍了从早期改进的p阱深p+欧姆接触SOI LIGBT结构到后来的中间阴极SOI LIGBT、埋栅SOILIGBT、双沟道SOI LIGBT、槽栅阳极短路射频SOI LIGBT等改进结构;阐述了一些结构在抗闩锁方面的改善情况,总结指出抑制闩锁效应发生的根本出发点是通过降低p基区电阻的阻值或减小流过p基区电阻的电流来削弱或者切断寄生双极晶体管之间的正反馈耦合。     

光敏三极管响应速度与器件结构参数的关系

对影响光敏三极管光电响应速度的器件结构进行了理论和计算机数值分析。结果表明 ,与基极电阻和电流增益相关的基区宽度是器件优化设计的重点之一。实验结果与分析结果较好一致。选用合适的基区宽度并采取其他措施 ,可使光敏三极管的响应时间降至 0 .6 μs以下。     

硅低温双极晶体管的优化设计与制备：II结构与电特性分析

本文在前文器件掺杂分布优化设计的基础上，实现了结构设计和工艺选择，采用多晶硅发射极技术，研制成功了７７Ｋ下高增益（ＨＦＥ可达２５０）硅双极晶体管；采用多晶硅发射区和基区重掺杂技术，获得了可与ＣＭＯＳ结构兼容，基区电阻较小的硅低温双极晶体管。     

硅低温双极晶体管的优化设计与制备──Ⅱ结构与电特性分析

本文在前文器件掺杂分布优化设计的基础上，实现了结构设计和工艺选择，采用多晶硅发射极技术，研制成功了７７Ｋ下高增益（Ｈ＿（ＦＥ）可达２５０）硅双极晶体管；采用多晶硅发射区和基区重掺杂技术，获得了可与ＣＭＯＳ结构兼容，基区电阻较小的硅低温双极晶体管。     

An analysis of small-signal and large-signal base resistances forsubmicrometer BJT's

Small-signal and large-signal base resistances for submicrometer BJT's have been analyzed in detail by using a two-dimensional device simulator. It has been clarified that the small-signal base resistance cannot be obtained from the input impedance semicircle in the complex plane accurately due to the effect of the emitter resistance at low frequencies, and also due to the reduction of the base-emitter junction resistance and the diffusion capacitance at high frequencies. A new method for extracting an accurate value of the small-signal base resistance is proposed. The extracted small-signal base resistance not only differed from the large-signal base resistance extracted from the dc characteristics of a BJT, but also agreed with the differential resistance. It has been shown that, for a 0.6 μm emitter-width BJT, the measured value of the small-signal base resistance is less than half that of the large-signal base resistance in the bias region in which actual BJT circuits operate     

Enhancement of fmax in InP/InGaAs HBTs by selectiveMOCVD growth of heavily-doped extrinsic base regions

InP/InGaAs heterojunction bipolar transistors (HBT's) with selectively grown heavily-doped extrinsic base layers have been fabricated. A new selective metalorganic chemical vapor deposition (MOCVD) method using a very high-speed rotating susceptor, which can attain high selectivity even at low growth temperature, is employed for the extrinsic-base regrowth. The maximum f_max of the HBT with the selectively grown extrinsic-base layer is 141 GHz, which is more than 50% larger than that of a HBT without the selective growth. The base resistances are estimated by a small-signal equivalent-circuit analysis and transmission line model measurements, and we find that the resistance is reduced to be about a half by the selective regrowth. This significant reduction is achieved by the decrease of base contact resistance as well as the low regrowth-interface resistance. We also discuss Zn redistribution during the extrinsic base regrowth     

InGaAs/In(AlGa)As RHET's with InAs pseudomorphic base

An InGaAs/In(AlGa)As resonant-tunneling hot-electron transistor (RHET) with an INAs pseudomorphic base to increase current gain and to reduce base resistance was designed and fabricated. The conduction band discontinuity between the InAs base and the In(AlGa)As collector barrier was estimated from the thermionic current. The band discontinuity was about 0.38 eV, which agrees well with the calculated band discontinuity taking into consideration the effect of strain. The common-emitter current gain doubled and the base resistance decreased 20% compared to InGaAs-base RHETs with the same doping concentration. A current gain cutoff frequency of 65 GHz and a maximum oscillation frequency of 50 GHz at 77 K were measured     

射频晶体管3DG2714基极电阻R_(bb’)的分析与研究

射频晶体管具有高的特征频率fT,高的功率增益GP。为此在工程上多采用浓硼扩散形成嫁接基区。尽可能减少基极电阻Rbb’,同时采用梳状结构电极,浅结扩散,小的结面积等工艺,提高fT,从而双方面提高功率增益GP。文章以该公司生产的射频晶体管3DG2714为例,分析了发射结下基区部分电流流动状态,合理计算了这部分的基极电阻Rb1,分析了发射极与基极之间淡硼扩散区的电流流动状态,合理计算了这部分的基极电阻Rb2,忽略了两个影响极小的电阻,计算了总的基极电阻Rbb’。为减小基极电阻提高功率增益的射频晶体管设计制造提供了依据。     

New method to determine the base resistance of bipolar transistors

A new method to determine the base resistance of bipolar transistors under forward-bias conditions is presented. Using special transistor structures, the total base resistance has been directly measured and then separated into its components, the external and internal base resistances. The sheet resistance for the internal base region can be estimated for a base-emitter voltage range of practical interest. An accurate estimation of the base resistance of advanced bipolar transistors under high-forward-bias conditions is demonstrated     

A fundamental limitation for bipolar transistor scaling

A microscopic model of minority-carrier diffusion in a heavily doped emitter is proposed. Monte Carlo simulation demonstrates that statistical fluctuation in the base current is one of the fundamental limitations in high-speed applications of scaled bipolar transistors. For the transistor presently investigated, with 5.0-μm² emitter area, 0.1-μm junction depth, 8.5-ps measurement time, and 0.75-V emitter/base bias, the base current deviation is 43%. This sets up the maximum operating frequency for the transistor. More lightly doped emitters (such as for heterojunction bipolar transistors) will relax this limitation, but at a cost of increased contact resistance, especially when poly-emitters are utilized. Increasing the emitter/base bias will also make the base current rate more deterministic, but the other limitations such as power dissipation and contact resistance will become more obvious     

Three-dimensional base distributed effects of long stripe BJT's:base resistance at DC

An analytical model describing the DC voltage and current distributed effects in the polysilicon and intrinsic base regions of long stripe BJTs with double polysilicon technology is presented. It is shown that the bias dependent debiasing effect in the base polysilicon contacts causes an unequal division of base current between two base polysilicon contacts and results in a redistribution of base current in the base regions at different levels of current injection. The base resistance is also modulated by this current re-distribution effect at different biases. The change of base resistance with bias is calculated and the results show the importance of the distributed effects in the base polysilicon region in determining the base resistance     

Effect of base profile on the base transit time of the bipolartransistor for all levels of injection

Comparing the uniform base profile with the exponential base profile in low injection, the uniform base profile gives a lower base transit time for a given base resistance and peak base concentration, while the exponential base profile gives a lower base transit time for a given base resistance and base width at large base widths. At high injection the uniform base profile always gives the minimum base transit time. The uniform base doping is the optimal base profile for BiCMOS circuits in which the bipolar transistors are operated under high injection     

Extraction method of the base series resistances in bipolartransistor in presence of current crowding

This paper proposes a new method to determine the base resistance components and the base sheet resistance under forward bias conditions and in the presence of current crowding. Using bipolar transistors with two independent base contacts, the base sheet resistance R_□ and the extrinsic resistance component R_Bx are first extracted. Accounting for current crowding, the total base resistance is subsequently calculated using an analytical analysis of the debiasing effects. The assessment of this method is accomplished by exercising the algorithm with current/voltage data generated by two dimensional numerical simulations. The simulated structure corresponds to an advanced npn transistor embedded in the QUBiC BiCMOS technology. The extracted quantities are directly compared to their strictly integrated counterparts determined from the internal current and voltage distributions     

Scalable Approach for HBT's Base Resistance Calculation

This paper presents a detailed investigation of the dual base method for intrinsic and extrinsic HBT's base resistance extraction that is of utmost importance for process monitoring and device modeling purpose. Ring emitter test structures layout, dc measurement conditions, and extraction methodology have been improved to get reliable results. A particular attention has been drawn to the external base resistance extraction and the effect of parasitic resistances is highlighted. The method has been generalized for an extraction of the base resistance specific parameters using any number of geometries (widths and lengths) and therefore demonstrates the base resistance scalability. This method is applied to a ST state-of-art fully self aligned double poly BiCMOS SiGeC technology, and results are discussed.