VCluster: a thread‐based Java middleware for SMP and heterogeneous clusters with thread migration support

Clusters, composed of symmetric multiprocessor (SMP) machines and heterogeneous machines, have become increasingly popular for high‐performance computing. Message‐passing libraries, such as message‐passing interface (MPI) and parallel virtual machine (PVM), are de facto parallel programming libraries for clusters that usually consist of homogeneous and uni‐processor machines. For SMP machines, MPI is combined with multithreading libraries like POSIX Thread and OpenMP to take advantage of the architecture. In addition to existing parallel programming libraries that are in C/C++ and FORTRAN programming languages, the Java programming language presents itself as another alternative with its object‐oriented framework, platform neutral byte code, and ever‐increasing performance. This paper presents a new parallel programming model and a library, VCluster, which implements this model. VCluster is based on migrating virtual threads instead of processes to support clusters of SMP machines more efficiently. The implementation uses thread migration, which can be used in dynamic load balancing. VCluster was developed in pure Java, utilizing the portability of Java to support clusters of heterogeneous machines. Several applications are developed to illustrate the use of this library and compare the usability and performance of VCluster with other approaches. Copyright © 2007 John Wiley & Sons, Ltd.     

Designing an adaptable heterogeneous abstract machine by means of reflection

The concepts of abstract and virtual machines have been used for many different purposes to obtain diverse benefits such as code portability, compiler simplification, interoperability, distribution and direct support of specific paradigms. Despite of these benefits, the main drawback of virtual machines has always been execution performance. Consequently, there has been considerable research aimed at improving the performance of virtual machine's application execution compared to its native counterparts. Techniques like adaptive Just In Time compilation or efficient and complex garbage collection algorithms have reached such a point that Microsoft and Sun Microsystems identify this kind of platforms as appropriate to implement commercial applications.What we have noticed in our research work is that these platforms have heterogeneity, extensibility, platform porting and adaptability limitations caused by their monolithic designs. Most designs of common abstract machines are focused on supporting a fixed programming language and the computation model they offer is set to the one employed by the specific language. We have identified reflection as a basis for designing an abstract machine, capable of overcoming the previously mentioned limitations. Reflection is a mechanism that gives our platform the capability to adapt the abstract machine to different computation models and heterogeneous computing environments, not needing to modify its implementation. In this paper we present the reflective design of our abstract machine, example code extending the platform, a reference implementation, and a comparison between our implementation and other well-known platforms.     

Towards the uniform implementation of declarative languages

Current implementation techniques for functional languages differ considerably from those for logic languages. This complicates the development of flexible and efficient abstract machines that can be used for the compilation of declarative languages combining concepts of functional and logic programming. We propose an abstract machine, called the JUMP-machine, which systematically integrates the operational concepts needed to implement the functional and logic programming paradigm. The use of a tagless representation for heap objects, which originates from the Spineless Tagless G-machine, supports the integration of different concepts. In this paper, we provide a functional logic kernel language and show how to translate it into the abstract machine language of the JUMP-machine. Furthermore, we define the operational semantics of the machine language formally and discuss the mapping of the abstract machine to concrete machine architectures. We tested the approach by writing a compiler for the functional logic language GTML. The obtained performance results indicate that the proposed method allows to implement functional logic languages efficiently.     

Holistic methodology using computer simulation for optimisation of machine tools

Virtual machine concepts supporting optimisation of machine tools have been developed in earlier work. The virtual machine concept is a tool that can describe the behaviour of a machine tool while considering the interaction between mechanics of the machines and the control system. Considerable amount of work has been done proving the concept and showing the potential of such a design tool in different contexts. Several studies have shown the potential of using the virtual machine concept, although, no work has been found that is exploring the potential of a full optimisation study.     

On the Virtualization of CUDA Based GPU Remoting on ARM and X86 Machines in the GVirtuS Framework

The astonishing development of diverse and different hardware platforms is twofold: on one side, the challenge for the exascale performance for big data processing and management; on the other side, the mobile and embedded devices for data collection and human machine interaction. This drove to a highly hierarchical evolution of programming models. GVirtuS is the general virtualization system developed in 2009 and firstly introduced in 2010 enabling a completely transparent layer among GPUs and VMs. This paper shows the latest achievements and developments of GVirtuS, now supporting CUDA 6.5, memory management and scheduling. Thanks to the new and improved remoting capabilities, GVirtus now enables GPU sharing among physical and virtual machines based on x86 and ARM CPUs on local workstations, computing clusters and distributed cloud appliances.     

Implementation of GPU virtualization using PCI pass-through mechanism

As a general purpose scalable parallel programming model for coding highly parallel applications, CUDA from NVIDIA provides several key abstractions: a hierarchy of thread blocks, shared memory, and barrier synchronization. It has proven to be rather effective at programming multithreaded many-core GPUs that scale transparently to hundreds of cores; as a result, scientists all over the industry and academia are using CUDA to dramatically expedite on production and codes. GPU-based clusters are likely to play an essential role in future cloud computing centers, because some computation-intensive applications may require GPUs as well as CPUs. In this paper, we adopted the PCI pass-through technology and set up virtual machines in a virtual environment; thus, we were able to use the NVIDIA graphics card and the CUDA high performance computing as well. In this way, the virtual machine has not only the virtual CPU but also the real GPU for computing. The performance of the virtual machine is predicted to increase dramatically. This paper measured the difference of performance between physical and virtual machines using CUDA, and investigated how virtual machines would verify CPU numbers under the influence of CUDA performance. At length, we compared CUDA performance of two open source virtualization hypervisor environments, with or without using PCI pass-through. Through experimental results, we will be able to tell which environment is most efficient in a virtual environment with CUDA.     

Comparative study between exact and metaheuristic approaches for virtual machine placement process as knapsack problem

In cloud computing, the virtual machine placement is a critical process which aims to identify the most appropriate physical machine to host the virtual machine. It has a significant impact on the performance, resource usage and energy consumption of the datacenters. In order to reduce the number of active physical machines in a datacenter, several virtual machine placement schemes have already been designed and proposed. This study investigates how do four different methods compare to each other in terms of accuracy and efficiency for solving the virtual machine placement as a knapsack problem. A new approach has been adopted which focuses on maximizing the use of a server’s central processing unit resource considering a certain capacity threshold. The compared methods are classified; two belong to the category of the exact methods, i.e., branch and bound and dynamic programming, while the other two represent the approximate approach, i.e., genetic algorithm and ant colony optimization algorithm. Experimental results show that the metaheuristic ant colony optimization algorithm outperforms the other three algorithms in terms of efficiency.

     

虚拟拉伸实验的设计和实现

利用虚拟现实技术开发了虚拟拉伸实验,阐述了该虚拟实验的功能特点、结构模式以及设计原理,分析了其实现流程及方法,包括三维场景建模、虚拟场景动态生成以及交互式虚拟场景的开发。提出了利用可视化编程语言VB开发一个实现复杂交互动作功能的平台,该平台提供了友好界面,使用户能够直观地组成虚拟三维实验场景,利用键盘或鼠标来控制三维试验机在虚拟场景中运动,并根据用户的指令实现从静态界面对虚拟场景的调用及虚拟场景中试验仪器、工具及其事件的交互,从而控制虚拟模型的动作进行实验。     

A Java/CORBA virtual machine architecture for remote execution of optimization solvers in heterogeneous networks

Virtual machines for remote execution are a useful tool for utilizing light user interfaces and intensive application cores in different physical machines connected through the Internet. In a virtual machine, application cores are distributed in a network. Specific locations, operating systems and hardware characteristics are hidden by virtual machines. They make it possible to use a PC to execute user interfaces and (a few) high‐performance computers for application cores. We present a Java/CORBA‐based brokerage platform that allows remote execution of optimization solvers from a client running on any platform. The system offers a dynamic library of available problem solvers, and a graphic interface to browse several defined properties and metadata on available solvers. In addition, an embedded file compression module to reduce data transfer time is included as a plug‐in feature of the proposed virtual machine. Analogous systems could be constructed for applications in which interaction traffic time is much lower than execution time. Copyright © 2001 John Wiley & Sons, Ltd.     

A flexible data schema and system architecture for the virtualization of manufacturing machines (VMM)

Future factories will feature strong integration of physical machines and cyber-enabled software, working seamlessly to improve manufacturing production efficiency. In these digitally enabled and network connected factories, each physical machine on the shop floor can have its ‘virtual twin’ available in cyberspace. This ‘virtual twin’ is populated with data streaming in from the physical machines to represent a near real-time as-is state of the machine in cyberspace. This results in the virtualization of a machine resource to external factory manufacturing systems. This paper describes how streaming data can be stored in a scalable and flexible document schema based database such as MongoDB, a data store that makes up the virtual twin system. We present an architecture, which allows third-party integration of software apps to interface with the virtual manufacturing machines. We evaluate our database schema against query statements and provide examples of how third-party apps can interface with manufacturing machines using the VMM middleware. Finally, we discuss an operating system architecture for VMMs across the manufacturing cyberspace, which necessitates command and control of various virtualized manufacturing machines, opening new possibilities in cyber-physical systems in manufacturing.     

Performance Visualization on Monsoon

The performance of an applications program running on a parallel machine is affected by several factors such as the algorithm, the programming language, the compiler, and the operating system. Performance evaluation of parallel machines requires quick and easy-to-use analysis of large amounts of data. This paper describes a performance evaluation tool built for Monsoon, a multithreaded multiprocessor machine built by Motorola in collaboration with MIT. The tool offers integrated data collection, analysis, and visualization and is designed to be simple but powerful. Software layers built on top of simple hardware monitors offer a flexible, yet nonintrusive performance evaluation tool. Examples of successful use of the tool by both systems and applications programmers are included.     

Architecture and implementation of a shop-floor programming system for STEP-compliant CNC

STEP-NC (formalized as ISO 14649 and ISO 10303 AP238) is a new interface (or language) standard for the CAD-CAM-CNC chain, currently under establishment by ISO TC184 SC1 and SC4. Upon completion, it will replace ISO 6983, so called M & G codes used for CNC since 1950s. As the new language is being established, a new CNC controller called STEP-CNC (STEP-compliant CNC), capable of carrying out various intelligent tasks using the new language as an input, receives worldwide attention. Shop-floor programming (SFP) system is a computer-assisted part programming system interfaced with STEP-CNC. Its primary function is to generate part program in ISO 14649 (or STEP AP238) to machine the part geometry given by STEP AP203 or AP224 file. In this paper, we first present an architecture for the SFP system, followed by implementation technology including: (1) STEP physical file interpretation, (2) feature recognition, (3) process planning, (4) part program generation, and (5) verification. The developed methodology was implemented in a prototype called PosSFP, and tested with Korea STEP-NC system.     

基于QEMU的外部总线仿真技术

综合嵌入式系统通过外部总线实现各个子系统之间的通信连接。为解决综合嵌入式系统的接口测试问题,采用系统虚拟机仿真综合嵌入式系统的连接方式,通过在虚拟机中创建外部总线仿真模块,配置仿真模块的连接,从而实现虚拟机之间的通信。提出一种基于以太网通信的外部总线仿真结构,以CAN总线仿真为例,在全系统虚拟机QEMU的内部总线上配置与注册外部总线设备,为读写总线设备数据的接口建立共享内存,组织总线协议报文。实验结果表明,通过网络收发报文,可实现总线仿真节点模块之间的数据交换,从而达到仿真总线的数据通信功能。     

一个基于虚拟机的日志审计和分析系统

SNARE是Linux操作系统的一个日志审计和分析工具,但它容易受到攻击。提出了一个新的方法被用来保护它免受攻击。运用虚拟机监控器的功能,SNARE被移植到运行在虚拟机监控器Xen上的两个虚拟机中,SNARE的两个主要部分——Linux内核补丁和审计后台进程被分隔而分别放入两个被Xen强隔离的虚拟机。Xen提供了两个虚拟机间共享内存的机制,运用这一机制,运行在一个虚拟机上的Linux内核补丁记录并转移审计日志到运行在另一个虚拟机上的审计后台进程。与传统的SNARE相比,新方法使攻击者毁坏或篡改这些日志更加困难。初步的评估表明这个原型是简单而有效的。     

Virtual reality simulations and animations in a web-based interactive manufacturing engineering module

This paper presents a web-based interactive teaching package that provides a comprehensive and conducive yet dynamic and interactive environment for a module on automated machine tools in the Manufacturing Division at the National University of Singapore. The use of Internet technologies in this teaching tool makes it possible to conjure visualisations that cannot be achieved using traditional teaching materials such as transparencies. Virtual reality simulations and animations were developed and appropriately placed in the teaching materials to enhance the student understanding of complex concepts. This is especially useful in teaching automated machine tools, which deals primarily with the numerical control (NC) of the motions of automated machine tools. These virtual reality simulations and animations provide the capability of training students in NC programming and operations without the need to work on actual NC machines in the laboratory. The simulations are suitably placed in the package to engage the students and enhance their concentration, while at the same time generate interactions. Customised question types were also designed and implemented with a tutorial monitoring application.     

Android应用程序中的内存泄漏与规避方法

Android应用程序的主体采用Java编程语言实现,Java语言的一个显著特点是它通过Java虚拟机和垃圾回收机制管理大部分的内存事务,但是在Java程序中不可避免地存在着内存泄漏的问题。本文从造成Android应用程序内存泄漏的原因入手,对内存泄漏进行检测和定位。阐述了在编写应用程序时规避内存泄漏的方法,并分别介绍了一种内存监测工具和一种内存分析工具的使用方法。     

用户级多任务的两种实现方法

在分析了系统级多任务需要哪些硬件支持的基础上。提出了进程扩展型虚拟机和指令解释器型虚拟机的概念，给出这两种虚拟机如何模拟支持多任务的硬件机制的方法，以及在虚拟机上建立和切换多个任务的方法，该技术可以用于在上述两类虚拟机上构建自己的支持多任务的操作系统内核．     

An argument for simple COMA

We present design details and some initial performance results of a novel scalable shared memory multiprocessor architecture. This architecture features the automatic data migration and replication capabilities of cache-only memory architecture (COMA) machines, without the accompanying hardware complexity. A software layer manages cache space allocation at a page-granularity — similarly to distributed virtual shared memory (DVSM) systems —leaving simpler hardware to maintain shared memory coherence at a cache line granularity.

By reducing the hardware complexity, the machine cost and development time are reduced. We call the resulting hybrid hardware and software multiprocessor architecture Simple COMA. Preliminary results indicate that the performance of Simple COMA is comparable to that of more complex contemporary all-hardware designs.     

On the expressiveness of the approach to constructing PLC-programs by LTL-specification

The article is devoted to an approach to constructing and verification of discrete PLC-programs by LTL-specification. This approach provides a possibility of analysing the correctness of PLCprograms by using the model checking method. The linear temporal logic LTL is used as a language of specification of the program behavior. The correctness analysis of LTL-specification is automatically performed by the symbolic model checking tool Cadence SMV. The article demonstrates the consistency of the approach to constructing and verification of PLC programs by LTL-specification from the point of view of Turing power. It is proved that in accordance with this approach for any Minsky counter machine an LTL-specification can be built, which is used for machine implementation in any PLC programming language of standard IEC 61131-3. Minsky machines are equipollent to Turing machines, and the considered approach also has the Turing power. The proof focuses on representation of a counter machine behavior in the form of a set of LTL-formulas and matching these formulas to constructions of ST and SFC languages. SFC is interesting as a specific graphical language. ST is considered as a basic language because the implementation of a counter machine on IL, FBD/CFC and LD languages is reduced to rewriting blocks of an ST-program. The idea of the proof is demonstrated by an example of a Minsky 3-counter machine, which implements a function of squaring.     

基于STM32的智能手套机运动控制系统设计与开发

传统的纯机械齿轮结构自动针织手套机具有结构复杂、效率低下、故障率高、维护成本昂贵等诸多缺点,故多电机结构的智能伺服手套机成为新的发展方向。其中,智能手套机运动控制系统是决定其性能的关键。针对上述问题,设计开发了一款基于STM32F407高性能微处理器的智能手套机运动控制系统,系统实现了高速高精度的编织运动控制,并开发有网络监测、全中文示教编程等功能。同时,为解决主轴机头高速往返运行中存在的停顿现象,根据冲量定理规划其位置控制,针对带来的位置误差问题,设计了基于模糊逻辑的位置补偿控制算法,减小位置误差。最后,经过现场测试,系统能高效地完成手套编织工作,主轴机头重复定位精度高,且人机交互界面简洁易操作。本系统为智能手套机运动控制系统的开发应用提供较好的参考价值。