InGaAsP/InGaAs双结太阳电池的开路电压损耗抑制

现有1.0eV/0.75 eV InGaAsP/InGaAs双结太阳电池的开路电压小于各子电池的开路电压之和,鲜有研究探索开路电压损耗的来源以及如何抑制。通过研究发现,InGaAs底电池背场/基区界面处的少数载流子输运的主要机制是热离子发射,而不是缺陷诱导复合。SIMS测试表明,采用InP或InAlAs背场均不能有效抑制Zn掺杂剂的扩散。此外,由于生长过程中持续的高温热处理.,III-V族主元素在界面处发生了热扩散。为了抑制上述现象,提出了一种新型InP/InAlAs超晶格背场,并应用到InGaAs底电池中。制备得到的双结太阳电池在维持短路电流密度不变的情况下,开路电压提升到997.5 mV,与传统采用InP背场的双结太阳电池相比,开路电压损耗降低了30 mV。该研究成果对提升四结太阳电池的整体开路电压有重要意义。     

MOCVD生长InGaAs/InP体材料研究

首先给出在InP衬底上利用MOCVD法生长InP、InGaAs的生长条件，而后分别给出了InP／InP的生长特性，InGaAs／InP的组份控制和生长特性及生长温度对InGaAs特性的影响。     

InGaAs/GaAs应变量子阱激光器MOCVD生长研究

采用金属有机物化学气相淀积(MOCVD)方法生长了InGaAs/GaAs应变量子阱(QW),通过降低生长温度、提高生长速度以及采用应变缓冲层(SBL)结构,改善了应变QW生长表面质量和器件荧光(PL)谱特性,实验表明,通过优化工艺条件和采用SBL等手段提高了应变QW质量。生长的QW结构用于1054 nm激光器的制作,经测试,器件具有较低的阈值电流和较高的单面斜率效率,性能较好。     

InGaAsP/InGaAs双结太阳电池的开路电压损耗抑制（英文）

现有1.0 eV/0.75 eV InGaAsP/InGaAs双结太阳电池的开路电压小于各子电池的开路电压之和,鲜有研究探索开路电压损耗的来源以及如何抑制。通过研究发现,InGaAs底电池背场/基区界面处的少数载流子输运的主要机制是热离子发射,而不是缺陷诱导复合。SIMS测试表明,采用InP或InAlAs背场均不能有效抑制Zn掺杂剂的扩散。此外,由于生长过程中持续的高温热处理,Ⅲ-Ⅴ族主元素在界面处发生了热扩散。为了抑制上述现象,提出了一种新型InP/InAlAs超晶格背场,并应用到InGaAs底电池中。制备得到的双结太阳电池在维持短路电流密度不变的情况下,开路电压提升到997.5 mV,与传统采用InP背场的双结太阳电池相比,开路电压损耗降低了30 mV。该研究成果对提升四结太阳电池的整体开路电压有重要意义。     

一种低暗电流高响度InGaAs/InP pin光电探测器

分析了InGaAs/InP pin光电探测器暗电流和响应度的影响因素,并对MOCVD外延工艺以及器件结构进行优化,从而提高器件响应度和降低暗电流。采用低压金属有机化学气相沉积设备(LP-MOCVD)成功制备了InGaAs/InP pin光电探测器,得到了高质量的晶体材料,InGaAs吸收层的背景浓度低于4×1014 cm-3。利用扩Zn工艺制作出感光区直径为70μm的平面光电探测器。测量结果显示,在反偏电压为5 V时,暗电流小于0.05 nA,电容约为0.4 pF。此外,在1 310 nm激光的辐照下,器件的响应度可达0.96 A/W以上。     

失配异质结构InGaAs/InP的MOCVD生长

基于延展波长(截止波长2.2μm)InGaAs-PIN光电探测器进行了失配异质结构InxGa1-xAs(x=0.72)/InP的MOCVD外延生长研究。采用宽带隙组分梯度渐变的InAlAs作为缓冲层和顶层,通过生长优化,获得了满足器件要求的外延材料。     

12 GHz GaAs/InGaAs异质结双栅功率场效应晶体管

报道了GaAs／InGaAs异质结双杨功率场效应晶体管的设计考虑、器件结构和制作，讨论了所采用的一些关键工艺，给出了器件性能。在12GHz下，最大输出功率≥130mW，增益≥12dB，功率附加效率≥30％。     

双异质结扩展波长InGaAs PIN光电探测器暗电流研究

模拟分析了三种不同结构的双异质结扩展波长In0.78Ga0.22As PIN光电探测器在室温下的暗电流特性,并与器件的实际测量结果进行了比较和讨论。结果表明,对于扩展波长的探测器,零偏压附近暗电流主要为反向扩散电流,随着反向偏压增加,产生复合电流和欧姆电流逐渐起主要作用。在InAlAs/InGaAs异质界面处引入的数字递变超晶格以及外延初始生长的InP缓冲层能够有效地改善探测器的暗电流特性。     

Optimizing back surface field for improving Voc of(Al)GaInP solar cell

GaInP and AlGaInP solar cells were grown by metal organic chemical vapor deposition (MOCVD), and theoretical analysis demonstrated that hetero-interface recombination velocity plays an important role in the optimizing of cell performance, especially the interface between base layer and back surface field (BSF). Measurements including lattice-matched growth and pseudo-BSF were taken to optimize BSF design. Significant improvement of V_oc in GaInP and AlGaInP solar cells imply that the measures we took are effective and promising for performance improvement in the next generation high efficiency solar cells.     

InP／InGaAs异质结双极晶体管研究

阐述了ＩｎＰ／ＩｎＧａＡｓ异质结双极晶体管的最新发展动态，重点讨论了ＨＢＴ的结构与性能以及ＨＢＴ ＩＣ的高速性能与可靠性问题。     

Enhanced efficiency in GaInP/GaAs tandem solar cells using carbon doped GaAs in tunnel junction

Carbon doping of GaAs using CBr₄ (carbon tetrabromide) in metal-organic chemical vapor deposition (MOCVD) was investigated to obtain very high and sharp doping profiles required for tunnel junction in tandem solar cells. It was found that the hole concentration increased with decreasing growth temperature and V/III ratio. Hole doping profiles versus distance from the sample surface showed that the hole concentration near the surface was very low in comparison with that far below the surface. As a post-growth treatment, CBr₄ was supplied during the cool down process and produced almost constant hole concentration of 1 × 10²⁰ cm⁻³ regardless of the depth, when CBr₄ flow rate was 9.53 μmol/min. Based on these results, solar cells were fabricated using both carbon (C) and zinc (Zn) as a p-type dopant. It was shown that C doping exhibits higher efficiency and lower series resistance than those of Zn doping in GaInP/GaAs tandem solar cells.     

直接键合四结GaAs太阳电池研究

晶圆直接键合技术由于能将表面洁净的两个晶圆集成到一起,从而可以用来制备晶格失配 III-V族多结太阳电池。为了制备GaInP/GaAs/InGaAsP/InGaAs四结太阳电池,需采用具有低电阻率的GaAs/InP键合界面,从而实现GaInP/GaAs和InGaAsP/InGaA上下两个子电池的电学导通。我们设计并研究了具有不同掺杂元素和掺杂浓度的三种键合界面,并采用IV曲线对其电学性质进行表征。此外,对影响键合界面质量的关键工艺过程进行了研究,主要包括表面清洗技术和键合参数优化,例如键合温度、键合压力和键合时间等。最终制备出的键合四结GaInP/GaAs/InGaAsP/InGaAs太阳电池在AM0条件下效率最高达33.2%。     

InGaAs/InP材料的MOCVD生长研究

研究了InGaAs/InP材料的MOCVD生长技术和材料的性能特征。InP衬底的晶向偏角能够明显影响外延生长模型以及外延层的表面形貌,用原子力显微镜(AFM)观察到了外延层表面原子台阶的聚集现象(step-bunching现象),通过晶体表面的原子台阶密度和二维生长模型解释了台阶聚集现象的形成。对外延材料进行化学腐蚀,通过双晶X射线衍射(DCXRD)分析发现异质结界面存在应力,用异质结界面岛状InAs富集解释了应力的产生。通过严格控制InGaAs材料的晶格匹配,并优化MOCVD外延生长工艺,制备出厚层InGaAs外延材料,获得了低于1×1015cm-3的背景载流子浓度和良好的晶体质量。     

MOCVD生长InGaAs／Alj0.2Ga0.8As应变多量子阱

用MOCVD方法生长了3种InGaAs/Al0.2Ga0.8As应变多量子阱（MQWs）样品，用于研究在气相中TMIn的含量对MQWs的发光波长和半峰宽（FWHM）以及在X射线中零级峰位的影响。研究表明，随着In组分在MQW中的增加，MQWs中应变也随之增加，这是造成FWHM增大的原因。同时也研究了应变MQWs中In组分与气相中TMIn含量的关系，为准确设计和控制MQWs的组分提供了依据。     

Strain from modified interface compositions in InGaAs/InP superlattices

Thin strained regions have been inserted at the interfaces of lattice-matched InGaAs/lnP superlattices to assess growth conditions for tailoring of localized compositional changes and for studying As-P intermixing behavior during heterojunction growth. Also, precise growth rates of binary composition layers were determined from specially designed superlattices using strained layers of common anion compounds inserted periodically into InP and GaAs. Growth rates of fractional monolayers are found to be identical to thick layer growth rates. When thin InAs, GaAs, GaP, ALAs, or AIP layers were inserted at the InGaAs/lnP heterojunctions, the measured strain at either one or both interfaces was equal to the strain predicted from the growth rate x time product. Excess strain seen in some cases is due to a change in As-P intermixing and this component can be separated from the predicted strain. Insertion of Ga-compounds at the InP-grown-on-InGaAs interface causes interface roughening which degrades the superlattice. For all other compositions the thin, highly strained regions are not detrimental to the crystalline quality of the periodic structure.     

Temperature dependence of InAs/GaAs quantum dots solar photovoltaic devices

This paper presents the temperature dependence measurements characterisation of several InAs/GaAs quantum dots （QDs） solar cell devices. The devices with cylindrical geometry were fabricated and characterised on-wafer under 20 suns in a temperature range from 300°K to 430°K. The temperature dependence parameters such as open circuit voltage, short circuit density current, fill factor and efficiency are studied in detail. The increase of temperature produces an enhancement of the short circuit current. However, the open circuit voltage is degraded because the temperature increases the recombination phenomena involved, as well as reducing the effective band gap of the semiconductor.     

Evaluation of encapsulation and passivation of InGaAs/InP DHBT devices for long-term reliability

Device encapsulation and passivation are critical for long-term reliability and stability. Several encapsulation techniques were evaluated in terms of degradation of electrical characteristics, gap filling under the mesa structures, and adhesion to the semiconductor and metal surfaces. These included plasma enhanced chemical vapor deposited (PECVD) SiO₂, electron cyclotron resonance CVD SiN_x, spin-on glass, benzocyclobutene, and polyimide. Damage from plasma exposure caused gain degradation in the devices. Spin-on coatings cause little to no gain degradation, provided that there is minimal stress in the cured film. SOG and BCB films have acceptable adhesion properties and were excellent for gap filling. Polyimide films have excellent adhesion properties, however, they were poor at gap filling and had a great deal of shrinkage during curing. Device passivation was evaluated using double heterojunction bipolar transistor structures with either an abrupt or graded emitter-base junction. Abrupt junction devices had the self-aligned base metal directly on the p⁺ InGaAs base. Graded junction devices had the base metal on top of graded InGaAsP layers, which the metal was diffused through, to make contact to the base region. Abrupt junction devices stressed at an initial J_E of 90 kA/cm² at a V_CE of 2V at 25°C degraded 20% within 70 h of operation, whereas, the graded junction devices show no degradation in dc characteristics after operation for over 500 h. Typical common emitter current gain was 50. An f_t of 80 and f_max of 155 GHz were achieved for 2×4 μm² emitter size devices.