Understanding the Crystal Packing and Organic Thin‐Film Transistor Performance in Isomeric Guest–Host Systems

In order to understand how additives influence the structure and electrical properties of active layers in thin‐film devices, a compositionally identical but structurally different guest–host system based on the syn and anti isomers of triethylsilylethynyl anthradithiophene (TES ADT) is systematically explored. The mobility of organic thin‐film transistors (OTFTs) comprising anti TES ADT drops with the addition of only 0.01% of the syn isomer and is pinned at the mobility of OTFTs having pure syn isomer after the addition of only 10% of the isomer. As the syn isomer fraction increases, intermolecular repulsion increases, resulting in a decrease in the unit‐cell density and concomitant disordering of the charge‐transport pathway. This molecular disorder leads to an increase in charge trapping, causing the mobility of OTFTs to drop with increasing syn‐isomer concentration. Since charge transport is sensitive to even minute fractions of molecular disorder, this work emphasizes the importance of prioritizing structural compatibility when choosing material pairs for guest–host systems.     

Decoupling the Effects of Self‐Assembled Monolayers on Gold,Silver, and Copper Organic Transistor Contacts

In bottom‐contact organic field‐effect transistors (OFETs), the functionalization of source/drain electrodes leads to a tailored surface chemistry for film growth and controlled interface energetics for charge injection. This report describes a comprehensive investigation into separating and correlating the energetic and morphological effects of a self‐assembled monolayers (SAMs) treatment on Au, Ag, and Cu electrodes. Fluorinated 5,11‐bis(triethylsilylethynyl) anthradithiophene (diF‐TES‐ADT) and pentafluorobenzenethiol (PFBT) are employed as a soluble small‐molecule semiconductor and a SAM material, respectively. Upon SAM modification, the Cu electrode devices benefit from a particularly dramatic performance improvement, closely approaching the performance of OFETs with PFBT‐Au and PFBT‐Ag. Ultraviolet photoemission spectroscopy, polarized optical microscopy, grazing‐incidence wide‐angle X‐ray scattering elucidate the metal work function change and templated crystal growth with high crystallinity resulting from SAMs. The transmission‐line method separates the channel and contact properties from the measured OFET current–voltage data, which conclusively describes the impact of the SAMs on charge injection and transport behavior.     

Novel Tunnel‐Contact‐Controlled IGZO Thin‐Film Transistors with High Tolerance to Geometrical Variability

Thin insulating layers are used to modulate a depletion region at the source of a thin‐film transistor. Bottom contact, staggered‐electrode indium gallium zinc oxide transistors with a 3 nm Al₂O₃ layer between the semiconductor and Ni source/drain contacts, show behaviors typical of source‐gated transistors (SGTs): low saturation voltage (V_{D_SAT} ≈ 3 V), change in V_{D_SAT} with a gate voltage of only 0.12 V V^?1, and flat saturated output characteristics (small dependence of drain current on drain voltage). The transistors show high tolerance to geometry: the saturated current changes only 0.15× for 2–50 µm channels and 2× for 9‐45 µm source‐gate overlaps. A higher than expected (5×) increase in drain current for a 30 K change in temperature, similar to Schottky‐contact SGTs, underlines a more complex device operation than previously theorized. Optimization for increasing intrinsic gain and reducing temperature effects is discussed. These devices complete the portfolio of contact‐controlled transistors, comprising devices with Schottky contacts, bulk barrier, or heterojunctions, and now, tunneling insulating layers. The findings should also apply to nanowire transistors, leading to new low‐power, robust design approaches as large‐scale fabrication techniques with sub‐nanometer control mature.     

High‐Performance Vertical Organic Transistors

Vertical organic thin‐film transistors (VOTFTs) are promising devices to overcome the transconductance and cut‐off frequency restrictions of horizontal organic thin‐film transistors. The basic physical mechanisms of VOTFT operation, however, are not well understood and VOTFTs often require complex patterning techniques using self‐assembly processes which impedes a future large‐area production. In this contribution, high‐performance vertical organic transistors comprising pentacene for p‐type operation and C₆₀ for n‐type operation are presented. The static current–voltage behavior as well as the fundamental scaling laws of such transistors are studied, disclosing a remarkable transistor operation with a behavior limited by injection of charge carriers. The transistors are manufactured by photolithography, in contrast to other VOTFT concepts using self‐assembled source electrodes. Fluorinated photoresist and solvent compounds allow for photolithographical patterning directly and strongly onto the organic materials, simplifying the fabrication protocol and making VOTFTs a prospective candidate for future high‐performance applications of organic transistors.     

Formation of Single Tiers of Bridging Silicon Nanowires for Transistor Applications Using Vapor–Liquid–Solid Growth from Short Silicon‐on‐Insulator Sidewalls

Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon‐on‐insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vapor–liquid–solid (VLS) process. The growth of unobstructed nanowire material occurs due to the attachment of catalyst nanoparticles on silicon surfaces and the removal of catalyst nanoparticles from the SOI‐buried oxide (BOX). Three‐terminal current–voltage measurements of the structure using the substrate as a planar backgate after VLS nanowire growth reveal transistor behaviour characteristics.     

Annealing‐Induced Hardening in Ultrafine‐Grained Ni–Mo Alloys

The influence of Mo alloying on annealing‐induced hardening in ultrafine‐grained (UFG) Ni is studied. The hardening observed after low temperature annealing is explained by the annihilation of mobile dislocations and a concomitant clustering of the remaining dislocations into low energy configurations. This study reveals that, with increasing Mo concentration, the hardening effect decreases as the Mo solute atoms hinder the annihilation and rearrangement of dislocations. This trend is the opposite to that observed in electrodeposited Ni–Mo alloys where the larger alloying element concentration yields a higher annealing‐induced strengthening effect. The difference is attributed to the different deformation mechanisms in UFG and nanocrystalline Ni–Mo alloys.

     

Inside Front Cover: Nanoscale Surface Morphology and Rectifying Behavior of a Bulk Single‐Crystal Organic Semiconductor (Adv. Mater. 12/2006)

Local surface measurements of rubrene single crystals reveal interesting insights on carrier‐transport mechanisms at the active interface of high‐performance field‐effect “air‐gap stamp” transistors, as reported by Fichou, Rogers, and co‐workers on p. 1552. Scanning tunneling microscopy (STM, tip shown schematically) images, combined with atomic force microscopy and X‐ray diffraction, reveal directly the position and orientation of individual molecules in the a–b plane. Local current–voltage curves recorded using STM in the dark and under illumination indicate a rectifying p‐type behavior.     

Effects of Water and Different Solutes on Carbon‐Nanotube Low‐Voltage Field‐Effect Transistors

Semiconducting single‐walled carbon nanotubes (swCNTs) are a promising class of materials for emerging applications. In particular, they are demonstrated to possess excellent biosensing capabilities, and are poised to address existing challenges in sensor reliability, sensitivity, and selectivity. This work focuses on swCNT field‐effect transistors (FETs) employing rubbery double‐layer capacitive dielectric poly(vinylidene fluoride‐co‐hexafluoropropylene). These devices exhibit small device‐to‐device variation as well as high current output at low voltages (<0.5 V), making them compatible with most physiological liquids. Using this platform, the swCNT devices are directly exposed to aqueous solutions containing different solutes to characterize their effects on FET current–voltage (FET I–V) characteristics. Clear deviation from ideal characteristics is observed when swCNTs are directly contacted by water. Such changes are attributed to strong interactions between water molecules and sp²‐hybridized carbon structures. Selective response to Hg²⁺ is discussed along with reversible pH effect using two distinct device geometries. Additionally, the influence of aqueous ammonium/ammonia in direct contact with the swCNTs is investigated. Understanding the FET I–V characteristics of low‐voltage swCNT FETs may provide insights for future development of stable, reliable, and selective biosensor systems.     

N‐Doped Graphene Field‐Effect Transistors with Enhanced Electron Mobility and Air‐Stability

Although graphene can be easily p‐doped by various adsorbates, developing stable n‐doped graphene that is very useful for practical device applications is a difficult challenge. We investigated the doping effect of solution‐processed (4‐(1,3‐dimethyl‐2,3‐dihydro‐1H‐benzoimidazol‐2‐yl)phenyl)dimethylamine (N‐DMBI) on chemical‐vapor‐deposited (CVD) graphene. Strong n‐type doping is confirmed by Raman spectroscopy and the electrical transport characteristics of graphene field‐effect transistors. The strong n‐type doping effect shifts the Dirac point to around ‐140 V. Appropriate annealing at a low temperature of 80 ºC enables an enhanced electron mobility of 1150 cm² V^?1 s^?1. The work function and its uniformity on a large scale (1.2 mm × 1.2 mm) of the doped surface are evaluated using ultraviolet photoelectron spectroscopy and Kelvin probe mapping. Stable electrical properties are observed in a device aged in air for more than one month.     

Printing Semiconductor–Insulator Polymer Bilayers for High‐Performance Coplanar Field‐Effect Transistors

Source–semiconductor–drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next‐generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross‐talk among different devices, and simplify the fabrication process of circuits. Here, a one‐step, drop‐casting‐like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3‐hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO₂ dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor–insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor–insulator bilayer structure is an ideal system for injecting charges into the insulator via gate‐stress, and the thus‐formed PS electret layer acts as a “nonuniform floating gate” to tune the threshold voltage and effective mobility of the transistors. Effective field‐effect mobility higher than 1 cm² V^?1 s^?1 with an on/off ratio > 10⁷ is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits.     

Photoelectrical Response in Single‐Layer Graphene Transistors

The illumination of single‐layer graphene (SLG) transistors with visible light causes a negative shift in their transfer curves, attributable to the desorption of oxygen. However, their hysteresis is not affected by illumination, which suggests that charge traps are not affected by the visible‐light exposure. When SLG transistors are covered with a layer of photoactive polymer, the photodesorption‐induced current change in the transistors becomes less significant than the effects caused by the surrounding photoactive polymer. These observations demonstrate that the photoelectrical response of SLG transistors is dominated by extrinsic mechanisms rather than by the direct photocurrent process. The results suggest a new strategy for achieving light detection. The large cross section of SLG films for receiving photons and the capability of tailoring photoelectrical properties on them is potentially useful for optoelectronic applications.     

Trap Healing for High‐Performance Low‐Voltage Polymer Transistors and Solution‐Based Analog Amplifiers on Foil

Solution‐processed semiconductors such as conjugated polymers have great potential in large‐area electronics. While extremely appealing due to their low‐temperature and high‐throughput deposition methods, their integration in high‐performance circuits has been difficult. An important remaining challenge is the achievement of low‐voltage circuit operation. The present study focuses on state‐of‐the‐art polymer thin‐film transistors based on poly(indacenodithiophene‐benzothiadiazole) and shows that the general paradigm for low‐voltage operation via an enhanced gate‐to‐channel capacitive coupling is unable to deliver high‐performance device behavior. The order‐of‐magnitude longitudinal‐field reduction demanded by low‐voltage operation plays a fundamental role, enabling bulk trapping and leading to compromised contact properties. A trap‐reduction technique based on small molecule additives, however, is capable of overcoming this effect, allowing low‐voltage high‐mobility operation. This approach is readily applicable to low‐voltage circuit integration, as this work exemplifies by demonstrating high‐performance analog differential amplifiers operating at a battery‐compatible power supply voltage of 5 V with power dissipation of 11 µW, and attaining a voltage gain above 60 dB at a power supply voltage below 8 V. These findings constitute an important milestone in realizing low‐voltage polymer transistors for solution‐based analog electronics that meets performance and power‐dissipation requirements for a range of battery‐powered smart‐sensing applications.     

Room‐Temperature Solution‐Synthesized p‐Type Copper(I) Iodide Semiconductors for Transparent Thin‐Film Transistors and Complementary Electronics

Here, room‐temperature solution‐processed inorganic p‐type copper iodide (CuI) thin‐film transistors (TFTs) are reported for the first time. The spin‐coated 5 nm thick CuI film has average hole mobility (µ_FE) of 0.44 cm² V^?1 s^?1 and on/off current ratio of 5 × 10². Furthermore, µ_FE increases to 1.93 cm² V^?1 s^?1 and operating voltage significantly reduces from 60 to 5 V by using a high permittivity ZrO₂ dielectric layer replacing traditional SiO₂. Transparent complementary inverters composed of p‐type CuI and n‐type indium gallium zinc oxide TFTs are demonstrated with clear inverting characteristics and voltage gain over 4. These outcomes provide effective approaches for solution‐processed inorganic p‐type semiconductor inks and related electronics.     

Reversible and Precisely Controllable p/n‐Type Doping of MoTe2 Transistors through Electrothermal Doping

Precisely controllable and reversible p/n‐type electronic doping of molybdenum ditelluride (MoTe₂) transistors is achieved by electrothermal doping (E‐doping) processes. E‐doping includes electrothermal annealing induced by an electric field in a vacuum chamber, which results in electron (n‐type) doping and exposure to air, which induces hole (p‐type) doping. The doping arises from the interaction between oxygen molecules or water vapor and defects of tellurium at the MoTe₂ surface, and allows the accurate manipulation of p/n‐type electrical doping of MoTe₂ transistors. Because no dopant or special gas is used in the E‐doping processes of MoTe₂, E‐doping is a simple and efficient method. Moreover, through exact manipulation of p/n‐type doping of MoTe₂ transistors, quasi‐complementary metal oxide semiconductor adaptive logic circuits, such as an inverter, not or gate, and not and gate, are successfully fabricated. The simple method, E‐doping, adopted in obtaining p/n‐type doping of MoTe₂ transistors undoubtedly has provided an approach to create the electronic devices with desired performance.     

Magnetic‐Induced‐Piezopotential Gated MoS2 Field‐Effect Transistor at Room Temperature

Utilizing magnetic field directly modulating/turning the charge carrier transport behavior of field‐effect transistor (FET) at ambient conditions is an enormous challenge in the field of micro–nanoelectronics. Here, a new type of magnetic‐induced‐piezopotential gated field‐effect‐transistor (MIPG‐FET) base on laminate composites is proposed, which consists of Terfenol‐D, a ferroelectric single crystal (PMNPT), and MoS₂ flake. When applying an external magnetic field to the MIPG‐FET, the piezopotential of PMNPT triggered by magnetostriction of the Terfenol‐D can serve as the gate voltage to effectively modulate/control the carrier transport process and the corresponding drain current at room temperature. Considering the two polarization states of PMNPT, the drain current is diminished from 9.56 to 2.9 µA in the P_up state under a magnetic field of 33 mT, and increases from 1.41 to 4.93 µA in the P_down state under a magnetic field of 42 mT and at a drain voltage of 3 V. The current on/off ratios in these states are 330% and 432%, respectively. This work provides a novel noncontact coupling method among magnetism, piezoelectricity, and semiconductor properties, which may have extremely important applications in magnetic sensors, memory and logic devices, micro‐electromechanical systems, and human–machine interfacing.     

Carbohydrate‐Based Block Copolymer Thin Films: Ultrafast Nano‐Organization with 7 nm Resolution Using Microwave Energy

Block copolymers (BCP) can self‐assemble into nanoscale patterns with a wide variety of applications in the semiconductor industry. The self‐assembly of BCPs is commonly accomplished by solvent vapor or thermal annealing, but generally these methods require long time (few hours) to obtain nanostructured thin films. In this contribution, a new and ultrafast method (using microwaves) is proposed—high temperature solvent vapor annealing (HTSVA), combining solvent vapor annealing with thermal annealing, to achieve fast and controllable self‐assembly of amphiphilic BCP thin films. A promising carbohydrate‐based BCP capable of forming cylindrical patterns with some of the smallest feature sizes is used for demonstrating how to obtain a highly ordered vertical cylindrical pattern with sub‐10 nm feature sizes in few seconds by HTSVA. HTSVA provides not only a simple way to achieve BCP fast self‐assembly in practical applications but also a tool to study the self‐assembly behavior of BCPs under extreme conditions.     

Controlled Deposition of Crystalline Organic Semiconductors for Field‐Effect‐Transistor Applications

The search for low‐cost, large‐area, flexible devices has led to a remarkable increase in the research and development of organic semiconductors, which serve as one of the most important components for organic field‐effect transistors (OFETs). In the current review, we highlight deposition techniques that offer precise control over the location or in‐plane orientation of organic semiconductors. We focus on various vapor‐ and solution‐processing techniques for patterning organic single crystals in desired locations. Furthermore, the alignment of organic semiconductors via different methods relying on mechanical forces, alignment layers, epitaxial growth, and external magnetic and electric fields are surveyed. The advantages, limitations, and applications of these techniques in OFETs are also discussed.     

Controllable P‐ and N‐Type Conversion of MoTe2 via Oxide Interfacial Layer for Logic Circuits

To realize basic electronic units such as complementary metal‐oxide‐semiconductor (CMOS) inverters and other logic circuits, the selective and controllable fabrication of p‐ and n‐type transistors with a low Schottky barrier height is highly desirable. Herein, an efficient and nondestructive technique of electron‐charge transfer doping by depositing a thin Al₂O₃ layer on chemical vapor deposition (CVD)‐grown 2H‐MoTe₂ is utilized to tune the doping from p‐ to n‐type. Moreover, a type‐controllable MoTe₂ transistor with a low Schottky barrier height is prepared. The selectively converted n‐type MoTe₂ transistor from the p‐channel exhibits a maximum on‐state current of 10 µA, with a higher electron mobility of 8.9 cm² V^?1 s^?1 at a drain voltage (V_ds) of 1 V with a low Schottky barrier height of 28.4 meV. To validate the aforementioned approach, a prototype homogeneous CMOS inverter is fabricated on a CVD‐grown 2H‐MoTe₂ single crystal. The proposed inverter exhibits a high DC voltage gain of 9.2 with good dynamic behavior up to a modulation frequency of 1 kHz. The proposed approach may have potential for realizing future 2D transition metal dichalcogenide‐based efficient and ultrafast electronic units with high‐density circuit components under a low‐dimensional regime.     

Non‐Volatile Ferroelectric Memory with Position‐Addressable Polymer Semiconducting Nanowire

One‐dimensional nanowires (NWs) have been extensively examined for numerous potential nano‐electronic device applications such as transistors, sensors, memories, and photodetectors. The ferroelectric‐gate field effect transistors (Fe‐FETs) with semiconducting NWs in particular in combination with ferroelectric polymers as gate insulating layers have attracted great attention because of their potential in high density memory integration. However, most of the devices still suffer from low yield of devices mainly due to the ill‐control of the location of NWs on a substrate. NWs randomly deposited on a substrate from solution‐dispersed droplet made it extremely difficult to fabricate arrays of NW Fe‐FETs. Moreover, rigid inorganic NWs were rarely applicable for flexible non‐volatile memories. Here, we present the NW Fe‐FETs with position‐addressable polymer semiconducting NWs. Polymer NWs precisely controlled in both location and number between source and drain electrode were achieved by direct electrohydrodynamic NW printing. The polymer NW Fe‐FETs with a ferroelectric poly(vinylidene fluoride‐co‐trifluoroethylene) exhibited non‐volatile ON/OFF current margin at zero gate voltage of approximately 10² with time‐dependent data retention and read/write endurance of more than 10⁴ seconds and 10² cycles, respectively. Furthermore, our device showed characteristic bistable current hysteresis curves when being deformed with various bending radii and multiple bending cycles over 1000 times.     

Quasi‐Solid‐State Single‐Atom Transistors

The single‐atom transistor represents a quantum electronic device at room temperature, allowing the switching of an electric current by the controlled and reversible relocation of one single atom within a metallic quantum point contact. So far, the device operates by applying a small voltage to a control electrode or “gate” within the aqueous electrolyte. Here, the operation of the atomic device in the quasi‐solid state is demonstrated. Gelation of pyrogenic silica transforms the electrolyte into the quasi‐solid state, exhibiting the cohesive properties of a solid and the diffusive properties of a liquid, preventing the leakage problem and avoiding the handling of a liquid system. The electrolyte is characterized by cyclic voltammetry, conductivity measurements, and rotation viscometry. Thus, a first demonstration of the single‐atom transistor operating in the quasi‐solid‐state is given. The silver single‐atom and atomic‐scale transistors in the quasi‐solid‐state allow bistable switching between zero and quantized conductance levels, which are integer multiples of the conductance quantum G₀ = 2e²/h. Source–drain currents ranging from 1 to 8 µA are applied in these experiments. Any obvious influence of the gelation of the aqueous electrolyte on the electron transport within the quantum point contact is not observed.