An infrared-bi-color Schottky-barrier CCD image sensor for precisethermal images

An infrared-bi-color image sensor was developed with a barrier height controlled Schottky-barrier photo diode array for precise temperature images. Low and high barrier height diode pixels are arranged vertically next to one another using a selective area ion implantation technique. Conventional monochrome infrared image sensors frequently give wrong temperature images due to an unreasonable emissivity assumption. The infrared-bi-color image sensor can obtain the temperature image precisely with regard to the emissivity of the object     

Collection efficiency and transfer characteristics of CID image sensors

The collection process of the photogenerated charge in charge-injection device (CID) image sensors is examined and a method is presented by which the collection efficiency can be calculated. Numerical techniques are utilized in the analysis. The method is applied to a specific epitaxial type structure. The contribution of the depleted and undepleted regions to the total collection efficiency of the sensor is calculated.The relation between output signal charge and incident light intensity is also investigated. It is shown that the collection efficiency decreases with increasing signal charge and this results in non-linear transfer characteristics at high signal levels.     

Combined image signal processing for CMOS image sensors

An efficient image signal processing structure is proposed for CMOS image sensors to achieve low area and power consumption. In the proposed structure, the gamma correction block is moved to the front to merge several image signal processings into one block. An efficient compensation scheme is also proposed to reduce the errors caused by the moving of the nonlinear gamma correction. Experimental results show that the proposed structure reduces area and power consumption by 23.8 and 31.1%, respectively.     

Comparison of characteristics of n-channel and p-channel MOSFET's for VLSI's

A comparison of device characteristics of n-channel and p-channel MOSFET's is made from the overall viewpoint of VLSI construction. Hot-carrier-related device degradation of device reliability, as well as effective mobility, is elaborately measured for devices having effective channel lengths of 0.5-5 µm. From these experiments, it is found that hot-electron injection due to impact ionization at the drain, rather than "lucky hot holes," imposes a new constraint on submicrometer p-channel device design, though p-channel devices have been reported to have much less trouble with hot-carrier effects than n-channel devices do. Additionally, p-channel devices are found to surpass n-channel devices in device reliability in that they have a highest applicable voltage BVDCthat is more than two times as high as for n-channel devices. It is also experimentally confirmed that the effective hole mobility approaches the effective electron mobility when effective channel lengthL_{eff} < 0.5µm. These significant characteristics of p-channel devices imply that p-channel devices have important advantages over n-channel devices for realization of sophisitcated VLSI's with submicrometer dimensions. It is also shown that hot holes, which may create surface states or trap centers, play an important role in such hot-carrier-induced device degradation as transconductance degradation.     

Improved subthreshold characteristics of n-channel SOI transistors

It has been found that certain n-channel MOSFET's fabricated on silicon-on-insulator (SOI) substrates formed by oxygen implantation can havelog (I_{d}): V_{gs}, characteristics with very steep slopes in the subthreshold region. In contradiction to normal models for short-channel transistors on bulk silicon, the slope becomes steeper for shorter gate lengths or higher drain voltages. This effect is shown to be related to the kink in the output characteristics of transistors with floating islands.     

Improvement of InP MISFET characteristics using infra-red lamp annealing

An infra-red lamp-annealing technique was employed for postannealing Si ion-implanted InP substrates. The effective electron mobility (?eff) of SiO2-InP metal-insulator-semiconductor field-effect transistors fabricated using infrared lamp annealing is remarkably temperature-dependent. The maximum ?eff is ? 11000 cm2/Vs at 75 K and 1500?2500 cm2/Vs at room temperature.     

Transient characteristics of n-channel hybrid Schottky injectionFETs

Theoretical transient characteristics of hybrid Schottky injection FETs (HSINFETs) are considered. The theoretical analysis is based on two-dimensional numerical simulations, in which the entire turn-off process and the effects of minority-carrier injection levels on the transient performance of the HSINFET device are analyzed. The analysis shows that the fast turn-off speed in the HSINFET device occurs because (1) only a small number of minority carriers is injected into the drift region, (2) a current path, provided by the Schottky contact, effectively removes electrons from the drift region during turn-off, and (3) Schottky clamping at the anode is effective during turn-off and prevents the p⁺ portion of the hybrid anode from significantly injecting holes. Experimental results compared the DC and transient performance of the lateral double-diffused MOS transistor (LDMOST), lateral insulated-gate transistor (LIGT), Schottky injection field-effect (SINFET), and HSINFET are presented     

增强型自对准源漏区AlN/GaN/AlN 氮极化金属绝缘半导体场效应晶体管的静态特性与短沟道效应的研究

This paper aims to simulate the I–V static characteristic of the enhancement-mode(E-mode) Npolar Ga N metal–insulator–semiconductor field effect transistor(MISFET) with self-aligned source/drain regions.Firstly, with SILVACO TCAD device simulation, the drain–source current as a function of the gate–source voltage is calculated and the dependence of the drain–source current on the drain–source voltage in the case of different gate–source voltages for the device with a 0.62 m gate length is investigated. Secondly, a comparison is made with the experimental report. Lastly, the transfer characteristic with different gate lengths and different buffer layers has been performed. The results show that the simulation is in accord with the experiment at the gate length of 0.62 m and the short channel effect becomes pronounced as gate length decreases. The E-mode will not be held below a100 nm gate length unless both transversal scaling and vertical scaling are being carried out simultaneously.     

CMOS image sensors for sensor networks

We report on two generations of CMOS image sensors with digital output fabricated in a 0.6 μm CMOS process. The imagers embed an ALOHA MAC interface for unfettered self-timed pixel read-out targeted to energy-aware sensor network applications. Collision on the output is monitored using contention detector circuits. The image sensors present very high dynamic range and ultra-low power operation. This characteristics allow the sensor to operate in different lighting conditions and for years on the sensor network node power budget. Eugenio Culurciello (S’97–M’99) received the Ph.D. degree in Electrical and Computer Engineering in 2004 from Johns Hopkins University, Baltimore, MD. In July 2004 he joined the department of Electrical Engineering at Yale University, where he is currently an assistant professor. He founded and instrumented the E-Lab laboratory in 2004. His research interest is in analog and mixed-mode integrated circuits for biomedical applications, sensors and networks, biological sensors, Silicon on Insulator design and bio-inspired systems. Andreas G. Andreou received his Ph.D. in electrical engineering and computer science in 1986 from Johns Hopkins University. Between 1986 and 1989 he held post-doctoral fellow and associate research scientist positions in the Electrical and Computer engineering department while also a member of the professional staff at the Johns Hopkins Applied Physics Laboratory. Andreou became an assistant professor of Electrical and Computer engineering in 1989, associate professor in 1993 and professor in 1996. He is also a professor of Computer Science and of the Whitaker Biomedical Engineering Institute and director of the Institute’s Fabrication and Lithography Facility in Clark Hall. He is the co-founder of the Johns Hopkins University Center for Language and Speech Processing. Between 2001 and 2003 he was the founding director of the ABET accredited undergraduate Computer Engineering program. In 1996 and 1997 he was a visiting professor of the computation and neural systems program at the California Institute of Technology. In 1989 and 1991 he was awarded the R.W. Hart Prize for his work on mixed analog/digital integrated circuits for space applications. He is the recipient of the 1995 and 1997 Myril B. Reed Best Paper Award and the 2000 IEEE Circuits and Systems Society, Darlington Best Paper Award. During the summer of 2001 he was a visiting professor in the department of systems engineering and machine intelligence at Tohoku University. In 2006, Prof. Andreou was elected as an IEEE Fellow and a distinguished lecturer of the IEEE EDS society. Andreou’s research interests include sensors, micropower electronics, heterogeneous microsystems, and information processing in biological systems. He is a co-editor of the IEEE Press book: Low-Voltage/Low-Power Integrated Circuits and Systems, 1998 (translated in Japanese) and the Kluwer Academic Publishers book: Adaptive Resonance Theory Microchips, 1998. He is an associate editor of IEEE Transactions on Circuits and Systems I.     

Modeling of output snapback characteristics in n-channel SOIMOSFETs

The snapback effect is usually observed in the output characteristics of an n-channel SOI MOSFET with zero gate voltage in which the drain-to-source breakdown voltage is less than the drain-to-body avalanche voltage. It can be attributed to parasitic lateral bipolar actions as well as the MOS feedback mode of operation-a point often overlooked in the literature. An analytical model is developed for predicting the observed output characteristics taking into account both the bipolar and the MOS mechanisms. Results obtained from this model agree well with the experimental I-V curves, and show that, with continuing scaling of device geometries and improvement in SOI materials, the bipolar-induced snapback will become dominant in the future     

Fabrication of GaAs MISFET with nm-thin oxidized layer formed by UV and ozone process

A gate insulating layer with single nm-order thickness for suppressing gate leakage current is one of the key factors in extending downsizing limits, based upon the scaling rule, of field-effect-type transistors. We describe the fabrication and characterization of GaAs MISFETs with a nm-thin oxidized layer as the gate insulating layer, which is formed by an ultraviolet (UV) and ozone process. The UV and ozone process forms oxidized GaAs layers near the surface, which effectively suppress the reverse leakage current by several orders of magnitude. The fabricated GaAs MISFET can operate not only in the depletion mode, but also in the accumulation mode up to 3 V gate voltage for 8-nm-thick oxidized layers due to the current blocking effect of the oxidized layer. A current cutoff frequency of 6 GHz and a maximum oscillation frequency of 8 GHz are obtained for a GaAs MISFET with 1-/spl mu/m gate length and 8-nm-thick oxidized layers.     

Modeling the photon counting and photoelectron counting characteristics of quanta image sensors

A signal chain model of single-bit and multi-bit quanta image sensors(QISs)is established.Based on the proposed model,the photoresponse characteristics and signal error rates of QISs are investigated,and the effects of bit depth,quantum efficiency,dark current,and read noise on them are analyzed.When the signal error rates towards photons and photoelec-trons counting are lower than 0.01,the high accuracy photon and photoelectron counting exposure ranges are determined.Fur-thermore,an optimization method of integration time to ensure that the QIS works in these high accuracy exposure ranges is presented.The trade-offs between pixel area,the mean value of incident photons,and integration time under different illumin-ance level are analyzed.For the 3-bit QIS with 0.16 e-/s dark current and 0.21 e-r.m.s.read noise,when the illuminance level and pixel area are 1 lux and 1.21 μm2,or 10 000 lux and 0.21 μm2,the recommended integration time is 8.8 to 30 ms,or 10 to 21.3 μs,respectively.The proposed method can guide the design and operation of single-bit and multi-bit QISs.     

Reduction of dark current in AlGaN-GaN Schottky-barrier photodetectors with a low-temperature-grown GaN cap layer

AlGaN-GaN-based UV Schottky-barrier photodetectors with (i.e., sample A) and without (i.e., sample B) the low-temperature (LT) GaN cap layer were both fabricated. It was found that we could achieve a lower leakage current from sample A. Under reverse bias, it was found that sample A showed a dark current as low as 2/spl times/10/sup -11/ A at -5 V. In contrast, the dark current of sample B was at least one order of magnitude larger. With an incident light wavelength of 320 nm and a -1 V reverse bias, the measured responsivity was around 0.03 and 0.015 A/W for samples A and B, respectively.     

RTD characteristics for micro-thermal sensors

The physical and electrical characteristics of MgO (medium layer) and Pt (sensor material) thin films deposited by a reactive RF sputtering method and a magnetron sputtering method, respectively, were analyzed as a function of the annealing temperature and time by using a four-point probe, SEM, and XRD. After being annealed at 1000 °C for 2 h, the MgO layer showed good adhesive properties on both layers (Pt and SiO₂ layers) without any chemical reactions, and the surface resistivity and the resistivity of the Pt thin film were 0.1288 Ω/□ and 12.88 μΩ cm, respectively. Pt resistance patterns were made on MgO/SiO₂/Si substrates by the lift-off method, and Pt resistance thermometer devices (RTDs) for micro-thermal sensor applications were fabricated by using Pt-wire, Pt-paste, and spin-on-glass (SOG). From the Pt RTD samples having a Pt thin film thickness of 1.0 μm, we obtained a temperature coefficient of resistor (TCR) value of 3927 ppm/°C, which is close to the Pt bulk value, and the ratio variation of the resistance value was highly linear in the temperature range of 25-400 °C.     

MSM型氮化镓紫外探测器研究

以宽禁带半导体氮化镓材料制备了金属一半导体一金属型的紫外光电探测器.材料生长是以MOCVD设备完成的,为非故意掺杂的n型材料.器件在362 nm处具有陡峭的截止边,表现出可见盲特性,在1.5 V偏压下响应度为0.71 A/W,紫外/可见抑制比接近103.通过击穿单侧肖特基结对另一侧的肖特基结进行测试,结果表明肖特基结具有较理想的特性,并以此对器件的工作方式和设计优化进行了讨论分析.     

CW oscillation characteristics of GaAs Schottky-barrier gate field-effect transistors

The CW oscillation characteristics of GaAs Schottky-barrier gate FET's have been examined at 10 GHz. The maximum output power of 41.2 mW and the maximum efficiency of 15.6 percent have been obtained for the GaAs FET with a gate length of 1.5 µm and an electrode width of 300 µm. The experimental results have shown that the GaAs FET possesses promising features for an oscillator application as well as an amplifier application.     

Direct-conversion flat-panel X-ray image sensors for digitalradiography

Advances in active-matrix array flat panels for displays over the last decade have led to the development of flat-panel X-ray image detectors. Recent flat-panel detectors have shown image quality exceeding that of X-ray film/screen cassettes. They can also permit the instantaneous capture, readout, and display of digital X-ray images and, hence, enable the clinical transition to digital radiography. There are two general approaches to flat panel detector technology: 1) direct and 2) indirect conversion. The present paper outlines the operating principles for direct-conversion detectors based on the use of photoconductors. It formulates and reviews the required X-ray photoconductor properties for such applications and examines to what extent potential materials fulfill these requirements. The quantum efficiency, X-ray sensitivity, noise, and detective quantum efficiency factors are discussed with reference to current and potential large area X-ray photoconductors     

Semi-numerical modelling of an n-channel irradiated MOSFET

A semi-numerical model of a metal-oxide-semiconductor field effect transistor (MOSFET) has been developed for theoretical examination of the effect of ionizing radiation on the characteristics of the device. The present model utilizes the radiation-induced changes in the flat-band voltage to estimate the change in the surface charge carrier concentration which in turn changes the mobility of the surface channel and affects the source-to-drain current. For the first time a model of an irradiated MOSFET has been presented that incorporates the effect of both transverse and longitudinal electric fields in the transport of the carriers in the surface channel. The present model can also be used to determine the characteristics of the device in the pre-irradiated condition. The validity of the model has been established by comparing and contrasting the results in the preirradiated condition with those obtained using other models, including twodimensional models. The results obtained on the basis of our model are compared with reported experimental results and also a SPICE (Level 3) model in the post-irradiated condition. It is found that our model gives a better fit to the reported experimental results as compared with SPICE models.-The present model is expected to yield fairly accurate results for estimation of I _D V _D characteristics and the transfer characteristics, even for a short channel device.     

Review of CMOS image sensors

The role of CMOS Image Sensors since their birth around the 1960s, has been changing a lot. Unlike the past, current CMOS Image Sensors are becoming competitive with regard to Charged Couple Device (CCD) technology. They offer many advantages with respect to CCD, such as lower power consumption, lower voltage operation, on-chip functionality and lower cost. Nevertheless, they are still too noisy and less sensitive than CCDs.Noise and sensitivity are the key-factors to compete with industrial and scientific CCDs. It must be pointed out also that there are several kinds of CMOS Image sensors, each of them to satisfy the huge demand in different areas, such as Digital photography, industrial vision, medical and space applications, electrostatic sensing, automotive, instrumentation and 3D vision systems.In the wake of that, a lot of research has been carried out, focusing on problems to be solved such as sensitivity, noise, power consumption, voltage operation, speed imaging and dynamic range. In this paper, CMOS Image Sensors are reviewed, providing information on the latest advances achieved, their applications, the new challenges and their limitations. In conclusion, the State-of-the-art of CMOS Image Sensors.     

Electrical characteristics of boron-implanted n-channel MOS transistors for use in logic circuits

Adapted formulas describing the current-voltage relationship of MOS transistors with nonuniform substrate doping are presented. Only the case Where, at zero background polarization, the depletion layer is larger than the implanted impurity depth, is considered. Attention is given to the experimental determination of the effective mobility, the space-charge-layer depth and, if the impurity profile is inown, of the surface potential, the flatband voltage, and the maximum allowable dose for low bulk effect. Experiments are in good agreement with the calculations. Deviations between theory and experiment for small gate voltages are observed in the intermediate region between weak and strong inversion.