Organic nonvolatile memory transistors based on fullerene and an electron-trapping polymer

We report for the first time organic n-type nonvolatile memory transistors based on a fullerene (C₆₀) semiconductor and an electron-trapping polymer, poly(perfluoroalkenyl vinyl ether) (CYTOP). The transistors with a Si++/SiO₂/CYTOP/C₆₀/Al structure show good n-type transistor performance with a threshold voltage (V_th) of 2.8 V and an electron mobility of 0.4 cm² V⁻¹ s⁻¹. Applying gate voltages of 50 or −45 V for about 0.1 s to the devices induces the reversible shifts in their transfer characteristics, which results in a large memory window (ΔV_th) of 10 V. A memory on/off ratio of 10⁵ at a small reading voltage below 5 V and a retention time greater than 10⁵ s are achieved. The memory effect in the transistor is ascribed to electrons trapped at the CYTOP/SiO₂ interface. Because of the use of high-electron-mobility C₆₀, the switching voltages of our memory transistors become significantly lower than those of conventional memory transistors based on pentacene.     

Stackable nonvolatile memory with ultra thin polysilicon film and low-leakage (Ti, Dy)xOy for low processing temperature and low operating voltages

We report the fabrication process as well as material and electrical characterization of ultra thin body (UTB) thin film transistors (TFTs) for stackable nonvolatile memories by using in situ phosphorous doped low-temperature polysilicon followed by the chemical mechanical polishing (CMP) process. The resulting polysilicon film is about 13 nm thick with approximately 10¹⁹ cm⁻³ doping. Root mean square surface roughness below 1 nm is achieved. Metal nanocrystals and high-k dielectric are selected for storage nodes and tunneling barriers to achieve low operating voltages. The number density and average diameter of nanocrystals embedded in the gate stack are 7.5 × 10¹¹ cm⁻² and 5.8 nm, respectively. Furthermore, scanning transmission electron microscopy (STEM), convergent beam electron diffraction (CBED) and electron energy loss spectroscopy (EELS) are performed for material characterization. The dielectric constant of the (Ti, Dy)_xO_y film is 35, and the off-state leakage current at −1 V bias and 2.8 nm equivalent oxide thickness is 5 × 10⁻⁷ A/cm². We obtain a memory window of about 0.95 V with ±6 V program/erase voltages. Our results show that UTB TFT is a promising candidate for the three-dimensional integration in high-density nonvolatile memory applications.     

Dibenzothiophene-S,S-dioxide based medium-band-gap polymers for efficient bulk heterojunction solar cells

Medium-band-gap polymers based on indacenodithiophene (IDT) and dibenzothiophene-S,S-dioxide (SO) derivatives, PIDT-SO and PIDT-DHTSO, were synthesized via a microwave assisted Stille polycondensation. The polymers have the maximum absorption ∼500 nm, high absorption coefficients above 0.6 × 10⁻² nm⁻¹, and medium band gaps of ∼2.2 eV. Their hole mobilities are around 2 × 10⁻⁴ cm² V⁻¹ s⁻¹ as measured by field effect transistors. The photovoltaic performances of the polymers were investigated on the inverted bulk heterojunction (BHJ) devices of ITO/PFN/PIDT-DHTSO:PC₇₁BM (1:3, w/w)/MoO₃/Al, and a power conversion efficiency (PCE) of 3.81% with an open-circuit voltage (V_oc) of 0.95 V, a short-circuit current (J_sc) of 8.20 mA cm⁻² and a fill factor (FF) of 48% were achieved. Those results indicated that dibenzothiophene-S,S-dioxide derivatives could be an excellent electron-deficient building block for medium-band-gap electron-donor polymers.     

High performance p-type organic thin film transistors with an intrinsically photopatternable,ultrathin polymer dielectric layer

A high-performing bottom-gate top-contact pentacene-based oTFT technology with an ultrathin (25–48 nm) and electrically dense photopatternable polymeric gate dielectric layer is reported. The photosensitive polymer poly((±)endo,exo-bicyclo[2.2.1]hept-5-ene-2,3-dicarboxylic acid, diphenylester) (PNDPE) is patterned directly by UV-exposure (λ = 254 nm) at a dose typical for conventionally used negative photoresists without the need for any additional photoinitiator. The polymer itself undergoes a photo-Fries rearrangement reaction under UV illumination, which is accompanied by a selective cross-linking of the macromolecules, leading to a change in solubility in organic solvents. This crosslinking reaction and the negative photoresist behavior are investigated by means of sol–gel analysis. The resulting transistors show a field-effect mobility up to 0.8 cm² V⁻¹ s⁻¹ at an operation voltage as low as −4.5 V. The ultra-low subthreshold swing in the order of 0.1 V dec⁻¹ as well as the completely hysteresis-free transistor characteristics are indicating a very low interface trap density. It can be shown that the device performance is completely stable upon UV-irradiation and development according to a very robust chemical rearrangement. The excellent interface properties, the high stability and the small thickness make the PNDPE gate dielectric a promising candidate for fast organic electronic circuits.     

A simple droplet pinning method for polymer film deposition for measuring charge transport in a thin film transistor

Thin-film field-effect transistors (FETs) are widely used to evaluate charge transport properties of semiconducting polymers. Discovery of high performance materials require design and synthesis of new polymers. However, most polymers require multi-step synthesis and are difficult to be obtained in a large scale for comprehensive device evaluations. Here, we report a simple method to cast semiconducting polymer films from solutions with polymer concentration as low as 0.5 mg/mL, which is substantially less than typical values (∼10 mg/mL) used in conventional spin coating method. Here, we demonstrate that using this method, our cast films of a previously-reported polymer (PDPP-TT2T) exhibited field-effect mobility (μ_hole = 0.89 ± 0.13 cm² V⁻¹ s⁻¹, μ_e = 0.025 ± 0.005 cm² V⁻¹ s⁻¹), which is comparable to the reported values using the same device geometry. Furthermore, we extend this method to examine cast films of a pair of polymers (PDPP-3T-Ref, PDPP-3T-Si) to study the effect of siloxane substitution in the side chains on the molecular packing and their subsequent FET performance. We observed that shorter π-stacking distance (3.61 Å) for the siloxane-terminated polymer, when compared to that for the reference polymer (3.73 Å), resulted in improved FET performance (e.g., μ_hole = 0.63 ± 0.046 cm² V⁻¹ s⁻¹ for PDPP-3T-Si vs μ_hole = 0.17 ± 0.062 cm² V⁻¹ s⁻¹ for PDPP-3T-Ref). Taken together, this work presents an efficient alternative film-casting approach to produce polymer FETs that consumes much less material for their fabrication, lending viability for evaluation of various polymeric materials.     

Materials and interfaces issues in pentacene/PTCDI-C8 ambipolar organic field-effect transistors with solution-based gelatin dielectric

Gelatin is a natural protein, which works well as the gate dielectric for pentacene/N,N-dioctyl-3,4,9,10-perylene tetracarboxylic diimide (PTCDI-C₈) ambipolar organic field-effect transistors (OFETs) in air ambient and in vacuum. An aqueous solution process was used to form the gelatin gate dielectric film on poly(ethylene terephthalate) (PET) by spin-coating and subsequent casting. Pentacene morphology and interface roughness are two major factors affecting the electron and hole field-effect mobility (μ_FE) values of pentacene/PTCDI-C₈ ambipolar OFETs in vacuum and in air ambient. In contrast, water absorption in gelatin has higher contribution to the electron and hole μ_FE values in air ambient. The ambipolar performance of pentacene/PTCDI-C₈ ambipolar OFETs depends on their layer sequence. For example, when PTCDI-C₈ is deposited onto pentacene, i.e. in the structure of PTCDI-C₈/pentacene, unbalanced ambipolar characteristics appear. In contrast, better ambipolar performance occurs in the structure of pentacene/PTCDI-C₈. The optimum ambipolar characteristics with electron μ_FE of 0.85 cm² V⁻¹ s⁻¹ and hole μ_FE of 0.95 cm² V⁻¹ s⁻¹ occurs at the condition of pentacene (40 nm)/PTCDI-C₈ (40 nm). Surprisingly, water absorption plays a crucial role in ambipolar performance. The device performance changes tremendously in pentacene/PTCDI-C₈ ambipolar OFETs due to the removal of water out of gelatin in vacuum. The optimum ambipolar characteristics with electron μ_FE of 0.008 cm² V⁻¹ s⁻¹ and hole μ_FE of 0.007 cm² V⁻¹ s⁻¹ occurs at the condition of pentacene (65 nm)/PTCDI-C₈ (40 nm). The roles of layer sequence, relative layer thickness, and water absorption are proposed to explain the ambipolar performance.     

Hydrated bovine serum albumin as the gate dielectric material for organic field-effect transistors

Bovine serum albumin (BSA) is a natural protein with good hydration ability which contains acidic and basic amino acid residues of ca. 34% in total. In vacuum, pentacene organic field-effect transistors (OFETs) with BSA as the gate dielectric exhibits a field-effect mobility value (μ_FE,sat) of 0.3 cm² V⁻¹ s⁻¹ in the saturation regime and a threshold voltage (V_TH) of ca. −16 V. BSA is easy to be hydrated in air ambient. Electrical properties of BSA in vacuum and hydrated BSA in air ambient are characterized. Similar to polyelectrolyte, hydrated BSA may act the gate dielectric with the formation of electric double-layer capacitors (EDLCs) to improve the device performance. In a relative humidity of 47%, the μ_FE,sat value increases to 4.7 cm² V⁻¹ s⁻¹ and the V_TH reduces to −0.7 V. Generation of mobile ions in hydrated BSA and the formation of EDLCs are discussed.     

Low gate interface traps AlGaN/GaN HEMTs using a lattice matched ZrZnO transparent gate design

AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) using a radio-frequency magnetron sputtered ZrZnO transparent oxide layer as a gate insulator are investigated and compared with traditional GaN HEMTs. A negligible hysteresis voltage shift in the C–V curves is seen, from 0.09 V to 0.36 V, as the thickness of ZrZnO films increases. The composition of ZrZnO at different annealing temperatures is observed using X-ray photoelectron spectroscopy (XPS). The ZrZnO thin film achieves good thermal stability after 600 °C, 700 °C and 800 °C post-deposition annealing (PDA) because of its high binding energy. Based on the interface trap density analysis, D_it has a value of 2.663 × 10¹² cm⁻²/eV for 10-nm-thick ZrZnO-gate HEMTs and demonstrates better interlayer characteristics, which results in a better slopes for the I_ds degradation (5.75 × 10⁻¹ mA/mm K⁻¹) for operation from 77 K to 300 K. The 10-nm-thick ZrZnO-gate device also exhibits a flat and a stable 1/f noise, as V_GS–V_th, and at various operating temperatures. Therefore, ZrZnO has good potential for use as the transparent film for a gate insulator that improves the GaN-based FET threshold voltage and improves the number of surface defects at various operating temperatures.     

Normally-off trench JFET technology in 4H silicon carbide

A double gate normally-off silicon carbide (SiC) trench junction field effect transistors (JFET) design is considered. Innovative migration enhanced embedded epitaxial (ME³) growth process was developed to replace the implantation process and realize high device performance. Strong anisotropic behavior in electrical characteristics of the pn junction fabricated on (1 1 −2 0) and (1 −1 0 0) trench a-planes was observed, although quality of the pn diodes was found to be independent of trench plane orientations. Fabricated normally-off trench 4H-SiC JFET demonstrates the potential for lower specific on-resistance (R_onS) in the range of 5-10 mΩ cm² (1200 V class). A relative high T^−2.6 dependence of R_onS is observed. A breakdown voltage of 400 V in the avalanche mode was confirmed at zero gate bias conditions for cell design without edge termination. It was demonstrated that the normally-off JFETs are suitable for high temperature applications. Average temperature coefficient of threshold voltage (V_th) was calculated as −1.8 mV/°C, which is close to the MOS based Si power devices.     

Solvent-vapor induced self-assembly of a conjugated polymer: A correlation between solvent nature and transistor performance

A systematical investigation on solvent-vapor annealing in polymer thin film transistors is performed using a thiazolothiazole-bithiazole conjugated polymer as the active layer. Film morphology, packing order and device performance are closely related to polarity and solubility parameter of the annealing solvent and annealing time. The formation of highly ordered and closely connected fibrillar domains is realized by using a solvent with similar solubility parameter and polarity to the conjugated polymer. Field-effect transistors based on pristine polymer films exhibit a highest charge carrier mobility of 0.0067 cm² V⁻¹ s⁻¹. After solvent vapor annealing with THF for 48 h, the mobility boosts up to 0.075 cm² V⁻¹ s⁻¹. This correlation between solvent polarity, solubility parameter and film morphology, packing order and mobility provides a useful guideline towards high performance polymer thin film transistors with solvent-vapor annealing method.     

High-mobility pentacene thin-film transistor by using LaxTa(1−x)Oy as gate dielectric

Pentacene organic thin-film transistors (OTFTs) using La_xTa_(1−x)O_y as gate dielectric with different La contents (x = 0.227, 0.562, 0.764, 0.883) have been fabricated and compared with those using Ta oxide or La oxide. The OTFT with La_0.764Ta_0.236O_y can achieve a carrier mobility of 1.21 cm² V⁻¹s⁻¹s, which is about 40 times and two times higher than those of the devices using Ta oxide and La oxide, respectively. As supported by XPS, AFM and noise measurement, the reasons lie in that La incorporation can suppress the formation of oxygen vacancies in Ta oxide, and Ta content can alleviate the hygroscopicity of La oxide, resulting in more passivated and smoother dielectric surface and thus larger pentacene grains, which lead to higher carrier mobility.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.     

Mobility enhancement by using silk fibroin in F16CuPc organic thin film transistors

High performance n-type F₁₆CuPc organic thin-film transistors (OTFTs) were fabricated on polyethylene terephthalate (PET) using silk fibroin as the gate dielectric. The average field-effect mobility (μ_FE) value in the saturation regime is 0.39 cm² V⁻¹ s⁻¹ approximately one order of magnitude higher than the reported values in the literature. A typical F₁₆CuPc OTFT exhibits an on/off current ratio of 9.3 × 10², a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade. The enhancement of μ_FE results from very good crystal quality of F₁₆CuPc on silk fibroin, supported by grazing incidence X-ray diffraction (GIXD) data.     

Comparison of short and long wavelength absorption electron donor materials in C60-based planar heterojunction organic photovoltaics

Buckminsterfullerene, C₆₀-based planar heterojunction (PHJ) organic photovoltaics (OPVs) have been created using a short wavelength absorption (λ_max = 490 nm) electron-donating bis(naphthylphenylaminophenyl)fumaronitrile (NPAFN). NPAFN exhibits a hole mobility greater than 0.07 cm² V⁻¹ s⁻¹ as determined by its field-effect transistor. It can be attributed to such hole mobility that enables a thin layer (<10 nm) NPAFN in PHJ OPV, ITO/NPAFN/C₆₀/bathocuproine/Al. Because of the low lying HOMO energy level (5.75 eV) of NPAFN and relatively high ionization potential ITO (∼5.58 eV), such OPVs exhibit a very high open circuit voltage of ∼1.0 V, relatively high fill factor of 0.60, and a relatively high shunt resistance of 1100 Ω cm⁻², which all compensate for a relatively low short circuit current of 3.15 mA cm⁻² due to the short absorption wavelength and inferred short exciton diffusion length of NPAFN. Altogether, NPAFN OPVs display a power conversion efficiency (η_PC) of 2.22%, which is better than other long wavelength absorption materials in similar PHJ OPVs, such as pentacene (λ_max 670 nm, HOMO 5.12 eV, η_PC 1.50%) and copper phthalocyanine (λ_max 624, 695 nm, HOMO 5.17 eV, η_PC 1.43%).     

Low operational voltage and high performance organic field effect memory transistor with solution processed graphene oxide charge storage media

Low voltage organic field effect memory transistors are demonstrated by adapting a hybrid gate dielectric and a solution processed graphene oxide charge trap layer. The hybrid gate dielectric is composed of aluminum oxide (AlO_x) and [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) plays an important role of both preventing leakage current from gate electrode and providing an appropriate surface energy to allow for uniform spin-casting of graphene oxide (GO). The hybrid gate dielectric has a breakdown voltage greater than 6 V and capacitance of 0.47 μF/cm². Graphene oxide charge trap layer is spin-cast on top of the hybrid dielectric and has a resulting thickness of approximately 9 nm. The final device structure is Au/Pentacene/PMMA/GO/PhO-19-PA/AlO_x/Al. The memory transistors clearly showed a large hysteresis with a memory window of around 2 V under an applied gate bias from 4 V to −5 V. The stored charge within the graphene oxide charge trap layer was measured to be 2.9 × 10¹² cm⁻². The low voltage memory transistor operated well under constant applied gate voltage and time with varying programming times (pulse duration) and voltage pulses (pulse amplitude). In addition, the drain current (I_ds) after programming and erasing remained in their pristine state after 10⁴ s and are expected to be retained for more than one year.     

Low power and high gain current reuse LNA with modified input matching and inter-stage inductors

In this paper we present a fully integrated current reuse CMOS LNA (low noise amplifier) with modified input matching circuitry and inductive inter-stage architecture in 0.18 μm CMOS technology. To reduce the large spiral inductors that actually require larger surface area for their fabrication, two parallel LC circuits are used with two small spiral on-chip inductors. Using cascode configuration equipped by parallel inter-stage LCs, we achieved lower power consumption with higher power gain. In this configuration we used two cascoded transistors to have a good output swing suitable for low voltage technology compared to other current reuse configurations. This configuration provides better input matching, lower noise figure and more reverse isolation which is vital in LNA design. Complete analytical simulation of the circuit results in center frequency of 5.5 GHz, with 1.9 dB NF, 50 Ω input impedance, 1 GHz 3 dB power bandwidth, 20.5 dB power gain (S₂₁), high reverse isolation (S₁₂)<−48 dB, −18.5 dB input matching (S₁₁) and −21.3 dB output matching (S₂₂), while dissipating as low power as 2 mW at 1.8 V power supply.     

Air-stability and bending properties of flexible organic field-effect transistors based on poly[N-9′-heptadecanyl-2,7-carbazole-alt-5,5-(4′,7′-di-2-thienyl-2′,1′,3′-benzothiadiazole)]

We have fabricated flexible field-effect transistors (FETs) using poly[N-9′-heptadecanyl-2,7-carbazole-alt-5,5-(4′,7′-di-2-thienyl-2′,1′,3′-benzothiadiazole)], PCDTBT, as an active channel, poly(methyl methacrylate) (PMMA) as gate dielectric and biaxially oriented polyethyleneterephthalate (BOPET) as supporting substrate. The output and transfer characteristics of the devices were measured as a function of channel length. It has been observed that various OFET parameters viz. on–off ratio (∼10⁵), mobility (μ ∼ 10⁻⁴ cm² V⁻¹ s⁻¹), threshold voltage (V_th ∼ −14 V), switch-on voltage (V_so ∼ −6 V), subthreshold slope (S ∼ 7 V/decade) and trap density (N_it ∼ 10¹⁴ cm⁻² V⁻¹) are almost independent of the channel length, which suggested a very high uniformity of the PCDTBT active layer. These devices were highly stable under atmospheric conditions (temperature: 20–35 °C and relative humidity: 70–85%), as no change in mobility was observed on a continuous exposure for 70 days. The studies on the effect of strain on mobility revealed that devices are stable up to a compressive or tensile strain of 1.2%. These results indicate that PCDTBT is a very promising active layer for the air stable and flexible FETs.     

An oligothiophene dye with triphenylamine as side chains for efficient dye-sensitized solar cells

A novel oligothiophene-cyanoacrylic acid photosensitizer with two triphenylamine side chains (7T-2TPA) is designed and synthesized for dye-sensitized solar cells. 7T-2TPA exhibits broad (250-600 nm) and strong absorption (ε = 5.0 × 10⁴ L mol⁻¹ cm⁻¹ at 496 nm). The optical band gap (E_g) is estimated from the onset absorption edge to be 2.07 eV. The oxidation potential E_ox and reduction potential E_red vs NHE of the dye is 0.93 and −1.14 V, respectively. Dye-sensitized solar cell (DSSC) based on 7T-2TPA exhibits an open-circuit voltage (V_oc) of 724 mV, a short-circuit current density (J_sc) of 16.28 mA cm⁻², a fill factor (FF) of 0.684 and a power conversion efficiency of 8.06%. The efficiency of 8.06% is similar to that for widely used N719-based cell fabricated and measured under the same conditions.     

Interface optimization using diindenoperylene for C60 thin film transistors with high electron mobility and stability

C₆₀-based organic thin film transistors (OTFTs) with high electron mobility and high operational stability are achieved with (1 1 1) oriented C₆₀ films grown by using template effects of diindenoperylene (DIP) under layer on the SiO₂ gate insulator. The electron mobility of the C₆₀ transistor is significantly increased from 0.21 cm² V⁻¹ s⁻¹ to 2.92 cm² V⁻¹ s⁻¹ by inserting the template-DIP layer. Moreover much higher operational stability is also observed for the DIP-template C₆₀ OTFTs. A grazing incidence X-ray diffraction and ultrahigh-sensitivity photoelectron spectroscopy measurements indicate that the improved electron mobility and stability arise from the decreased density of trap states in the C₆₀ film due to increased (1 1 1) orientation of C₆₀-grains and their crystallinity on the DIP template.     

Characterization of MIS structures and PTFTs using TiOx deposited by spin-coating

This paper presents a method to deposit titanium oxide (TiOx) films from a sol containing IV titanium isopropoxide Ti[OCH(CH₃)₂]₄, 2-methoxyethanol, CH₃OCH₂CH₂OH and ethanolamine H₂NCH₂CH₂OH, in order to obtain layers with thickness above 220 nm with the required characteristics to be used in Metal–Insulator–Semiconductor, MIS, structures and polymeric thin film transistors, PTFTs. The effect of using different component ratios is described. The dielectric constant was in the order of 12, the critical electric field was 5 × 10⁵ V/cm and the density of states at the interface was less than 1 × 10¹¹ cm⁻². The analysis of MIS structures prepared with these TiOx layers shows that they are suitable for using in PTFTs. The fabrication of independent bottom gate PTFTs with poly(3-hexylthiophene), P3HT, on top of the TiOx layer is described, obtaining a major reduction in the operation voltage range from −30 V to −4 V, while maintaining the typical mobility for P3HT PTFTs.