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1.
硅基MEMS加工技术及其标准工艺研究   总被引:22,自引:0,他引:22  
本文论述了硅基MEMS标准工艺,其中包括三套体硅标准工艺和一套表面牺牲层标准工艺.深入地研究了体硅工艺和表面牺牲层工艺中的关键技术.体硅工艺主要进行了以下研究:硅/硅键合、硅/镍/硅键合、硅/玻璃键合工艺及其优化;研究了高深宽比刻蚀工艺、优化了工艺条件;解决了高深宽比刻蚀中的Lag效应;开发了复合掩膜高深宽比多层硅台阶刻蚀和单一材料掩膜高深宽比多层硅台阶刻蚀工艺研究.表面牺牲层工艺主要进行了下列研究:多晶硅薄膜应力控制工艺;防粘附技术的研究与开发.  相似文献   

2.
Pyrex玻璃的湿法刻蚀研究   总被引:2,自引:0,他引:2  
对Pyrex 7740玻璃的湿法刻蚀工艺进行了研究。实验中采用了几种不同的材料(光刻胶、Cr/Au、TiW/Au)作为刻蚀玻璃的掩膜,通过实验发现TiW/Au掩膜相对目前比较常用的Cr/Au掩膜有很多优点,如减少了玻璃的横向腐蚀,增加了深宽比,刻蚀图形边缘更加平滑等。还研究了腐蚀液成分配比对刻蚀结果的影响,发现刻蚀速率随HF浓度的增加而增加,且在HF浓度一定时,加入少量HNO3可以明显提高刻蚀速率。本文的实验结果对一些MEMS器件特别是微流体器件的制作有一定参考作用。  相似文献   

3.
用水平集方法建立了碲镉汞的离子束刻蚀轮廓的数值模型,模型的输入参数包括掩膜厚度、掩膜侧壁倾角、掩膜沟槽宽度、离子束散角、刻蚀速度等参数.对碲镉汞的刻蚀轮廓和刻蚀速度减缓现象进行了模拟和实验验证,结果表明,在沟槽宽度为4~10μm的范围内,计算得到的刻蚀深度和SEM测量结果相差6~20%.对掩膜的轮廓演变进行了模拟,给出了一个优化设计掩膜厚度来提高深宽比的实例.  相似文献   

4.
研究应用O2反应离子刻蚀(RIE)直接深刻蚀商用有机玻璃(PMMA)片,以实现微结构的三维微加工,工艺简单,加工成本较低,为微器件的高深宽比加工提出了新方法。试样采用Ni作掩膜,以普通的光刻胶曝光技术和湿法刻蚀法将Ni掩膜图形化。工作气压、刻蚀功率等工艺参数对刻蚀速率影响较大。在刻蚀过程中,掩膜上的金属粒子会被刻蚀气体离子轰击而溅射散落出来,形成微掩膜效应。利用这种RIE技术,在适当的溅射功率及气压下,刻蚀速率较快,且获得了较陡直的微结构图形,刻蚀深度达120μm。  相似文献   

5.
离子束刻蚀碲镉汞的沟槽深宽比改进   总被引:1,自引:1,他引:0  
高深宽比离子束刻蚀技术是实现碲镉汞红外焦平面探测器的关键工艺技术.国内应用最广泛的双栅考夫曼刻蚀机束散角较大,沟槽深宽比较低.针对Ar离子束刻蚀机,尝试了三种提高深宽比的方法:选择不同的光刻胶做掩模、改变刻蚀角度和使用三栅离子源,并通过扫描电子显微镜(SEM)观察了碲镉汞刻蚀图形的剖面轮廓并计算了深宽比.分析了这些工艺方法对刻蚀图形轮廓的影响,获得了一些有助于获得高深宽比的离子束刻蚀沟槽的实验结果.  相似文献   

6.
非光敏BCB工艺技术研究   总被引:1,自引:0,他引:1  
非光敏BCB介质具有介电常数小、吸水率低、热稳定性好、力学性能优良、固化温度低,以及表面平坦化特性好等优点,作为重要的介质材料,已经应用于薄膜多芯片组件(MCM)基板布线中.文章研究了薄膜多层布线工艺中非光敏BCB介质的涂覆、固化工艺,以及等离子刻蚀工艺;提出了优化的涂覆和固化工艺参数,使用适当的刻蚀掩膜以及优化后的刻蚀工艺参数,进行图形刻蚀,获得了厚度为4 μm、表面粗糙度小于150 nm的表面平整的非光敏BCB介质膜,并在薄膜MCM多层布线基板中得到较好运用.  相似文献   

7.
提出了一种新颖的基于三维掩膜的硅各向异性腐蚀工艺,即利用深反应离子刻蚀、湿法腐蚀等常规体硅刻蚀工艺和氧化、化学气相沉积(CVD)等薄膜工艺制作出具有三维结构的氧化硅(SiO2)或氮化硅(Si3N4)薄膜,以该三维薄膜作为掩膜进行各向异性腐蚀,该工艺可以应用于MEMS微悬空结构的制作。利用该工艺成功地在单片n-Si(100)衬底上完成了一种十字梁结构的释放,并对腐蚀的过程和工艺参数进行了研究。  相似文献   

8.
《微纳电子技术》2020,(1):66-72
基于微米球刻蚀技术设计了一种制备多量子阱红外探测器(QWIP)表面二维光栅的新型工艺,通过改变微米球的直径可以为不同探测波长的QWIP制备表面二维光栅,有效降低了制备成本和技术难度。采用GaAs衬底作为实验片制作光栅、聚苯乙烯(PS)材质小球作为表面掩膜,对小球的单层排布、PS小球刻蚀和光栅的刻蚀等工艺进行了深入的实验研究,并得出了最优的工艺参数。制备出了具有良好均匀性和一致性的二维光栅结构。通过傅里叶光谱仪测得表面光栅的耦合波长为6~9μm。最后研究了不同工艺条件对耦合结果的影响,证实当光栅直径为PS球直径的0.74倍时获得的耦合效果最优。  相似文献   

9.
硅基微通道板(MCP)的重要技术挑战之一就是如何在硅基上制作高深宽比的微孔阵列结构。采用光助电化学刻蚀方法研究硅基高深宽比微孔阵列制作技术。考虑到实际反应条件下的物质输送、刻蚀液浓度、光照条件、温度等因素的影响都体现在刻蚀电流与电压上,重点研究了电流、电压与微结构形貌之间的关系。通过空间电荷区的大小以及刻蚀电流与溶液浓度之间的关系,得到合理的刻蚀参数。在5inch(1inch=2.54cm)硅基上制作出深度达200μm以上的均匀深孔,得到大面积、高深宽比的均匀微孔阵列,满足微通道板对结构形貌的要求。  相似文献   

10.
高深宽比结构是提高微器件性能的重要环节之一。利用RIE深刻技术加工具有高深宽比结构的图形 ,方法简单 :它不象LIGA技术那样 ,需昂贵的同步辐射光源和特制的掩模板 ,对光刻胶的要求也不是特别高 ,利用这种技术深刻蚀PMMA膜 ,以Ni作掩模 ,采用普通的光刻胶曝光技术和湿法刻蚀的方法将Ni掩模图形化 ,然后利用O2 RIE技术刻蚀PMMA ,可以得到深度达 1 0 0 μm ,深宽比大于 1 0的微结构 ,图形表面平整 ,侧壁光滑垂直。在刻蚀过程中 ,氧气压、刻蚀功率等工艺参数对刻蚀结果影响较大。  相似文献   

11.
利用反应等离子刻蚀技术对SiO2进行干法刻蚀,研究了不同刻蚀条件对刻蚀速率、刻蚀选择比、刻蚀面粗糙度、刻蚀均匀性等的影响。分析得出了刻蚀侧壁角度与刻蚀选择比以及抗蚀掩模自身的侧壁角度之间存在的数学关系,这为如何获得垂直的刻蚀侧壁提供了参考。  相似文献   

12.
利用反应等离子刻蚀技术对SiO2进行干法刻蚀, 研究了不同刻蚀条件对刻蚀速率、刻蚀选择比、刻蚀面粗糙度、刻蚀均匀性等的影响。分析得出了刻蚀侧壁角度与刻蚀选择比以及抗蚀掩模自身的侧壁角度之间存在的数学关系, 这为如何获得垂直的刻蚀侧壁提供了参考。  相似文献   

13.
Etching of Al is studied in pure BCl3 as well as in mixtures with other gases in the reactive sputter etching mode in a cryopumped system. Etch rate, selectivity with respect to positive photoresist, SiO2 and Si and etch profiles are investigated as a function of gas composition, gas pressure, flow rate and plasma power. Plasma chemical processes are monitored by quadrupole mass spectroscopy as well as by optical emission spectroscopy. Perfectly square Al-profiles can be etched if etch rates are kept below 1000 A/min. Al-patterns running over steep steps can also be clearly defined if a certain amount of overetching can be tolerated. The experimental data indicate that the etch process is reactant supply limited. Anisotropic etching is achieved by either a ‘surface inhibitor mechanism’ or the formation of a sidewall protecting film.  相似文献   

14.
郑志霞 《半导体技术》2012,37(2):130-134
由于石英晶体的刻蚀速率小,要实现石英晶体的高深宽比刻蚀,常用的光刻胶或金属掩膜不能满足工艺要求。提出使用双重掩蔽层的方法实现石英晶体的高深宽比刻蚀,即石英晶体和单晶硅键合,然后在单晶硅表面生长二氧化硅,二氧化硅作为刻蚀单晶硅的掩蔽层,单晶硅作为刻蚀石英晶体的掩蔽层。ICP刻蚀过程使用SF6作为刻蚀气体、C4H8作为钝化气体、He作为冷却气体。控制好气体的流量和配比,选择合适的射频功率,能刻蚀出深度为30μm,宽度为50μm的深槽。该工艺对开发新型石英晶体器件有积极的意义。  相似文献   

15.
Reactive ion etch processes for modern interlevel dielectrics become more and more complex, especially for further scaling of interconnect dimensions. The materials will be damaged within such processes with the result of an increase in their dielectric constants. The capability of selected additives to minimize the low-k sidewall damage during reactive ion etching (RIE) of SiCOH materials in fluorocarbon plasmas was shown in different works in the past. Most of the investigated additive gases alter the fluorine to carbon ratio as well as the dissociation of the parent gas inside the etch plasma. The result is a changed etch rate, a modified polymerization behavior and other characteristics of the process induced SiCOH damage. Heavy inert ions like argon will be accelerated to the sample surface in the cathode dark space and enhance therewith the sputter yield on the SiCOH network [1]. In this paper the additives Ar, O2, C4F8, H2, N2 and CO were added to a conventional CF4 etch plasma. We try to provoke different changes in the plasma conditions and therewith in the process results. Contact angle measurements, spectroscopic ellipsometry, Hg-probe analysis, FTIR measurements and SEM cross-sections were used to overview the additive induced modifications. To understand the influences of the additives gases more exactly, changes in the physical and chemical plasma behavior must be analyzed. Therefore quadrupole mass spectrometry (QMS) and quantum cascade laser absorption spectroscopy (QCLAS) were used.  相似文献   

16.
Inductively coupled plasma (ICP) system has been widely used for anisotropic silicon etching because it offers high aspect ratio with a vertical side wall. The isotropic etching capability of the ICP system, however, has not gained much attention, even though it possesses advantages in profile control and high etching rate over wet isotropic etching or conventional RIE (reactive ion etching). We report here an isotropic dry etching process to release microcantilever beams. Investigations have covered chamber pressure, plasma source power, substrate power, SF6 (sulfur hexafluoride) flow rate relating to Si etching rate, undercutting rate, and isotropic ratio. The SiO2 (silicon dioxide) cantilevers were successfully released from the Si substrate and the optimized silicon etching rate was 9.1 μm per minute. The etching profiles were analyzed by scanning electron micrographs (SEM).  相似文献   

17.
多层高深宽比Si深台阶刻蚀方法   总被引:1,自引:1,他引:0  
通过干法刻蚀,在Si衬底上制备出高深宽比的台阶结构是MEMS加工的基础工艺之一。多层台阶的刻蚀,是一种重要的折线断面制备方法,使实现结构更加复杂的器件成为可能。利用LPCVD生长1μm厚SiO2作为钝化层,围绕多层台阶掩膜的制备方法和移除方法展开实验,以3层台阶为例,开发出一套使用一块光刻版制造任意宽度的台阶掩膜的方法。该方法节约成本、操作简便、重复性好,为加工复杂的三维结构提供了一种新的手段。另外,针对在深刻蚀过程中残留的掩膜会破坏Si台阶完整性的问题,研究了刻蚀过程中SiO2掩膜的去除方法对台阶的表面形貌造成的影响。通过实验发现,采用干湿腐蚀结合的方法可以有效地去除台阶掩膜,获得良好的Si深台阶结构。  相似文献   

18.
AlGaInP-based light-emitting diodes (LEDs) with a transparent sapphire substrate were fabricated by the glue-bonding (GB) method. This transparent sapphire substrate is a geometric shaping structure by wet etching processes. Furthermore, the n-side-up surface has a nano-roughened texture by natural mask and chemical wet etching processes. The light output of this novel LED structure could be enhanced about 26.7% (at 350 mA) due to the higher light extraction as compared with the conventional GB-LEDs.  相似文献   

19.
Dry plasma etching of sub-micron structures in a SiO2/Si/SiO2 layer system using Cr as a mask was performed in a fluorocarbon plasma. It was determined that the best anisotropy could be achieved in the most electropositive plasma. A gas composition yielding the desired SOI planar photonic crystal structures was optimized from the available process gases, Ar, He, O2, SF6, CF4, c-C4F8, CHF3, using DC bias data sets. Application of the c-C4F8/(noble gas) chemistry allowed fabrication of the desired SOI planar photonic crystal. The average etching rates for the pores and ridge waveguide regions were about 71 and 97 nm/min, respectively, while the average SiO2/Si/SiO2 to Cr etching selectivity for the ridge waveguide region was about 33:1 in case of the c-C4F8/90%Ar plasma with optimized parameters.  相似文献   

20.
Deep reactive ion etching (DRIE) of borosilicate glass was carried out using SF6 and SF6/Ar plasmas in an inductively coupled plasma (ICP) reactor. Electroplated Ni on Cu (≅50 nm)/Cr (≅100 nm)/glass structure using patterned SU-8 photoresist mask with a line spacing of 12-15 μm was used as a hard-mask for plasma etching. Plasma etching of borosilicate glass was performed by varying the various process parameters such as the gas chemistry, the gas flow ratio, the top electrode power, and the dc self-bias voltage (Vdc). In the case of using SF6 gas only, the profiles of the etched channel showed the undercut below the Ni hard-mask due to a chemical etching and the microtrenching at the bottom of the etched channel. An optimized process using the SF6 plasmas showed the glass etch rate of ≅750 nm/min. The addition of the Ar gas to the SF6 gas removed the undercut and microtrenching but decreased the etch rate to ≅540 nm/min. The increasing and decreasing time-dependent etch rates with the etch depth in the SF6 (200 sccm) and SF6(60%)/Ar(40%) plasmas, respectively, were ascribed to the different ion-to-neutral flux ratios leading to the different etch process regime.  相似文献   

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