High temperature characterization of high-κ dielectrics on SiC

We have fabricated thin catalytic metal–insulator–silicon carbide based structure with palladium (Pd) gates using TiO₂ as the dielectric. The temperature stability of the capacitor is of critical importance for use in the fabrication of electronics for deployment in extreme environments. We have evaluated the response to temperatures in excess of 450 °C in air and observed that the characteristics are stable. Results of high temperature characterization are presented here with extraction of interface state density up to 650 °C. The results show that at temperatures below 400 °C the capacitors are stable, with a density of interface traps of approximately 6×10¹¹ cm² eV⁻¹. Above this temperature the C–V and G–V characteristics show the influence of a second set of traps, with a density around 1×10¹³ cm² eV⁻¹, which is close to that observed for slow states near the conduction band edge. The study of breakdown field as a function of temperature shows two distinct regions, below 300 °C where the breakdown voltage has a strong temperature dependence and above 300, where it is weaker. We hypothesize that the oxide layer dominates the breakdown voltage at low temperature and the TiO₂ layer above 300 °C. These results at high temperatures confirms the suitability of the Pd/TiO₂/SiO₂/SiC capacitor structure for stable operation in high temperature environments.     

High-field mobility metal-gate/high-κ Ge n-MOSFETs with small equivalent-oxide-thickness

We fabricated high performance gate-last TaN/La₂O₃/SiO₂ on Ge n-MOSFET. Small equivalent-oxide-thickness (EOT) of 1.9-nm and high-field mobility of 258 cm²/V s at 0.75 MV/cm were obtained, which were attributed to the thin SiO₂-like barrier layer and low process temperature to prevent interfacial reaction during post-deposition annealing (PDA).     

Growth of lanthanum oxide films for application as a gate dielectric in CMOS technology

We have investigated properties of insulating lanthanum oxide (La₂O₃) films in connection with the replacement of silicon oxide (SiO₂) gate dielectrics in new generation of CMOS devices. The La₂O₃ layers were grown using metal organic chemical vapour deposition (MOCVD) at 500 °C. X-ray diffraction analysis revealed polycrystalline character of the films grown above 500 °C. The X-ray photoemission spectroscopy detected lanthanum carbonate as a principal impurity in the films and lanthanum silicate at the interface with silicon. Density of oxide charge, interface trap density, leakage currents and dielectric constant ( κ) were extracted from the C-V and I-V measurements. Electrical properties, in particular dielectric constant of the MOCVD grown La₂O₃ are discussed with regard to the film preparation conditions. The as grown film had κ11. Electrical measurements indicate possible presence of oxygen vacancies in oxide layer. The O₂-annealed La₂O₃ film had κ17.     

Thermal annealing effect on electrical properties of metal nitride gate electrodes with hafnium oxide gate dielectrics in nano-metric MOS devices

Electrical properties of hafnium oxide (HfO₂) gate dielectric with various metal nitride gate electrodes, i.e., tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), were studied over a range of HfO₂ thicknesses, e.g., 2.5-10 nm, and post-metal annealing (PMA) temperatures, e.g., 600 °C to 800 °C. The work function of the nitride gate electrode was dependent on the material and the post-metal annealing (PMA) temperature. The scanning transmission electron microscopy technique is used to observe the effect of PMA on the interfacial gate dielectric thickness. After high-temperature annealing, the metal nitride gates were suitable for NMOS. At the same PMA temperature, the oxide-trapped charges increased and the interface state densities decreased with the increase of the HfO₂ thickness for TaN and WN gate electrodes. However, for MoN gate electrode the interface state density is almost independent of film thickness. Therefore, dielectric properties of the HfO₂ high-k film depend not only on the metal nitride gate electrode material but also the post-metal annealing condition as well as the film thickness. During constant voltage stress of the MOS capacitors, an increase in the time-dependent gate leakage current is also observed.     

Annealing effect on the metal gate effective work function modulation for the Al/TiN/SiO2/p-Si structure

In this work, the thermal annealing effect on the metal gate effective work function (EWF) modulation for the Al/TiN/SiO₂/p-Si(1 0 0) structure was investigated. Compared with the sample of TiN/SiO₂/p-Si(1 0 0) structure, for the sample additionally capped with Al the flat band voltage has a very obvious shift as large as 0.54 V to the negative direction after forming gas annealing. It is also revealed that the thermal budget can effectively influence both the EWF of the gate electrode and the thickness of the gate dielectric layer when a post annealing at 600 °C with different soak times was applied to the samples with Al cap. Material characterization indicates that the diffusion of Al and the formation of Al oxide during annealing should be responsible for all the phenomena. The interface trap density Dit calculated from the high-frequency C-V and the laser-assisted high-frequency C-V curves show that the introduction of Al does not cause reliability problem in the Al/TiN/SiO₂/p-Si structure.     

Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Low-temperature conductance measurements of surface states in HfO2–Si structures with different gate materials

Metal-oxide-semiconductor capacitors based on HfO₂ gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator–semiconductor interface.C–V and G–ω measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180–300 K. From the maximum of the plot G/ω vs. ln(ω) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge.The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2×10¹¹ cm⁻²eV⁻¹ for Al and up to (3.5–5.5)×10¹² cm⁻² eV⁻¹ for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8×10⁻¹⁷ cm² at 200 K for Al–HfO₂–Si structure.     

Interaction of α radiation with iron-doped n-type silicon

Deep-level transient spectroscopy (DLTS) measurements were carried out on low-doped n-silicon before and after irradiation with 5.48 MeV α particles at room temperature with a fluence of 10¹⁰ α particles/cm². The DLTS measurements on the samples identified three electron levels E₁, E₂ and E₃ before irradiation. The deep-levels characteristic studies include emission rate signatures, activation energies, defect concentrations and capture cross sections. It was found that all pre-existing defects decreased their amplitudes during irradiation. The decrease in activation energy of level E₃ and noticeable suppression of level E₁ was also observed after irradiation. It was clearly seen that the composite peak E₃ (combination of E₂ and E₃) was successfully resolved after irradiating with α particles. α-irradiation is seen to lead a significant suppression of the iron interstitial defect, and without causing any change in its room temperature annealing characteristics.     

A self-consistent algorithm to extract interface trap states of MOS devices on alternative high-mobility substrates

A new self-consistent technique is proposed to simultaneously extract the density of interface traps (D_it) and flat-band voltages of MOS structures fabricated on technologically relevant high-mobility semiconductors with arbitrary combination of gate stacks. The technique is based on novel analysis of the low-frequency C-V measurement. The two major problems associated with the existing low-frequency C-V technique for arbitrary substrate/oxide combinations are resolved by (i) accurate calculation of the ideal semiconductor capacitance using a self-consistent, quantum-mechanical model including wave function penetration effect, and (ii) accurate determination of the flat-band voltage utilizing an iterative scheme. The proposed technique has been applied to extract D_it profiles of a number of MOS structures fabricated on III-V semiconductors like InGaAs (with ALD grown Al₂O₃ gate dielectric) and elemental semiconductors like Ge (with GeON gate dielectric). The advantages of the proposed technique have been demonstrated by comparing with D_it profiles extracted from other capacitor-based extraction methods.     

Spectroscopic ellipsometry characterization of ZrO2 thin films by nitrogen-assisted reactive magnetron sputtering

Spectroscopic ellipsometry (SE) with photon energy 0.75–6.5 eV at room temperature has been used to derive the optical properties of high-k ZrO₂ thin films on Si(1 0 0) substrates prepared by nitrogen-assisted, direct current reactive magnetron sputtering. The Tauc–Lorentz dispersion method was adopted to model the optical dispersion functions of the thin films as a function of annealing temperature. Excellent agreement has been found between the SE fitting results and X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and Fourier transform infrared spectroscopy (FTIR) results, indicating that our model adequately described the measured SE data. Optical band gaps (E_g) were also obtained based on the extracted absorption edge. Our results suggest that nitrogen-assisted process can effectively limit the interfacial layer growth in high-k oxides.     

Changes in effective work function of HfxRu1−x alloy gate electrode

Effective work function (?_m,eff) values of Hf_x Ru_1−x alloy gate electrodes on SiO₂ metal-oxide-semiconductor (MOS) capacitors were carefully examined to assess whether the ?_m,eff was determined by the crystalline structure or the composition of the Hf_xRu_1−x alloy. X-ray diffraction results indicated that the crystalline structures of Hf_xRu_1−x alloy were divided into hexagonal-Ru, cubic-HfRu or hexagonal-Hf with the increase of Hf content. The ?_m,eff values could be controlled continuously from 4.6 to 4.0 eV by changing the Hf content. The experimental ?_m,eff value showed a good agreement with theoretical results considering the compositional ratio of pure Hf and Ru. These results suggest that the ?_m,eff of Hf_xRu_1−x alloy gates on SiO₂ MOS capacitors is dominantly determined by the Hf_xRu_1−x composition rather than the crystalline structure.     

The effect of oxygen in Ru gate electrode on effective work function of Ru/HfO2 stack structure

Effective work function (φ_m,eff) values of Ru gate electrode on SiO₂ and HfO₂ MOS capacitors were carefully examined and discussed from the viewpoint of an effect of oxygen incorporation in Ru gate electrode on φ_m,eff. Annealing at 400 °C in the reduction (3%H₂) and the oxidation (1%O₂) ambient resulted in similar changes in the φ_m,eff of Ru/HfO₂/SiO₂ and Ru/SiO₂ MOS capacitors. Furthermore, the Ru gate MOS capacitor after annealing in the oxidation condition have shown almost the same φ_m,eff value to that of RuO₂ gate MOS capacitors. The oxygen concentration in the Ru/HfO₂ interface after annealing in oxidizing atmosphere is approximately one order of magnitude higher than that after annealing in reducing atmosphere as confirmed by secondary ion mass spectroscopy analysis. Furthermore, the higher oxygen concentration at the Ru/dielectric interface leads to the higher φ_m,eff value, regardless of SiO₂ or HfO₂ dielectrics. This indicates that φ_m,eff of Ru gate MOS capacitor is dominantly determined by the oxygen concentration at the Ru/dielectric layer interface rather than the dipoles originated from the oxygen vacancy in HfO₂.     

Comparative study of quasi-static and normal capacitance–voltage characteristics in amorphous Indium-Gallium-Zinc-Oxide thin film transistors

Capacitance-voltage (C-V) characteristics of amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin film transistors (TFTs) are comparatively investigated with two different measurement configurations. Normal gate-to-source/drain (S/D) C-V and quasi-static C-V curves are employed to characterize physical mechanisms with equivalent circuit models for a-IGZO TFTs. The difference between the normal C-V and the quasi-static C-V (QSCV) characteristics is investigated by the dependence on the gate voltage (V_G), measurement configuration, and optical illumination. The discrepancy is analyzed to be due to a high hole barrier in the S/D contact region and a slow response of active bulk charges (Q_loc and Q_free) in the a-IGZO active layer.     

Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications

Interaction of Hf_xTa_yN metal gate with SiO₂ and HfO_xN_y gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO₂ gate dielectric and Hf_xTa_yN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO₂ gate dielectric than that in HfO_xN_y. Compared to HfO_xN_y gate dielectric, SiO₂ shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO₂ gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability.     

Evaluation of reliability of μBGA solder joints through twisting and bending

The paper describes a study on the solder joint mechanical reliability evaluation of two grid array packages: a micro land grid array (μLGA) and a micro ball grid array (μBGA) for mobile phones. The μGA packages considered in this paper are at early development stages and significant changes are expected in the future. The study was carried out to evaluate whether solder joints can stand mechanical stresses induced on PCBs during normal use. Stresses induced in normal use can include: thermal changes and stresses during indoor and outdoor use, in keypad pressing, carrying phones in (tight) jeans pockets, in accidentally dropping phones, etc. The above was studied by subjecting PCBs to two types of mechanical stresses. These were cyclic twisting and bending PCBs with μBGAs to failure, while continuously monitoring the electrical continuity. Cyclic twisting and bending tests were carried at two levels.Time to failure test data was analyzed using the Weibull model. Results indicate that it is most unlikely to anticipate μBGA solder joint failures in normal use. Solder joint failures were analysed by micro sectioning and X-raying. Failure analysis revealed as expected that solder joint failure occurs primarily due to fatigue. It is recommended to continue tests with more representative, updated packages and to carry out comparative tests with current technology PCBs.     

Etch damage evaluation on (Bi4−xLax)Ti3O12 thin films during the etch process using inductively coupled plasma sources

The etching mechanism of (Bi_4−xLa_x)Ti₃O₁₂ (BLT) thin films in Ar/Cl₂ inductively coupled plasma (ICP) and plasma-induced damages at the etched surfaces were investigated as a function of gas-mixing ratios. The maximum etch rate of BLT thin films was 50.8 nm/min of 80% Ar/20% Cl₂. From various experimental data, amorphous phases on the etched surface existed on both chemically and physically etched films, but the amorphous phase was thicker after the 80% Ar/20% Cl₂ process. Moreover, crystalline “breaking” appeared during the etching in Cl₂-containing plasma. Also the remnant polarization and fatigue resistances decreased more for the 80% Ar/20% Cl₂ etch than for pure Ar plasma etch.     

EPR studies of native and impurity-related defects in II–IV–V2 semiconductors

Magnetic resonance studies of native defects in Zinc germanium diphosphide (ZnGeP₂) and their energy level positions in the band gap are reviewed and first results on defects in ZnSiP₂ are presented. The contribution of the dominant native defects to the optical absorption of ZnGeP₂ crystals is revealed by photo-EPR investigations in combination with the first ODMR experiments. The EPR results published for Mn and Fe in the II–IV–V₂ chalcopyrites are summarized. The observation of some new Mn centers and the first experimental detection of antiferromagnetic Mn–Mn coupled pairs in ZnGeP₂ are presented. In addition, new results concerning Mn-induced local changes of the free parameter x_f of the chalcopyrite structure at the impurity site are discussed.     

微波法制备高活性H1-xSr2Nb3-xMoxO10 (x = 0, 0.05, 0.1, 0.15 and 0.2) 光催化剂

通过微波辅助法制备出高活性H1-xSr2Nb3-xMoxO10光催化材料,制备过程和时间均被大大缩短。采用X射线粉末衍射（XRD）、扫描电镜（SEM）、紫外-可见吸收吸收光谱（UV-Vis DRS）等表征其材料性能。考察了催化材料在40W汞灯辐照下催化降解甲基橙的催化性能。实验结果表明,MoO3的掺入量为15%（摩尔分数）时,材料的光催化性能最优。     

Etch pits observation and etching properties of β-FeSi2

We have investigated the etching properties of p- and n-type β-FeSi₂ crystals grown from solution. Characteristic shapes of etch pits depending on the surface orientation was observed on the etched surface by using diluted hydrofluoric acid (5% of HF) and HF:HNO₃:H₂O=1:1:(2–8) solutions. However, the shapes of etch pits were independent of the conduction type and carrier density of the crystals. We also found the anisotropy of etch rates. The etch rates of the HF:HNO₃:H₂O=1:1:2 solution at 22°C were approximately 1.57, 1.43 and 1.09 μm/min on {1 1 1}, {1 0 0} and {0 0 1} faces of p-type β-FeSi₂ crystals, respectively.