Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Theoretical and experimental studies of the current–voltage and capacitance–voltage of HEMT structures and field-effect transistors

The sensitivity of classical n ⁺/n ^– GaAs and AlGaN/GaN structures with a 2D electron gas (HEMT) and field-effect transistors based on these structures to γ-neutron exposure is studied. The levels of their radiation hardness were determined. A method for experimental study of the structures on the basis of a differential analysis of their current–voltage characteristics is developed. This method makes it possible to determine the structure of the layers in which radiation-induced defects accumulate. A procedure taking into account changes in the plate area of the experimentally measured barrier-contact capacitance associated with the emergence of clusters of radiation-induced defects that form dielectric inclusions in the 2D-electron-gas layer is presented for the first time.     

Improvement of oxide thickness determination on MOS structures using capacitance–voltage measurements at high frequencies

It is well known that capacitance–voltage (C–V) measurements provide a simple determination of oxide thickness, but with the scaling down of components the classical method is not appropriated any more. We have observed that for two devices with the same oxide thickness and different surfaces, the classical method is accurate for large area but it is not adapted for the small one. We present a new procedure to make an accurate electrical determination of the oxide thickness on metal-oxide-semiconductor (MOS) structures of low dimensions in U.L.S.I. technology. Our method does not require a measurement in strong accumulation. It is based on C–V measurements at frequencies higher than 1 MHz associated to a non-linear optimisation of the experimental and theoretical band bending versus bias voltage curve (Ψ_S=f(V_g)), in the depletion mode. By this way, a corrective factor is estimated with precision in order to make an accurate determination of the oxide thickness value. We show that the frequency associated to the non-linear optimisation of Ψ_S=f(V_g) is function of the MOS device dimensions and is increased when the surface decreases. The experimental results obtained on low-dimension MOS structures and different oxide thickness are precise and in total agreement with those measured by ellipsometry. By using our new procedure the accuracy of oxide thickness determination is improved.     

Numerical simulation study of current–voltage characteristics of a Schottky diode with inverse doped surface layer

The Poisson’s equation and drift–diffusion equations are used to simulate the current–voltage characteristics of Schottky diode with an inverse doped surface layer. The potential inside the bulk semiconductor near the metal–semiconductor contact is estimated by simultaneously solving these equations, and current as a function of bias through the Schottky diode is calculated for various inverse layer thicknesses and doping concentrations. The Schottky diode parameters are then extracted by fitting of simulated current–voltage data into thermionic emission diffusion equation. The obtained diode parameters are analyzed to study the effect of inverse layer thickness and doping concentration on the Schottky diode parameters and its behavior at low temperatures. It is shown that increase in inverse layer thickness and its doping concentration give rise to Schottky barrier height enhancement and a change in the ideality factor. The temperature dependences of Schottky barrier height and ideality factor are studied. The effect of temperature dependence of carrier mobility on the Schottky diode characteristics is also discussed.     

Explanations of inconsistencies in capacitance–voltage profiles of normal and inverted heterostructures

The carrier distributions, obtained from capacitance–voltage measurements on semiconductor heterojunctions, are widely different, depending on whether the Schottky barrier is on the higher band gap semiconductor or on the lower band gap semiconductor. The actual carrier distributions as calculated in both cases are quite dissimilar from the measured distributions. Explanations for such observations have been sought through rigorous studies based on self-consistent solutions of Schrödinger and Poisson equations applied to the widely used GaAs/AlGaAs heterojunctions. It emerges that the nature of the carrier distributions is mostly dependent on the effects of the Debye smearing on the two dimensional and three dimensional components of the capacitances at the heterostructures. The applied electric field, necessary for measurements does not have a significant effect on the carrier distribution.     

A compare of electrical characteristics in Al/p-Si (MS) and Al/C20H12/p-Si (MPS) type diodes using current–voltage (I–V) and capacitance–voltage (C–V) measurements

In this study, both the metal-semiconductor (MS) and metal-polymer-semiconductor (MPS), (Al/C₂₀H₁₂/p-Si), type Schottky barrier diodes (SBDs) were fabricated using spin coating method and they were called as D₁ and D₂ diodes, respectively. Their electrical characterization have been investigated and compared using the forward and reverse bias I–V and C–V measurements at room temperature. The main electrical parameters such as ideality factor (n), reverse saturation current (I_o), zero-bias barrier height (Φ_Bo), series (R_s) and shunt (R_sh) resistances, energy dependent profile of interface states (N_ss), the doping concentration of acceptor atoms (N_A) and depletion layer width (W_D) were determined and compared each other and literature. The rectifying ratio (RR) and leakage current (I_R) at ±3 V were found as 2.06×10³, 1.61×10⁻⁶ A and 15.7×10³, 2.75×10⁻⁷ A for D₁ and D₂, respectively. Similarly, the R_s and R_sh values of these diodes were found as 544 Ω, 10.7 MΩ and 716 Ω and 1.83 MΩ using Ohm’s Law, respectively. In addition, energy and voltage dependent profiles of N_ss were obtained using the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) and n and low-high frequency capacitance (C_LF–C_HF) methods, respectively. The obtained value of N_ss for D₂ (MPS) diode at about the mid-gap of Si is about two times lower than D₁ (MS) type diode. Experimental results confirmed that the performance in MPS type SBD is considerably high according to MS diode in the respect of lower values of N_ss, R_s and I_o and higher values of RR and R_sh.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Modeling the effect of deep traps on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates

Numerical simulation, using SILVACO-TCAD, is carried out to explain experimentally observed effects of different types of deep levels on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates. Two diodes were grown on (311)A and (211)A oriented GaAs substrates using Molecular Beam Epitaxy (MBE). Although, deep levels were observed in both structures, the measured capacitance–voltage characteristics show a negative differential capacitance (NDC) for the (311)A diodes, while the (211)A devices display a usual behaviour. The NDC is related to the nature and spatial distribution of the deep levels, which are characterized by the Deep Level Transient Spectroscopy (DLTS) technique. In the (311)A structure only majority deep levels (hole traps) were observed while both majority and minority deep levels were present in the (211)A diodes. The simulation, which calculates the capacitance–voltage characteristics in the absence and presence of different types of deep levels, agrees well with the experimentally observed behaviour.     

The effect of frequency and temperature on capacitance/conductance–voltage (C/G–V) characteristics of Au/n-GaAs Schottky barrier diodes (SBDs)

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of the Au/n-GaAs Schottky barrier diodes (SBDs) have been investigated for 10, 100 and 500 kHz at 80 and 280 K. To evaluate the reason of non-ideal behavior in C–V and G/ω–V plots, the measured C and G/ω values were corrected by taking into accounts series resistance effect. Experimental results show that the values of C and G/ω were found to be a strong function of interface states (N_ss) at inverse and depletion regions especially at low frequencies, but R_s is effective only at the accumulation region especially at high frequencies. Such behavior of the C and G/ω values may be attributed to an increase in polarization especially at low frequencies and the existence of N_ss or dislocations between metal and semiconductor. It can be concluded that the increase in C and G/ω at low frequencies especially at weak and depletion regions results from the existence of N_ss. The values of doping concentration (N_d) and barrier height (BH) between metal and semiconductor were also obtained from the linear part of high frequency (500 kHz) C⁻² vs. V plots at 80 and 280 K, respectively.     

Simulation of scanning capacitance microscopy measurements on micro-sectioned and bevelled n+–p samples

In this work we compare simulations of SCM measurements on bevelled and micro-sectioned samples for investigating the impact of the carrier spilling effect. Simulation results are validated by experimental data obtained from dedicated samples calibrated by spreading resistance profiling. We show that 3D-based direct inversion of data measured on micro-sectioned bipolar samples results into a good quantitative agreement with the experimental spreading resistance profile in the area where carrier spilling is negligible. 2D-based simulations of bevelled bipolar samples reproduce qualitatively the measured SCM profiles. These results lead to the conclusion that also in the case of SCM, the lateral resolution in junction delineation can be improved by characterizing bevelled samples.     

Effect of annealing temperature on the electrical characteristics of Platinum/4H-SiC Schottky barrier diodes

Pt/4H-SiC Schottky barrier diodes have been fabricated to investigate the effect of annealing on the electrical characteristics of the fabricated devices. The parameters such as barrier height, ideality factor and donor concentration were deduced from the current–voltage (I–V) and the capacitance–voltage (C–V) measurements at room temperature. Diodes showed non-ideal behaviour like high value of ideality factor and lower value of barrier height. A barrier height of 1.82?eV was obtained from C–V measurements and it was 1.07?eV when obtained from the I–V measurements with ideality factor 1.71 for as-deposited diodes at room temperature. The diodes, therefore, were annealed in the temperature range from 25°C to 400°C to observe the effect of annealing temperature on these parameters. Schottky barrier height and ideality factors were found to be temperature-dependent. After rapid thermal annealing upto 400°C, a barrier height of 1.59?eV from C–V measurements and the value of 1.40?eV from I–V measurements with ideality factor 1.12 were obtained. Barrier heights deduced from C–V measurements were consistently larger than those obtained from I–V measurements. To come to terms with this discrepancy, we re-examined our results by including the effect of ideality factor in the expression of the barrier height. This inclusion of ideality factor results in reasonably good agreement between the values of barrier height deduced by the above two methods. We believe that these improvements in the electrical parameters result from the improvement in the quality of interfacial layer.     

高Al组分AlGaN肖特基二极管研制

制备了高Al组分AlxGal-xN肖特基二极管(x≥0.4),并且研究了该二极管在退火前后I-V特性的变化.计算了退火前后该器件的理想因子、势垒高度.退火后势垒高度由0.995 eV提高到1.1689 eV,理想因子由1.699增大为1.934,器件的接触特性得到改善,在-5V时,暗电流密度减小为1.025×10-6 A/cm2.     

On the voltage‐dependent series resistance of a planar Schottky barrier diode

The series resistance of a planar Schottky barrier diode fabricated on p‐type silicon is investigated by analysing the current–voltage characteristics of the device. Different characterisation techniques have been applied to obtain the value of the series resistance of the device. It is found that the existing techniques are either not applicable for the present device or yield unreliable value for the series resistance. A numerical analysis of the I–V data reveals unusual voltage dependence of the series resistance of the device. The anomaly has been resolved by postulating a potential barrier at the ohmic contact and drawing analogy to serially connected high‐ and low‐barrier diodes in a back‐to‐back configuration. It is found that the voltage dependence of the series resistance of the device can be described by certain empirical law, which also applies to device on GaN. The measured voltage behaviour of the ac resistance and capacitance of the device at different frequencies have been found to be consistent with those of a serial combination of diodes considered to verify the postulate made in interpreting the I–V data.     

Schottky barriers on n-GaN grown on SiC

Characteristics of Schottky barriers fabricated on n-type GaN were investigated. The barriers were formed by vacuum thermal evaporation of Cr, Au, and Ni. Current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the barriers were measured in a wide temperature and current density range. Fundamental parameters (barrier height and built-in potential) of the Schottky barriers were determined. The dependence of the barrier ideality factor on doping concentration in GaN was measured. Correlation between the barrier height and metal work function was observed. The electron affinity for GaN was determined using both C-V and I-V characteristics. The current flow mechanism through the barriers is discussed.     

一种隐埋缓冲掺杂层高压SBD器件新结构

提出了一种新型隐埋缓冲掺杂层(IBBD)高压SBD器件,对其工作特性进行了理论分析和模拟仿真验证.与常规高压SBD相比,该IBBD-SBD在衬底上方引入隐埋缓冲掺杂层,将反向击穿点从常规结构的PN结保护环区域转移到肖特基势垒区域,提升了反向静电释放(ESD)能力和抗反向浪涌能力,提高了器件的可靠性.与现有表面缓冲掺杂层...     

AlGaN/GaN和AlGaN SBD的温度特性研究

研究了AlGaN/GaN异质结构上的肖特基接触的基本原理及载流子的高温输运特性.将AlGaN/GaN异质结SBD和AlGaN SBD,在27～250℃进行实验比较.发现随着温度上升,AlGaN SBD的势垒高度下降,理想因子增加,其影响因素包括热电子发射、场发射、隧穿效应及复合电流效应等机制.而AlGaN/GaN异质结SBD由于受到压电极化场和2DEG和的影响,其势垒高度和理想因子随温度的变化趋势与AlGaNSBD相反.实验结果还显示,AlGaN/GaN异质结SBD的反向电流随着温度的上升,呈现先增大后减小的趋势.