双极型静电感应晶体管特性转变机理分析

本文对双极型静电感应晶体管（ＢＳＩＴ）的工作机理进行了二维分析，给出了明确的ＢＳＩＴ从单极作用机制到双转变过程的物理图象。得到了作用机制转变时的栅压、势分布以及载流子和电场分布等的数值计算结果。     

平面型埋栅结构的静电感应晶体管

在表面栅和埋栅结构的基础上,提出了一种制造静电感应晶体管的新型结构,平面型埋栅结构.用普通的平面工艺实现了具有高击穿电压的埋栅结构,避免了工艺难度较大的二次外延和台面腐蚀工艺.实验结果表明该结构可用于制造各种功率静电感应器件,其优点是具有高的击穿电压和高的阻断增益,并讨论了平面型埋栅结构的主要特点和制造工艺.     

平面型埋栅结构的静电感应晶体管

在表面栅和埋栅结构的基础上,提出了一种制造静电感应晶体管的新型结构,平面型埋栅结构.用普通的平面工艺实现了具有高击穿电压的埋栅结构,避免了工艺难度较大的二次外延和台面腐蚀工艺.实验结果表明该结构可用于制造各种功率静电感应器件,其优点是具有高的击穿电压和高的阻断增益,并讨论了平面型埋栅结构的主要特点和制造工艺.     

双极型静电感应晶体管的温度特性

通过双极型静电感应晶体管（ＢＳＩＴ）与普通双极型晶体管（ＢＪＴ）温度特性的对比，研究ＢＳＩＴ的温度特性。由实验看出，影响ＢＳＩＴ温度特性的主要因素是载流了迁移率μ和邮源极越过势垒的电子数目ｎ。以盯可解释几个在观察ＢＳＩＴ温度特性时所遇到的现象。     

双极型静电感应晶体管开关时间的测量与分析

从理论和实验两方面对静电感应晶体管（ＢＳＩＴ）的开关时间进行了分析和测量，提出了简单的分析方法，将影响ＢＳＩＴ开关时间的各个因素归结为结构因子和材料因子，从而简化了分析影响ＢＳＩＴ开关时间的因素，对于ＢＳＩＴ的实际工艺，结构设计有指导意义。     

绝缘栅双极型晶体管的研究进展

作为一种新型的功率半导体器件,绝缘栅双极型晶体管（IGBT）以其优越的性能,成为中高功率电力电子领域的主流功率开关器件,被广泛应用于智能电网、新能源、高速铁路、工业控制、汽车电子、家电产品、消费电子等领域。概述了IGBT的演变历程以及主要技术发展,同时对我国IGBT的发展现状进行了分析。     

一种新型电子节能灯用晶体管——双极型静电感应晶体管

本文简要叙述了开发和研制ＢＳＩＴ的市场背景和技术现状，对ＢＳＩＴ器件模型进行了理论分析，对ＢＳＩＴ器件的设计和制作工艺进行了探讨，并分析了ＢＳＩＴ器件的工作原理和特性；介绍了ＢＳＩＴ器件的应用和上灯试用情况。     

Improvement on the dynamical performance of a power bipolar static induction transistor with a buried gate structure

The failure of a bipolar static induction transistor(BSIT) often occurs in the transient process between the conducting-state and the blocking-state,so a profound understanding of the physical mechanism of the switching process is of significance for designing and fabricating perfect devices.The dynamical characteristics of the transient process between conducting-state and blocking-state BSITs are represented in detail in this paper.The influences of material,structural and technological parameters on the dynamical performances of BSITs are discussed. The mechanism underlying the transient conversion process is analyzed in depth.The technological approaches are developed to improve the dynamical characteristics of BSITs.     

沟道电势分布对静电感应晶闸管瞬态特性的影响

本论文从理论和实验上研究了由几何参数与偏置电压决定的沟道电势分布对静电感应晶闸管(SITH)瞬态性能的影响。从理论上推导出了SITH势垒高度和I-V特性的数学表达式。论文深入研究了影响器件在阻断态和导通态瞬态性能的主要因素和机理。研究结果对SITH的设计、制造、性能优化和应用有一定的指导意义。     

电力静电感应晶体管大电压特性的改善

A novel structure for designing and fabricating a power static induction transistor（SIT）with excellent high breakdown voltage performance is presented.The active region of the device is designed to be surrounded by a deep trench to cut off the various probable parasitical effects that may degrade the device performance,and to avoid the parallel-current effect in particular.Three ring-shape junctions（RSJ）are arranged around the gate junction to reduce the electric field intensity.It is important to achieve maximum gate–source breakdown voltage BVGS, gate–drain breakdown voltage BVGD and blocking voltage for high power application.A number of technological methods to increase BVGD and BVGS are presented.The BVGS of the power SIT has been increased to 110 V from a previous value of 50–60 V,and the performance of the power SIT has been greatly improved.The optimal distance between two adjacent ring-shape junctions and the trench depth for the maximum BVGS of the structure are also presented.     

Improvements on high voltage performance of power static induction transistors

A novel structure for designing and fabricating a power static induction transistor (SIT) with excellent high breakdown voltage performance is presented. The active region of the device is designed to be surrounded by a deep trench to cut off the various probable parasitical effects that may degrade the device performance, and to avoid the parallel-current effect in particular. Three ring-shape junctions (RSJ) are arranged around the gate junction to reduce the electric field intensity. It is important to achieve maximum gate-source breakdown voltage BVGS, gate-drain breakdown voltage BVGD and blocking voltage for high power application. A number of technological methods to increase BVgd and BVGs are presented. The BVGS of the power SIT has been increased to 110 V from a previous value of 50-60 V, and the performance of the power SIT has been greatly improved. The optimal distance between two adjacent ring-shape junctions and the trench depth for the maximum B VGS of the structure are also presented.     

Current saturation effect for pentacene-based static induction transistor under negative drain-source and gate voltages

Usually, the drain-source current (I_DS) increases with positive drain-source voltage (V_DS) for pentacene-based organic static induction transistor (OSIT) ITO(Source)/Pentacene/Al(Gate)/Pentacene/Au(Drain) and it shows an inherent rectifying property under negative gate voltages (V_G), i.e. the slope of I_DS vs. V_DS curve increases with V_DS but without any current saturation effect. In this paper, we investigated the electrical characteristics of pentacene-based OSIT ITO/Pentacene(80 nm)/Al(15 nm)/Pentacene(80 nm)/Au under negative V_DS and V_G, and found that I_DS changed from rectifying property to saturation effect when the magnitude of negative V_DS was increased from 0 V to −6 V under negative V_G, and the turn-on voltage (V_ON) moved to larger negative voltages when the magnitude of negative V_G increased and the movement step of V_ON gets smaller after keeping the device for a long time, and the possible mechanisms for such a kind of current modulation were discussed.     

微波功率晶体管的金属气密封装

提出了晶体管自身组态与电路组态匹配的思想,介绍了一种微波功率晶体管的金属气密封装--选极F型封装技术.还介绍了1.5GHz和2.0GHz选极F型封装微波功率晶体管的技术指标和功能特征.     

An insulated gate bipolar transistor employing the plugged n anode

A vertical Insulated Gate Bipolar Transistor, entitled CB-IGBT(Carrier-inducing Barrier-controlled IGBT) has been proposed and verified by a two-dimensional numerical simulation. The structure of the proposed device is almost identical with that of the conventional IGBT, except for the anode structure in which the p-barrier region and n⁺ anode region are employed. In the CB-IGBT, the potential barrier height at the junction between the p-barrier region and n-drift region is controlled by the amount of carriers, so that the trade-off relation between the on-state voltage drop and the switching speed is decoupled efficiently. The switching speed of CB-IGBT is so much enhanced with a negligible increase of the on-state voltage drop, since electrons stored in the n-drift region can be extracted rapidly into the n⁺ anode via p-barrier region during turn-off process.     

台槽刻蚀对埋栅型静电感应晶体管特性的影响

对埋栅型SIT,为切断栅极和源极（或阴极）之间在外延过程中形成的连体,打开栅电极区,进行外延后的台面刻蚀,对台面刻蚀的深度和形状进行研究;为消除栅墙外划片边界造成的各种寄生效应,在有源区的外面挖深槽,以保证栅源击穿发生在内部、实现击穿接近理论值。对先刻蚀台面还是先刻蚀槽的问题做了实验对比,结果发现先台后槽更有利于器件特性的改善。     

Monomolecular layer epitaxy of GaAs for ideal static induction transistor

An ideal static induction transistor (ISIT) structure was fabricated using molecular layer epitaxy (MLE). The doping method of MLE enabled us to achieve a sufficiently high level of doping for ISIT fabrication. In the fabrication process a low growth temperature was very important for the device structure, which requires very sharp dopant profiles. For the ISIT, two MLE processes, namely source–drain growth and gate regrowth, were required. The electrical characteristics of the source–drain were changed after heat treatment at a temperature higher than 480°C. The effect of the redistribution of dopants of the source–drain structure (n⁺⁺–i–p⁺⁺–i–n⁺) during gate regrowth was clearly shown by SIMS (secondary ion mass spectroscopy) measurements for various temperatures of heat treatment. As a result the doped Se diffused from the n⁺⁺ source region to the other layers and the doped Zn diffused from the p⁺⁺ layer to the i-layers. The source was a heavily Se-doped layer at the doping level of (2–3)×10¹⁹ cm⁻³ containing a larger amount of interstitial Se atoms in the lattice. The redistribution of Se from the heavily doped region was detectable even after heat treatment at 480°C for 30 min. For the p⁺⁺ layer the profile of the C-doped layer was stable even after heat treatment at 620°C for 30 min, but the profile of Zn changed markedly after heat treatment at 480°C for 30 min. In addition, the carbon-doped p⁺⁺ layer acted as a gettering layer for diffused interstitial Se from the source region. The driving force of the redistribution of dopants results in the electric field in the device structures. © 1997 John Wiley & Sons, Ltd.     

栅缓冲层对4H碳化硅肖特基势垒场效应晶体管性能的影响

通过在栅极和沟道层间插入一层低掺杂的缓冲层研究了其对肖特基势垒场效应晶体管性能的影响。通过求解一维和二维泊松方程,得到了电流和小信号参数与缓冲层厚度和浓度的依赖关系。当缓冲层厚度为0.15μm时,计算了器件的直流和交流特性;同时仿真了器件的击穿特性。结果表明,电流随缓冲层厚度增加;击穿电压由125V增加到160V;截止频率由20GHz增加到27GHz。