低电压C类SiGe微波功率异质结双极型晶体管

给出了低电压微波 Si Ge功率异质结双极型晶体管 (HBT)的器件结构和测试结果 .器件结构适于低压大电流状态下应用 .采用了梳状发射极条的横向版图设计 ,其工作电压为 3— 4V.在 C类工作状态 ,1GHz的工作频率下 ,输出功率可以达到 1.6 5 W,具有 8d B的增益 . 3V时可以达到的最高收集极效率为 6 7.8% .     

磁控溅射AlN介质的14W/mm AlGaN/GaN MIS-HEMT

介绍了一种采用磁控溅射AlN介质作为绝缘层的的SiC衬底AlGaN/GaN MIS-HEMT.器件研制中采用了凹槽栅和场板结构.采用MIS结构后,器件击穿电压由80 V提高到了180 V以上,保证了器件能够实现更高的工作电压.在2 GHz、75 V工作电压下,研制的200μm栅宽AlGaN/GaNMIS-HEMT输出功率密度达到了14.4 W/mm,器件功率增益和功率附加效率分别为20.51 dB和54.2%.     

磁控溅射AIN介质MIS栅结构的AlGaN/GaN HEMT

报道了一种X波段输出功率密度达10.4 W/mm的SiC衬底AIGaN/GaN MIS-HEMT,器件研制中采用了MIS结构、凹槽栅以及场板,其中MIS结构中采用了磁控溅射的A1N介质作为绝缘层.采用MIS结构后,器件击穿电压由80 V提高到了180 V以上,保证了器件能够实现更高的工作电压.在8 GHz、55 V的工作电压下,研制的1 mm栅宽AlGaN/GaN MIS-HEMT输出功率达到了10.4 W,此时器件的功率增益和功率附加效率分别达到了6.56 dB和39.2%.     

8W AlGaN/GaN HEMT功率器件的研制

报道了基于国产衬底以及国产外延的AlGaN/GaN HEMT X波段功率器件的研究进展.利用国产衬底以及外延材料,优化了器件栅场板的结构,研制成功栅长0.35μm,栅宽为lmm的微波功率器件.该器件输出电流密度达到0.83A/mm,击穿电压大于100V,跨导为236mS/mm,截止频率(fT)达到30GHz,最大振荡频率(fmax)为32GHz,8GHz下在片进行连续波测试,漏端电压为40V时测试得到功率增益4.9dB,输出功率达8W,功率附加效率(PAE)为45%.     

8W AlGaN/GaN HEMT功率器件的研制

报道了基于国产衬底以及国产外延的AlGaN/GaN HEMT X波段功率器件的研究进展.利用国产衬底以及外延材料,优化了器件栅场板的结构,研制成功栅长0.35μm,栅宽为lmm的微波功率器件.该器件输出电流密度达到0.83A/mm,击穿电压大于100V,跨导为236mS/mm,截止频率(fT)达到30GHz,最大振荡频率(fmax)为32GHz,8GHz下在片进行连续波测试,漏端电压为40V时测试得到功率增益4.9dB,输出功率达8W,功率附加效率(PAE)为45%.     

磁控溅射AlN介质MIS栅结构的AlGaN/GaN HEMT

报道了一种X波段输出功率密度达10.4W/mm的SiC衬底AlGaN/GaN MIS-HEMT。器件研制中采用了MIS结构、凹槽栅以及场板,其中MIS结构中采用了磁控溅射的AlN介质作为绝缘层。采用MIS结构后,器件击穿电压由80V提高到了180V以上,保证了器件能够实现更高的工作电压。在8GHz、55V的工作电压下,研制的1mm栅宽AlGaN/GaN MIS-HEMT输出功率达到了10.4W,此时器件的功率增益和功率附加效率分别达到了6.56dB和39.2%。     

槽栅MOS控制的晶闸管

报道了一种新结构的功率栅控晶闸管,称其为槽栅MOS控制的晶闸管（TMCT）.在该器件结构中,采用UMOS控制晶闸管的开启和关闭.结构中不存在任何的寄生器件,因此,消除了在其它结构的栅控晶闸管中由寄生晶体管引起的各种问题,所以TMCT会有优良的电特性.实验结果表明,多元胞TMCT（600V,有源区面积0.2mm2）的开态压降在300A/cm2时为1.25V,最大可控电流在栅压为-20V和电感负载下达到了296A/cm2.     

3300V碳化硅肖特基二极管及混合功率模块研制

基于数值仿真结果,采用结势垒肖特基(JBS)结构和多重场限环终端结构实现了3 300 V/50 A 4H-SiC肖特基二极管(SBD),所用4H-SiC外延材料厚度为35 μm、n型掺杂浓度为2× 1015cm-3.二极管芯片面积为49 mm2,正向电压2.2V下电流达到50 A,比导通电阻13.7 mΩ· cm2;反偏条件下器件的雪崩击穿电压为4 600 V.基于这种3 300 V/50 A 4H-SiC肖特基二极管,研制出3 300 V/600 A混合功率模块,该模块包含24只3 300 V/50 A Si IGBT与12只3 300 V/50 A 4H-SiC肖特基二极管,SiC肖特基二极管为模块的续流二极管.模块的动态测试结果为:反向恢复峰值电流为33.75 A,反向恢复电荷为0.807 μC,反向恢复时间为41 ns.与传统的Si基IGBT模块相比,该混合功率模块显著降低了器件开关过程中的能量损耗.     

凹槽栅场调制板结构AlGaN/GaN HEMT

研制的SiC衬底上的AlGaN/GaN微波功率HEMTs,采用凹槽栅和场调制板结构有效抑制了器件的电流崩塌,提高了器件的击穿电压和器件的微波功率特性.研制的1mm栅宽器件在8GHz,34V工作电压下,饱和输出功率达到了9.05W,功率增益为7.5dB,功率附加效率为46%.     

槽栅MOS控制的晶闸管

报道了一种新结构的功率栅控晶闸管 ,称其为槽栅 MOS控制的晶闸管 (TMCT) .在该器件结构中 ,采用 U-MOS控制晶闸管的开启和关闭 .结构中不存在任何的寄生器件 ,因此 ,消除了在其它结构的栅控晶闸管中由寄生晶体管引起的各种问题 ,所以 TMCT会有优良的电特性 .实验结果表明 ,多元胞 TMCT (6 0 0 V,有源区面积0 .2 m m2 )的开态压降在 30 0 A / cm2 时为 1.2 5 V,最大可控电流在栅压为 - 2 0 V和电感负载下达到了 2 96 A/ cm2 .     

A coplanar CMOS power switch

A 300 V power switch in a high-voltage CMOS technology compatible with a low-voltage MOS/bipolar technology is presented. This circuit can switch positive and negative 150 V pulses with rise and fall times of 100 ns for a 200 pF capacitive load. The switch has a low-voltage input control (/spl plusmn/15 V). Using earth-symmetrical non-overlapping high-voltage pulses as dynamic supply voltages, it is possible to reduce the power dissipation during the switching time considerably in comparison with the power dissipation of power switches, which use static (i.e., constant) supply voltages under the same conditions.     

改进结构的低压低功耗CMOS带隙基准源

提出了一种低电压、低功耗、中等精度的带隙基准源,针对电阻分流结构带隙基准源在低电源电压下应用的不足作出了一定的改进,整体电路结构简单且便于调整,同时尽可能地减少了功耗.该电路采用UMC 0.18 μm Mixed Mode 1.8 V CMOS工艺实现.测试结果表明,电路在1 V电源电压下,在-20～30℃的温度范围内,基准电压的温度系数为20×10-6/℃,低频时的电源电压抑制比为-54 dB,1 V电源电压下电路总功耗仅为3μW.     

低电压低功耗ECL电路设计

首先指出了 ECL电路随着集成度和速度的提高 ,存在着功耗太大的问题 ,进而提出了采用低电压电源以降低功耗 ,为此发展了将串联开关转换成并联开关的技术 ,保证了电路能在低电压下正常工作 ,并由此实现了适合于低电压工作的 ECL电路的开关级设计。从对设计的电路进行的计算机模拟结果表明 ,采用文中提出的并联开关技术设计的电路 ,在电源电压为 -2 .5 V时 ,不仅具有正确的逻辑功能和较高的工作速度 ,且比采用-5 .0 V电源的电路节约了 80 %以上的功耗     

Flicker noise conversion in CMOS LC oscillators: capacitance modulation dominance and core device sizing

This paper reports a low-voltage low-power injection-locked oscillator suitable for short range wireless transmitter applications in a wireless body area network (WBAN). Low-power transmitter with high efficiency is a major design challenge for short range wireless communication. Unlike conventional transmitters used for cellular communication, injection-locked transmitter shows reduced power consumption and high transmitter efficiency. The core block of an injection-locked transmitter is an injection-locked oscillator. In this work a low-voltage low-power injection-locked LC oscillator has been designed and fabricated employing self-cascode structure and body-terminal coupling. The proposed oscillator has been realized using 0.18-μm RF CMOS process. Experimental results indicate that the prototype oscillator can operate with a supply voltage as low as 0.9 V and consumes only 1.4 mW of power. The relatively low-voltage and low-power operation of the design makes it highly suitable for low-power transmitter applications.     

Buried source-side injection (BSSI) for flash EPROM programming

A flash-EPROM cell structure that can be programmed at low drain voltages and low power is disclosed. The new element in the device structure is the incorporation of buried junction at the source side where the high electric field region is established during programming. The cell is programmed by hot-electron injection at the source side and erased by Fowler-Nordheim tunneling at the drain side. Typical programming time of 10 μs/byte can be accomplished with 3.5 V on the drain junction. The structure can be built with the standard EPROM technology and can offer advantages in low-voltage power supply systems such as portable and notebook computers     

Low-voltage CMOS circuits for analog iterative decoders

Iterative decoders, including Turbo decoders, provide near-optimal error protection for various communication channels and storage media. CMOS analog implementations of these decoders offer dramatic savings in complexity and power consumption, compared to digital architectures. Conventional CMOS analog decoders must have supply voltage greater than 1 V. A new low-voltage architecture is proposed which reduces the required supply voltage by at least 0.4 V. It is shown that the low-voltage architecture can be used to implement the general sum-product algorithm. The low-voltage analog architecture is then useful for implementing Turbo and low-density parity check decoders. The low-voltage architecture introduces new requirements for signal normalization, which are discussed. Measured results for two fabricated low-voltage analog decoders are also presented.     

Punchthrough transient voltage suppressor for low-voltageelectronics

Transient voltage suppressors for electronic circuits with power supply voltage of 3.3 V or lower are urgently needed but unavailable due to excessive leakage of low-voltage reversed p-n diodes. We analyzed several candidate device structures by using two-dimensional device simulation. Adopting the punchthrough mechanism in an n⁺p⁺p^-n⁺ structure rather than the traditional avalanche mechanism in a p⁺n⁺ structure, we can achieve low standoff voltage with excellent performances in low leakage current, low capacitance, and low clamping voltage. The new device appears to be satisfactory for protecting future electronic systems with power supply voltage at least down to 1.5 V     

A new low-voltage and high-speed sense amplifier for flash memory

A new low-voltage and high-speed sense amplifier is presented,based on a very simple direct current-mode comparison.It adopts low-voltage reference current extraction and a dynamic output method to realize its performance indicators such as low voltage,low power and high precision.The proposed amplifier can sense a 0.5μA current gap and work with a lowest voltage of 1V.In addition,the current power of a single amplifier is optimized by 15%.     

A well-synchronized sensing/equalizing method for sub-1.0-Voperating advanced DRAMs

Proposes an advanced DRAM array driving technique which can achieve low-voltage operation, a well-synchronized sensing and equalizing method. This method sets the DRAM array free from the body effect, achieves a small influence of the short channel effect, and reduces the leakage current. The sense and restore amplifier and equalizer can operate rapidly under a low-voltage operating condition such as 1.0 V V_CC. Therefore, one can make determining the V _th easy for the satisfaction of the high-speed, the low-power dissipation, and a simple device structure. The well-synchronized sensing and equalizing method is applicable to low-voltage operating DRAMs with capacity of 256 Mbits and more