A method for finding bounds on the location of all the solutions of dc piecewise-linear circuits

In this paper a method is developed for rapidly finding bounds on the location of all the solutions of a broad class of DC piecewise-linear circuits. the class includes diode-transistor circuits as well as circuits containing locally active resistors and controlled sources. the method can be useful as a preliminary stage of the computation process in which the well-known Chua-Ying algorithm is used for finding all solutions. It improves the efficiency of the Chua-Ying algorithm. the convergence of the computation process is discussed in detail and numerical examples are given.     

Finding all solutions of piecewise-linear circuits

A new algorithm is given for solving the d.c. piecewise-linear equations of non-linear electronic circuits. The device models are assumed, with little loss of generality, to be made of 2-terminal piecewise-linear resistors and linear controlled sources. Unlike other methods, this algorithm guarantees that all solutions will be found in a finite number of steps. The method depends crucially on a recent development which allows a multi-dimensional piecewise-linear function to be represented in a closed canonical form. This highly compact representation requires only a minimum amount of computer storage and is responsible for the efficiency of the algorithm.     

An approach to modelling DC-DC converter circuits using graph theoretic concepts

An approach to modelling DC-DC converter circuits based on graph theoretic concepts is discussed in this paper. the DC-DC converter circuits are treated as networks containing switches, with the magnitudes of their associated eigenvalues much smaller than the switching frequency. the procedure for modelling this class of networks essentially involves separating the original network into two N-port networks, one containing those branches responsible for all phenomena peculiar to the switching action and the other containing the remaining branches of the network. the two N-port networks thus formed lead to a systematic and convenient way of developing low-frequency circuit models for DC-DC converter circuits.     

An efficient algorithm for analysis of piecewise-linear resistive circuits: Driving-point and transfer characteristic plots

A new efficient algorithm is presented for finding all driving-point characteristic (DP) and transfer characteristic (TC) plots for a broad class of piecewise-linear (PWL) resistive circuits without the need for initial points for each solution branch. the piecewise-linear circuits to be considered need not be continuous nor need their linear regions be divided by grid-like hyperplanes. the computation of the new algorithm is based on zone-by-zone instead of the conventional region-by-region. Since each zone includes several regions and only one matrix inversion is needed for each zone, a significant reduction of computation can be achieved. Furthermore, the computational complexity for finding all solution branches, i.e. finding the DC operating points over the entire range of input values u, is no more than for finding all DC operating points over a single value u as far as the number of matrices needed to be inverted is concerned.     

A global delay model for domino cmos circuits with application to transistor sizing

Domino CMOS circuits have played important roles in the design of high-speed VLSI chips such as 32-bit microprocessors and their family chips. Many researchers have worked on the characterization of the delay time and optimal design of domino CMOS circuits using circuit simulators as the main CAD tools. This paper presents a global analytical delay model for an important class of domino CMOS circuits wherein a multitude of n-channel transistors form a series connection. the new model is shown to predict the delay time from the precharging clock edge to the 0.5 V_DD output level with less than 10% error as compared to that from SPICE simulation over the entire design space. the delay model has been applied efficiently to the design automation of domino CMOS circuits modules.     

A discrete-time approach to the steady state analysis and optimization of non-linear autonomous circuits

In this paper a method for the steady state analysis and optimization of non-linear autonomous circuits is described. After discretizing the linear part of the circuit, a system of non-linear algebraic equations is obtained. the final formulation is written entirely in the discrete-time domain, making it unnecessary to repeatedly take direct and inverse DFTs during the solution process. Furthermore, it is shown that the resulting formulation may be viewed as a generalization of the harmonic balance equations. an analytic method for computing the exact partial derivatives of the resulting equations with respect to the samples of the variables, the oscillation period and the circuit element values is described, making the proposed approach efficient for both analysis and optimization. Different globally convergent techniques for solving the non-linear system of equations are described, with emphasis on an algorithm based on fast simulated diffusion. Selected application examples are provided to validate the proposed approach.     

A novel approach to dynamic load modelling

A novel approach is proposed for the dynamic modelling of electric power loads in which the parameters of the equivalent single-unit model are estimated with a constrained nonlinear recursive filter (CNLRF) based on the data obtained from field tests. No prior knowledge of the values of individual load parameters or the iterative solution of the state equations is required. The algorithm is validated by applying it to an industrial load of 30 MW supplied by two 115 kV feeders. The industrial load is mostly rotating machines, consisting principally of motors of various sizes. The load responses were recorded during sudden voltage dips. The simulated results obtained with the nonlinear composite model developed in the paper are very close to those recorded from field tests, while the linearized model exhibits larger error in the case of bigger voltage dips     

Passive approach to switched-capacitor circuits

The possibility of developing a passive approach to switched-capacitor circuits is explored in the present paper with particular reference to the determination of a valid scheme for the parallel LC resonator and for the inductor. The schemes proposed for these switched-capacitor components are shown to be valid in the typical situations of operation. The results of several tests, carried out both on prototypes and on the digital computer by simulation, illustrate the behaviour of the proposed circuits and confirm their effectiveness.     

A new approach to overcome the overflow problem in computer-aided analysis of nonlinear resistive circuits

This paper is addressed to the so-called overflow problem commonly encountered in the computer simulation of nonlinear resistive circuits containing rapidly varying nonlinearities—such as exponentials found in the models of diodes and transistors. A novel approach which makes use of the arc-lengths of the nonlinear characteristic curves as the variables of iteration is proposed. It is proved, under rather mild conditions, that the arc-length approach not only overcomes the overflow problem, but also leads to a more rapid rate of convergence. Moreover, it is proved that for most practical diode-transistor circuits, the region of convergence associated with the arc-length approach is larger and the convergence of the Newton-Raphson algorithm is not sensitive to the initial guess. Since it is more difficult to make good initial guesses when the size of the network is large, in so far as choosing the initial guess is concerned, the advantage for using the arc-length approach over the conventional approach increases with the size of the network. Extensive numerical experiments confirm the superior convergence property of this approach even for circuits which violate the sufficient conditions invoked by the rigorous mathematical proofs. Although the approach is applicable to a much wider class of nonlinear networks, particular emphasis is focused on diode-transistor networks in this paper.     

A matrix pencil approach to the local stability analysis of non‐linear circuits

This paper addresses local stability issues in non‐linear circuits via matrix pencil theory. The limitations of the state–space approach in circuit modelling have led to semistate formulations, currently framed within the context of differential‐algebraic equations (DAEs). Stability results for these DAE models can be stated in terms of matrix pencils, avoiding the need for state–space reductions which are not advisable in actual circuit simulation problems. The stability results here presented are applied to electrical circuits containing non‐linear devices such as Josephson junctions or MOS transistors. Copyright © 2004 John Wiley & Sons, Ltd.     

On stochastic modelling of linear circuits

In this paper, the deterministic modelling of linear circuits is replaced by stochastic modelling by including variance in the parameters (resistance, inductance and capacitance). Our method is based on results from the theory of stochastic differential equations. This method is general in the following sense. Any electrical circuit that consists of resistances, inductances and capacitances can be modelled by ordinary differential equations, in which the parameters of the differential operators are the functions of circuit elements. The deterministic ordinary differential equation can be converted into a stochastic differential equation by adding noise to the input potential source and to the circuit elements. The noise added in the potential source is assumed to be a white noise and that added in the parameters is assumed to be a correlated process because these parameters change very slowly with time and hence must be modelled as a correlated process. In this paper, we model a series RLC circuit by using the proposed method. The stochastic differential equation that describes the concentration of charge in the capacitor of a series RLC circuit is solved. Numerical simulations in MATLAB are obtained using the Euler–Maruyama method. Copyright © 2008 John Wiley & Sons, Ltd.     

A companion macromodelling approach for the transient analysis of MOS large-scale integrated circuits

Purpose of this work is to present a new macromodelling approach for the simulation at the device level of large MOS integrated circuits, requiring only marginal modifications to be implemented in the widely used circuit simulator SPICE. This method results in a substantial saving in computing time and guarantees the same accuracy of SPICE. A prototype simulator based on this method has been developed and used to analyse several significant circuits. In addition, since the method is particularly suitable to be implemented in parallel computers, some results obtained with the CRAY-YMP/432 computer are provided.     

Bifurcation analysis of a cusp-constrained piecewise-linear circuit

This paper gives a detailed bifurcation analysis of a cusp-constrained circuit in terms of the quantity ‘rotation-jump ratio’. This turns out to be a very natural quantity to analyse various interesting bifurcation phenomena observed in the circuit.     

A contribution to the analysis of magnetic circuits excited bypermanent-magnets

In this paper, the influence of permeability on flux density in magnetic circuits is relegated to a minor importance. Here, permeability is considered as a mere measure of the effectiveness of amperian currents in increasing magnetic intensity. Based on this interpretation, the solution of problems related to magnetic circuits excited by permanent-magnets is reduced to the solution of problems related to magnetic circuits excited exclusively by energized coils     

Simplex analysis of grounded concave piecewise-linear resistive networks

The physical properties of the networks under consideration may be advantageously used for saving time and storage in analysing nonlinear networks. The algorithm proposed in the present paper represents an attempt in this direction. It concerns a particular class of piecewise linear resistive networks and it is based on a modification of the simplex as originally proposed by Dantzig. The algorithm requires:

• 1 The analysis of the linear network obtained by the given one by replacing the nonlinear resistances by linear ones.
• 1 The application of the modified simplex.

This second step requires a number of arithmetical operations less than that necessary for analysing a linear resistive network having a number of nodes equal to the total number of break-points of the nonlinear resistances.