Post deposition UV-induced O2 annealing of HfO2 thin films

UV-assisted annealing processes for thin oxide films is an alternative to conventional thermal annealing and has shown many advantages such as low annealing temperature, reducing annealing time and easy to control. We report in this work the deposition of ultra-thin HfO₂ films on silicon substrate by two CVD techniques, namely thermal CVD and photo-induced CVD using 222 nm excimer lamps at 400 °C. As-deposited films of around 10 nm in thickness with refractive indices from 1.72 to 1.80 were grown. The deposition rate measured by ellipsometry was found to be about 2 nm/min by UV-CVD, while the deposition rate by thermal CVD is 20% less than that by UV-CVD. XRD showed that the as-deposited HfO₂ films were amorphous. This work focuses on the effect of post deposition UV annealing in oxygen on the structural, optical and electrical properties of the HfO₂ films at low temperature (400 °C). Investigation of the interfacial layer by FTIR revealed that thickness of the interfacial SiO₂ layer slightly increases with the UV-annealing time and UV annealing can convert sub-oxides at the interface into stoichiometric SiO₂, leading to improved interfacial qualities. The permittivity ranges in 8–16, are lower than theoretical values. However, the post deposition UV O₂ annealing results in an improvement in effective breakdown field and calculated permittivity, and a reduction in leakage current density for the HfO₂ films.     

Atomic-layer-deposited Al2O3 and HfO2 on GaN: A comparative study on interfaces and electrical characteristics

Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ films were deposited on n-type GaN using atomic layer deposition (ALD). The interfacial layer of GaON and HfON was observed between HfO₂ and GaN, whereas the absence of an interfacial layer at Al₂O₃/GaN was confirmed using X-ray photoelectron spectroscopy and transmission electron microscopy. The dielectric constants of Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ calculated from the C-V measurement are 9, 16.5, and 13.8, respectively. The Al₂O₃ employed as a template in the composite structure has suppressed the interfacial layer formation during the subsequent ALD-HfO₂ and effectively reduced the gate leakage current. While the dielectric constant of the composite HfO₂/Al₂O₃ film is lower than that of HfO₂, the composite structure provides sharp oxide/GaN interface without interfacial layer, leading to better electrical properties.     

Electrical reliability aspects of HfO2 high-k gate dielectrics with TaN metal gate electrodes under constant voltage stress

The dielectric breakdown property of ultrathin 2.5 and 5.0 nm hafnium oxide (HfO₂) gate dielectric layers with metal nitride (TaN) gate electrodes for metal oxide semiconductor (MOS) structure has been investigated. Reliability studies were performed with constant voltage stressing to verify the processing condition effects (film thicknesses and post metal annealing temperatures) on times to breakdown. The leakage current characteristics are improved with post metal annealing temperatures (PMA) for both 2.5 and 5.0 nm HfO₂ physical thicknesses. However, it is more prominent (2 orders of magnitudes) for 2.5 nm HfO₂ film thickness. The values of oxide-trapped charge density and interface-state density are also improved for 2.5 nm HfO₂ film. The different stages of charge-trapping behaviors, i.e., stress-induced leakage current, soft and hard breakdown mechanisms have been detected. During constant voltage stress of the MOS capacitors, an increase in the time-dependent gate current is observed, followed by the occurrence of several fluctuations. The amplitude of the fluctuations is much larger in the 5.0 nm HfO₂ gate dielectric layer compared to the 2.5 nm HfO₂ layer. After the occurrence of such fluctuations, the current–voltage characteristics exhibited an increased in gate current compared to the fresh (unstressed) devices.     

Influence of passivating interlayer on Ge/HfO2 and Ge/Al2O3 interface band diagrams

The energy band alignment between Ge, HfO₂ and Al₂O₃ was analyzed as influenced by passivating interlayers (ILs) of different composition (GeO₂, Ge₃N₄, Si/SiO_x). From internal photoemission and photoconductivity experiments we found no IL-sensitive dipoles at the Ge/HfO₂ interfaces, the latter being universally characterized by conduction and valence band offsets of 2.1 and 3.0 eV, respectively. However, in the case of HfO₂ growth using H₂O-based atomic layer deposition, the Ge oxide IL appears to have a narrower bandgap, 4.3 eV, than the 5.4–5.9 eV gap of bulk germania. Accordingly, formation of this IL yields significantly reduced barriers for hole and, particularly, electron injection from Ge into the insulator. Changing to a H-free process for HfO₂ and Al₂O₃ deposition suppresses the formation of the narrow-gap Ge oxide.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Dielectric reliability of stacked Al2O3–HfO2 MIS capacitors with cylinder type for improving DRAM data retention characteristics

Dielectric reliability in Al₂O₃(2–3.1nm)–HfO₂(3nm) stack capacitor with Metal–Insulator–Si(MIS) structure is investigated in this paper. We propose an optimized capacitor process through the Time–Dependent Dielectric Breakdown (TDDB) data under various process conditions. Furthermore, due to asymmetric current at both negative and positive voltage stress polarities, we show different lifetime extrapolation by a fluence–driven model. As a result, the maximum allowed operating voltage is projected to be 1.7V (failure rate 10ppm during 10year @ 85°C) for Data “0” retention lifetime.     

Initial leakage current related to extrinsic breakdown in HfO2/Al2O3 nanolaminate ALD dielectrics

Multiple successive breakdown events are reported for HfO₂/Al₂O₃ nanolaminate dielectrics grown by atomic-layer deposition. The first breakdown distribution is not a Weibull distribution and shows a long TBD tail at high failure percentiles. Analysis of the correlation between time-to-breakdown and initial current leakage allows identifying this tail with extrinsic breakdown. Screening of the data to eliminate the extrinsic tail demonstrates that the successive breakdown events are completely uncorrelated and perfectly match the successive breakdown theory. The statistical correlation between initial current and extrinsic breakdown distribution is explained in terms of variations of the unintentional interfacial SiO_x layer at the silicon substrate/dielectric interface.     

Comparative study of AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with Al2O3 and HfO2 gate oxide

AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with Al₂O₃ gate oxide which was deposited by atomic layer deposition (ALD) were fabricated and their performance was then compared with that of AlGaN/GaN MOSHFETs with HfO₂ gate oxide. The capacitance (C)-voltage (V) curve of the Al₂O₃/GaN MOS diodes showed a lower hysteresis and lower interface state density than the C-V curve of the HfO₂/GaN diodes, indicating better quality of the Al₂O₃/GaN interface. The saturation of drain current in the I_D-V_GS relation of the Al₂O₃ AlGaN/GaN MOSHFETs was not as pronounced as that of the HfO₂ AlGaN/GaN MOSHFETs. The gate leakage current of the Al₂O₃ MOSHFET was five to eight orders of magnitude smaller than that of the HfO₂ MOSHFETs.     

Electrical properties of metal–HfO2–silicon system measured from metal–insulator–semiconductor capacitors and metal–insulator–semiconductor field–effect transistors using HfO2 gate dielectric

Metal–insulator–semiconductor (MIS) capacitors and metal–insulator–semiconductor field effect transistors (MISFETs) incorporating HfO₂ gate dielectrics were fabricated using RF magnetron sputtering. In this work, the essential structures and electrical properties of HfO₂ thin film were examined. The leakage current measured from MIS capacitors depends on the sputtering gas mixture and the annealing temperature. The best condition to achieve the lowest leakage current is to perform the annealing at 500 °C with a mixture of 50% N₂ and 50% O₂ gas ratio. Aluminum is used as the top electrode. The Al/HfO₂ and the HfO₂/Si barrier heights extracted from Schottky emission are 1.02 eV and 0.94 eV, respectively. An Al/HfO₂/Si energy band diagram is proposed based on these results.     

Trap parameters and conduction mechanism in HfO2-Ta2O5 mixed stacks in response to microwave irradiation

The effect of microwave treatment at room temperature on the leakage current and mechanisms of conductivity in mixed HfO₂-Ta₂O₅ (10 nm) stacks has been studied by temperature dependent (20-100 °C) current-voltage characteristics. It was established that the short term irradiation (∼6 s) affects the electrically active centers in the mixed oxide, provokes modification of the dominant conduction mechanism at about and above 1 MV/cm and improves the temperature stability of capacitors manifesting as low level of current at high temperatures (current decrease up to two orders of magnitude at 100 °C after the treatment is detected). The traps involved in the conduction processes in pre- and post-irradiation capacitors are identified. The longer exposure (10-15 s) is effective in a significant reduction of leakage current (up to 3-4 orders of magnitude in wide range of applied voltages). The potential of microwave treatment at room temperature as technological step for improving the temperature stability of leakage current in high-k stacked capacitors is discussed.     

Electrical and structural characterization of PLD grown CeO2–HfO2 laminated high-k gate dielectrics

The electrical and physical properties of CeO₂–HfO₂ nanolaminates deposited by pulsed laser deposition (PLD) are investigated. The properties of the nanolaminates are compared with binary CeO₂ and HfO₂ thin films. Layers were deposited using CeO₂ and HfO₂ targets at substrate temperatures between 220 and 620 °C in 10 Pa Ar+H₂ or O₂. In situ post deposition anneal (PDA) was achieved by controlled cooling down to room temperature with . Nanolaminates starting with CeO₂ show lower EOT and leakage compared to layers starting with HfO₂. TEM and XRD analyses showed thickness-dependent crystallinity of the layers, varying from amorphous to highly oriented polycrystalline phase.C–V and I–V measurements were done on the capacitors. Lowest fixed-charge density was found for the nanolaminates deposited at 520 °C. The k values of the nanolaminates extracted by the EOT-physical thickness plots were found to be 141, 48 and 22, for deposition temperatures 420, 520 and 620 °C, respectively. Higher k value for lower deposition temperatures is explained by the thickness dependent morphology of the layers. An with was found for binary HfO₂ layer with 4 nm physical thickness. Lowest leakage current density was for a 4 nm laminate deposited at 420 °C and with a cooling rate of 2 °C/min during PDA.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60 nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO₂ and amorphous phase Al₂O₃ in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Å and a low leakage current density of 0.35 fA/cell, which meet leakage current criteria of 0.5 fA/cell for mass production. ZAZ TIT capacitor showed a smaller cap leak fail bit than HAH capacitor and stable leakage current up to 550 °C anneal. TDDB (time dependent dielectric breakdown) behavior reliably satisfied the 10-year lifetime criteria within operation voltage range.     

Ultrathin HfO2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO₂ gate dielectrics have been deposited on strain-compensated Si_0.69Ge_0.3C_0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO₂ gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO₂ with the same equivalent thickness.     

Improved retention characteristic of charge-trapped flash device with sealing layer/Al2O3 or Al2O3/high-k stacked blocking layers

Although programming and erase speeds of charge trapping (CT) flash memory device are improved by using Al₂O₃ as blocking layer, its retention characteristic is still a main issue. CT flash memory device with Al₂O₃/high-k stacked blocking layer is proposed in this work to enhance data retention. Moreover, programming and erase speeds are slightly improved. In addition, sealing layer (SL), which is formed by an advanced clustered horizontal furnace between charge trapping layer and Al₂O₃ as one of the blocking layers is also studied. The retention characteristic is enhanced by SL approach due to lower gate leakage current with less defect. With the combination of SL and Al₂O₃/high-k stacked blocking layer approaches, retention property can be further improved.     

Breakdown fields and conduction mechanisms in thin Ta2O5 layers on Si for high density DRAMs

The conduction mechanisms and the microstructure of rf sputtered Ta₂O₅ on Si, before and after oxygen annealing at high temperatures (873, 1123 K; 30 min) have been investigated. The as-deposited and annealed at 873 K layers are amorphous whereas crystalline Ta₂O₅ (orthorhombic β-Ta₂O₅ phase) was obtained after O₂ treatment at 1123 K. The results (electrical, X-ray diffraction, transmission electron microscopy) reveal the formation of an interfacial ultrathin SiO₂ layer under all technological regimes used. The higher (493 K) substrate temperature during deposition stimulates the formation of amorphous rather than crystalline SiO₂. It is found that the oxygen heating significantly reduces the oxide charge (Q_f<10¹⁰ cm⁻²) and improves the breakdown characteristics (the effect is more pronounced for the higher annealing temperature). It is accompanied by an increase of the effective dielectric constant (up to 37 after 1123 K treatment). It is established that the influence of the oxygen treatment on the leakage current is different depending on the film thickness, namely: a beneficial effect for the thinner and a deterioration of leakage characteristics for thicker (80 nm) films. A leakage current density as low as 10⁻⁷ A/cm² at 1 MV/cm applied field for 26 nm annealed layers has been obtained. The current reduction is considered to be due to a removal by annealing of certain structural nonperfections present in the initial layers. Generally, the results are discussed in terms of simultaneous action of two opposite and competing processes taking place at high temperatures––a real annealing of defects and an appearance of a crystal phase and/or a neutral traps generation. The contribution of the neutral traps also is involved to explain the observed weaker charge trapping in the as-fabricated films compared to the annealed ones.The conduction mechanism of the as-deposited films is found to be of Poole–Frenkel (PF) type for a wide range of applied fields. A change of the conduction mechanism for the annealed films at medium fields (0.8–1.3 MV/cm) is established. This transition from PF process to the Schottky emission limited current is explained with an annealing of bulk traps (oxygen vacancies and nonperfect bonds). It is concluded that the dominant conduction mechanism in the intermediate fields can be effectively controlled by appropriate technological steps.     

Modeling growth rate of HfO2 thin films grown by metal-organic molecular beam epitaxy

HfO₂ dielectric layers were grown on the p-type Si (100) substrate by metal-organic molecular beam epitaxy (MOMBE). Hafnium-tetra-butoxide, Hf(O·t-C₄H₉)₄ was used as a Hf precursor and Argon gas was used as a carrier gas. The thickness of the HfO₂ film and intermediate SiO₂ layer were measured by scanning electron microscopy (SEM) and high-resolution transmission electron microscopy (HRTEM). The properties of the HfO₂ layers were evaluated by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), high frequency (HF) capacitance-voltage (C-V) measurement, and current-voltage (I-V) measurement. C-V and I-V measurements have shown that HfO₂ layer grown by MOMBE has a high dielectric constant (k) of 20-22 and a low-level of leakage current density. The growth rate is affected by various process variables such as substrate temperature, bubbler temperature, Ar and O₂ gas flows and growth time. Since the ratio of O₂ and Ar gas flows are closely correlated, the effect of variations in O₂/Ar flow ratio on growth rate is also investigated using statistical modeling methodology.     

Thermal Ta2O5––alternative to SiO2 for storage capacitor application

Tantalum pentoxide thin layers (10–100 nm) obtained by thermal oxidation of rf sputtered Ta films on Si have been investigated with respect of their dielectric, structural and electric properties. It is established that stoichiometric Ta₂O₅ detected at the surface of the layers is reduced to tantalum suboxides in their depth. The oxide parameters are discussed in terms of a presence of an unavoidable ultrathin SiO₂ between Si and Ta₂O₅ and bond defects in both the oxide and the interface transition region. Conditions which guarantee obtaining high quality tantalum oxide with a dielectric constant of 32–35 and a leakage current less than 10⁻⁷–10⁻⁸ A/cm² at 1.5 V (SiO₂ equivalent thickness of 2.5–3 nm) are established. These specifications make the layers obtained suitable alternative to SiO₂ for high density DRAMs application.     

Organic thin film transistors with HfO2 high-k gate dielectric grown by anodic oxidation or deposited by sol–gel

We report here on pentacene based organic field effect transistors (OFETs) with a high-k HfO₂ gate oxide. HfO₂ layers were prepared by two different methods: anodic oxidation and sol–gel. A comparison of the two processes on the electrical properties of OFETs is given. Ultra thin nanoporous (20 nm) sol–gel deposited oxide films were obtained following an annealing at 450 °C. They lead to high mobility and stable devices (μ = 0.12 cm²/V s). On the other hand, devices with anodic HfO₂ revealed a little bit more leaky and show some hysteresis. Anodization, however, presents the advantage of being a fully room temperature process, compatible with plastic substrates. Stability and response to a bias stress are also reported.     

Breakdown characteristics of nFETs in inversion with metal/HfO2 gate stacks

Time zero and time dependent dielectric breakdown (TZBD and TDDB) characteristics of atomic layer deposited (ALD) TiN/HfO₂ high-κ gate stacks are studied by applying ramped and constant voltage stress (RVS and CVS), respectively, on the n-channel MOS devices under inversion conditions. For the gate stacks with thin high-κ layers (?3.3 nm), breakdown (BD) voltage during RVS is controlled by the critical electric field in the interfacial layer (IL), while in the case of thicker high-κ stacks, BD voltage is defined by the critical field in the high-κ layer. Under low gate bias CVS, one can observe different regimes of the gate leakage time evolution starting with the gate leakage current reduction due to electron trapping in the bulk of the dielectric to soft BD and eventually hard BD. The duration of each regime, however, depends on the IL and high-κ layer thicknesses. The observed strong correlation between the stress-induced leakage current (SILC) and frequency-dependent charge pumping (CP) measurements for the gate stacks with various high-κ thicknesses indicates that the degradation of the IL triggers the breakdown of the entire gate stack. Weibull plots of time-to-breakdown (T_BD) suggest that the quality of the IL strongly affects the TDDB characteristics of the Hf-based high-κ gate stacks.