Temperature and substrate-impedance dependence of noise figure of monolithic RF inductors on silicon

In this letter, we analyze the effects of temperature (from -50/spl deg/C to 200/spl deg/C) and substrate impedance on the noise figure (NF) and quality factor (Q-factor) performances of monolithic RF inductors on silicon. The results show a 0.75 dB (from 0.98 to 0.23 dB) reduction in minimum NF (NF/sub min/) at 8 GHz, an 86.1% (from 15.1 to 28.1) increase in maximum Q-factor (Q/sub max/), and a 4.8% (from 16.5 to 17.3 GHz) improvement in self-resonant frequency (f/sub SR/) were obtained if post-process of proton implantation had been done. This means the post-process of proton implantation is effective in improving the NF and Q-factor performances of inductors on silicon mainly due to the reduction of eddy current loss in the silicon substrate. In addition, it was found that NF increases with increasing temperature but show a reverse behavior within a higher frequency range. This phenomenon can be explained by the positive temperature coefficients of the series metal resistance (R/sub s/), the parallel substrate resistances (R/sub sub1/ and R/sub sub2/), and the resistance R/sub s1/ of the substrate transformer loop. The present analyzes are helpful for RF designers to design less temperature-sensitive high-performance fully on-chip low-noise-amplifiers (LNAs) and voltage-controlled-oscillators (VCOs) for single-chip receiver front-end applications.     

A high quality factor and low power loss micromachined RF bifilar transformer for UWB RFIC applications

In this letter, the authors demonstrate that high quality factor and low power loss transformers can be obtained by using the CMOS process-compatible backside inductively coupled plasma (ICP) deep-trench technology to selectively remove the silicon underneath the transformers. A 62.4% (from 8.99 to 14.6) and a 205.8% (from 8.6 to 26.3) increase in the Q-factor, a 10.3% (from 0.697 to 0.769) and a 30.2% (from 0.652 to 0.849) increase in the maximum available power gain (G/sub Amax/), and a 0.43- (from 1.57 to 1.14 dB) and a 1.15-dB (from 1.86 to 0.71 dB) reduction in the minimum noise figure (NF/sub min/) were achieved at 5.2 and 10 GHz, respectively, for a bifilar transformer with overall dimension of 240/spl times/240 /spl mu/m/sup 2/ after the backside ICP etching. The values of G/sub Amax/ of 0.769 and 0.849 are both state-of-the-art results among all reported on-chip bifilar transformers. These results indicate that the backside ICP deep-trench technology is very promising for high-performance radio frequency integrated circuit applications.     

An ultralow-loss and broadband micromachined RF inductor for RFIC input-matching applications

In this brief, we demonstrate that ultralow-loss and broadband inductors can be obtained by using the CMOS process compatible backside inductively coupled-plasma (ICP) deep-trench technology to selectively remove the silicon underneath the inductors. The results show that a 378.5% increase in maximum Q-factor (Q/sub max/) (from 10.7 at 4.7 GHz to 51.2 at 14.9 GHz), a 22.1% increase in self-resonant frequency (f/sub SR/) (from 16.5 to 20.15 GHz), a 16.3% increase (from 0.86 to 0.9999) in maximum available power gain (G/sub Amax/) at 5 GHz, and a 0.654-dB reduction (from 0.654 dB to 4.08/spl times/10/sup -4/ dB) in minimum noise figure (NF/sub min/) at 5 GHz were achieved for a 2-nH inductor after the backside ICP dry etching. In addition, state-of-the-art ultralow-loss G/sub Amax//spl les/0.99 (i.e., NF/sub min//spl les/0.045 dB) for frequencies lower than 12.5 GHz was achieved for this 2-nH inductor after the backside inductively coupled-plasma dry etching. This means this on-chip inductor-on-air can be used to realize an ultralow-noise 3.1-10.6 GHz ultrawide-band RFIC. These results show that the CMOS process compatible backside ICP etching technique is very promising for system-on-a-chip applications.     

DC, RF, and microwave noise performances of AlGaN/GaN HEMTs on sapphire substrates

High-performance AlGaN/GaN high electron-mobility transistors with 0.18-/spl mu/m gate length have been fabricated on a sapphire substrate. The devices exhibited an extrinsic transconductance of 212 mS/mm, a unity current gain cutoff frequency (f/sub T/) of 101 GHz, and a maximum oscillation frequency (f/sub MAX/) of 140 GHz. At V/sub ds/=4 V and I/sub ds/=39.4 mA/mm, the devices exhibited a minimum noise figure (NF/sub min/) of 0.48 dB and an associated gain (Ga) of 11.16 dB at 12 GHz. Also, at a fixed drain bias of 4 V with the drain current swept, the lowest NFmin of 0.48 dB at 12 GHz was obtained at I/sub ds/=40 mA/mm, and a peak G/sub a/ of 11.71 dB at 12 GHz was obtained at I/sub ds/=60 mA/mm. With the drain current held at 40 mA/mm and drain bias swept, the NF/sub min/,, increased almost linearly with the increase of drain bias. Meanwhile, the Ga values decreased linearly with the increase of drain bias. At a fixed bias condition (V/sub ds/=4 V and I/sub ds/=40 mA/mm), the NF/sub min/ values at 12 GHz increased from 0.32 dB at -55/spl deg/C to 2.78 dB at 200/spl deg/C. To our knowledge, these data represent the highest f/sub T/ and f/sub MAX/, and the best microwave noise performance of any GaN-based FETs on sapphire substrates ever reported.     

Very low noise RF nMOSFETs on plastic by substrate thinning and wafer transfer

A very low minimum noise figure (NF/sub min/) of 1.2 dB and a high associated gain of 12.8 dB at 10 GHz were measured for six-finger, 0.18-/spl mu/m radio frequency (RF) metal-oxide semiconductor field-effect transistors mounted on insulating plastic following substrate-thinning (/spl sim/30 /spl mu/m) and wafer transfer. Before this process, the devices had a slightly better RF performance of 1.1-dB NF/sub min/ and a 13.7-dB associated gain. The small RF performance degradation of the active transistors transferred to plastic shows the potential of integrating electronics onto plastic.     

Low noise RF MOSFETs on flexible plastic substrates

We report a low minimum noise figure (NF/sub min/) of 1.1 dB and high associated gain (12 dB at 10 GHz) for 16 gate-finger 0.18-/spl mu/m RF MOSFETs, after thinning down the Si substrate to 30 /spl mu/m and mounting it on plastic. The device performance was improved by flexing the substrate to create stress, which produced a 25% enhancement of the saturation drain current and lowered NF/sub min/ to 0.92 dB at 10 GHz. These excellent results for mechanically strained RF MOSFETs on plastic compare well with 0.13-/spl mu/m node (L/sub g/=80 nm) devices.     

Microwave noise characteristics of AlGaN/GaN HEMTs on SiC substrates for broad-band low-noise amplifiers

This letter reports high-performance passivated AlGaN/GaN high electron-mobility transistors (HEMTs) with 0.25-/spl mu/m gate-length for low noise applications. The devices exhibited a minimum noise figure (NF/sub min/) of 0.98 dB and an associated gain (G/sub a/) of 8.97 dB at 18 GHz. The noise resistance (R/sub n/), the measure of noise sensitivity to source mismatch, is 31/spl Omega/ at 18 GHz, which is relatively low and suitable for broad-band low noise amplifiers. The noise modeling analysis shows that the minimum noise figure of the GaN HEMT can be reduced further by reducing noise contributions from parasitics. These results demonstrate the viability of AlGaN/GaN HEMTs for low-noise as well as high power amplifiers.     

Electrical-stress effects and device modeling of 0.18-/spl mu/m RF MOSFETs

In this paper, a novel microstrip-line layout is used to make accurate measurements of the minimum noise figure (NF/sub min/) of RF MOSFETs. A low NF/sub min/ of 1.05 dB at 10 GHz was directly measured for 16-finger 0.18-/spl mu/m MOSFETs, without de-embedding. Using an analytical expression for NF/sub min/, we have developed a self-consistent dc current-voltage, S-parameter, and NF/sub min/ model, where the simulated results match the measured device characteristics well, both before and after electrical stress.     

A new lossy substrate de-embedding method for sub-100 nm RF CMOS noise extraction and modeling

A new equivalent circuit method is proposed in this paper to de-embed the lossy substrate and lossy pads' parasitics from the measured RF noise of multifinger MOSFETs with aggressive gate length scaling down to 80 nm. A new RLC network model is subsequently developed to simulate the lossy substrate and lossy pad effect. Good agreement has been realized between the measurement and simulation in terms of S-parameters and four noise parameters, NF/sub min/ (minimum noise figure), R/sub n/ (noise resistance), Re(Y/sub sopt/), and Im(Y/sub sopt/) for the sub-100-nm RF nMOS devices. The intrinsic NF/sub min/ extracted by the new de-embedding method reveal that NF/sub min/ at 10 GHz can be suppressed to below 0.8 dB for the 80-nm nMOS attributed to the advancement of f/sub T/ to 100-GHz level and the effectively reduced gate resistance by multifinger structure.     

Broadband microwave noise characteristics of high-linearity composite-channel Al/sub 0.3/Ga/sub 0.7/N/Al/sub 0.05/Ga/sub 0.95/N/GaN HEMTs

We report broadband microwave noise characteristics of a high-linearity composite-channel HEMT (CC-HEMT). Owing to the novel composite-channel design, the CC-HEMT exhibits high gain and high linearity such as an output third-order intercept point (OIP3) of 33.2 dBm at 2 GHz. The CC-HEMT also exhibits excellent microwave noise performance. For 1-/spl mu/m gate-length devices, a minimum noise figure (NF/sub min/) of 0.7 dB and an associated gain (G/sub a/) of 19 dB were observed at 1 GHz, and an (NF/sub mi/) of 3.3 dB and a G/sub a/ of 10.8 dB were observed at 10 GHz. The dependence of the noise characteristics on the physical design parameters, such as the gate-source and gate-drain spacing, is also presented.     

S-band operation of SiC power MESFET with 20 W (4.4 W/mm) output power and 60% PAE

Previous efforts have revealed instabilities in standard SiC MESFET device electrical characteristics, which have been attributed to charged surface states. This work describes the use of an undoped "spacer" layer on top of a SiC MESFET to form a "buried-channel" structure where the active current carrying channel is removed from the surface. By using this approach, the induced surface traps are physically removed from the channel region, such that the depletion depth caused by the unneutralized surface states cannot reach the conductive channel. This results in minimal RF dispersion ("gate lag") and, thus, improved RF performance. Furthermore, the buried-channel approach provides for a relatively broad and uniform transconductance (G/sub m/) with gate bias (V/sub gs/), resulting in higher efficiency MESFETs with improved linearity and lower signal distortion. SiC MESFETs having 4.8-mm gate periphery were fabricated using this buried-channel structure and were measured to have an output power of 21 W (P/sub out//spl sim/4.4 W/mm), 62% power added efficiency, and 10.6 dB power gain at 3 GHz under pulse operation. When operated at continuous wave, similar 4.8-mm gate periphery SiC MESFETs produced 9.2 W output power (P/sub out//spl sim/2 W/mm), 40% PAE, and /spl sim/7 dB associated gain at 3 GHz.     

Low-voltage high performance compact all cascode CMOS current mirror

A high performance and compact current mirror with extremely low input and high output resistances (R/sub in//spl sim/0.01/spl Omega/, R/sub out//spl sim/10 G/spl Omega/), high copying accuracy, very low input and output voltage requirements (V/sub in/, V/sub out//spl ges/V/sub DSsat/), high bandwidth (200 MHz using a 0.5 /spl mu/m CMOS technology) and low settling time (25 ns) is proposed. Simulations and experimental results are shown that validate the circuit.     

Microwave noise performance of AlGaN-GaN HEMTs with small DC power dissipation

We report low microwave noise performance of discrete AlGaN-GaN HEMTs at DC power dissipation comparable to that of GaAs-based low-noise FETs. At 1-V source-drain (SD) bias and DC power dissipation of 97 mW/mm, minimum noise figures (NF/sub min/) of 0.75 dB at 10 GHz and 1.5 dB at 20 GHz were achieved, respectively. A device breakdown voltage of 40 V was observed. Both the low microwave noise performance at small DC power level and high breakdown voltage was obtained with a shorter SD spacing of 1.5 /spl mu/m in 0.15-/spl mu/m gate length GaN HEMTs. By comparison, NF/sub min/ with 2 /spl mu/m SD spacing was 0.2 dB greater at 10 GHz.     

RF noise in 0.18-/spl mu/m and 0.13-/spl mu/m MOSFETs

Studied the gate finger number and gate length dependence on minimum noise figure (NF/sub min/) in deep submicrometer MOSFETs. A lowest NF/sub min/ of 0.93 dB is measured in 0.18-/spl mu/m MOSFET at 5.8 GHz as increasing finger number to 50 fingers, but increases abnormally when above 50. The scaling gate length to 0.13 /spl mu/m shows larger NFmin than the 0.18-/spl mu/m case at the same finger number. From the analysis of a well-calibrated device model, the abnormal finger number dependence is due to the combined effect of reducing gate resistance and increasing substrate loss as increasing finger number. The scaling to 0.13-/spl mu/m MOSFET gives higher NF/sub min/ due to the higher gate resistance and a modified T-gate structure proposed to optimize the NF/sub min/ for further scaling down of the MOSFET.     

Impact of poly-gate depletion on MOS RF linearity

The distortion behavior for thin oxide MOS transistors can be degraded due to polysilicon-gate depletion effects. The nonlinear, bias-dependent gate capacitance for thin oxide MOSFET's results in significant 2nd-order derivatives in gate capacitance, (/spl part//sup 2/C(V/sub gs/)//spl part/V/sub gs//sup 2/), which in turn results in substantial 3rd-order derivative contributions to drain current, (/spl part//sup 3/I/sub ds///spl part/V/sub gs//sup 3/). This may restrict the use of very-thin oxide MOSFET's in RF applications.     

On the feasibility of CMOS multiband phase shifters for multiple-antenna transmitters

We present the design of an integrated multiband phase shifter in RF CMOS technology for phased array transmitters. The phase shifter has an embedded classical distributed amplifier for loss compensation. The phase shifter achieves a more than 180/spl deg/ phase tuning range in a 2.4-GHz band and a measured more than 360/spl deg/ phase tuning range in both 3.5-GHz and 5.8-GHz bands. The return loss is less than -10dB at all conditions. The feasibility for transmitter applications is verified through measurements. The output power at a 1-dB compression point (P/sub 1 dB/) is as high as 0.4dBmat 2.4GHz. The relative phase deviation around P/sub 1 dB/ is less than 3/spl deg/. The design is implemented in 0.18-/spl mu/mRF CMOS technology, and the chip size is 1200/spl mu/m /spl times/ 2300 /spl mu/m including pads.     

Design and fabrication of temperature-insensitive InGaP-InGaAlP resonant-cavity light-emitting diodes

Visible InGaP-InGaAlP resonant-cavity light-emitting diodes with low-temperature sensitivity output characteristics were demonstrated. By means of widening the resonant cavity to a thickness of three wavelength (3/spl lambda/), the degree of power variation between 25 /spl deg/C and 95 /spl deg/C for the devices biased at 20 mA was apparently reduced from -2.1 dB for the standard structure design (1-/spl lambda/ cavity) to -0.6 dB. An output power of 2.4 mW was achieved at 70 mA. The external quantum efficiency achieved a maximum of 3% at 13 mA and dropped slowly with increased current for the device. The external quantum efficiency at 20mA dropped only 14% with elevated temperature from 25 /spl deg/C to 95/spl deg/C. The current dependent far-field patterns also showed that the emission always took place perfectly in the normal direction, which was suitable for plastic fiber data transmission.     

Effects of spacer thickness on noise performance of bipolar transistors

The effects of spacer thickness on noise performance of a bipolar junction transistor with different emitter widths and operation frequencies are examined. The minimum noise figure (NF/sub min/) derived from the Y-parameters as well as the base (r/sub B/) and emitter resistance (r/sub E/) obtained from the device simulation is used as a measure of noise characteristics. Furthermore, the noise resistance (R/sub n/), optimum source admittance (Y/sub sop/), and the associated gain (G/sub A,assc/) are also given in this brief. To achieve the minimum value of NF/sub min/, the spacer thickness should be targeted to an optimal value, and its value is frequency and geometry dependent.     

Distributed MEMS analog phase shifter with enhanced tuning

The design, fabrication, and measurement of a tunable microwave phase shifter is described. The phase shifter combines two techniques: a distributed capacitance transmission line phase shifter, and a large tuning range radio frequency (RF) microelectromechanical system (MEMS) capacitor. The resulting device is a large bandwidth, continuously tunable, low-loss phase shifter, with state-of-the-art performance. Measurements indicate analog tuning of 170/spl deg/ phase shift per dB loss is possible at 40 GHz, with a 538/spl deg/ phase shift per centimeter. The structure is realized with high-Q MEMS varactors, capable of tuning C/sub max//C/sub min/= 3.4. To our knowledge, this presents the lowest loss analog millimeter wave phase shifter performance to date.     

Compression mappings on primitive sequences over Z/(p/sup e/)

Let Z/(p/sup e/) be the integer residue ring with odd prime p/spl ges/5 and integer e/spl ges/2. For a sequence a_ over Z/(p/sup e/), there is a unique p-adic expansion a_=a_/sub 0/+a_/spl middot/p+...+a_/sub e-1//spl middot/p/sup e-1/, where each a_/sub i/ is a sequence over {0,1,...,p-1}, and can be regarded as a sequence over the finite field GF(p) naturally. Let f(x) be a primitive polynomial over Z/(p/sup e/), and G'(f(x),p/sup e/) the set of all primitive sequences generated by f(x) over Z/(p/sup e/). Set /spl phi//sub e-1/ (x/sub 0/,...,x/sub e-1/) = x/sub e-1//sup k/ + /spl eta//sub e-2,1/(x/sub 0/, x/sub 1/,...,x/sub e-2/) /spl psi//sub e-1/(x/sub 0/,...,x/sub e-1/) = x/sub e-1//sup k/ + /spl eta//sub e-2,2/(x/sub 0/,x/sub 1/,...,x/sub e-2/) where /spl eta//sub e-2,1/ and /spl eta//sub e-2,2/ are arbitrary functions of e-1 variables over GF(p) and 2/spl les/k/spl les/p-1. Then the compression mapping /spl phi//sub e-1/:{G'(f(x),p/sup e/) /spl rarr/ GF(p)/sup /spl infin// a_ /spl rarr/ /spl phi//sub e-1/(a_/sub 0/,...,a_/sub e-1/) is injective, that is, a_ = b_ if and only if /spl phi//sub e-1/(a_/sub 0/,...,a_/sub e-1/) = /spl phi//sub e-1/(b_/sub 0/,...,b_/sub e-1/) for a_,b_ /spl isin/ G'(f(x),p/sup e/). Furthermore, if f(x) is a strongly primitive polynomial over Z/(p/sup e/), then /spl phi//sub e-1/(a_/sub 0/,...,a_/sub e-1/) = /spl psi//sub e-1/(b_/sub 0/,...,b_/sub e-1/) if and only if a_ = b_ and /spl phi//sub e-1/(x/sub 0/,...,x/sub e-1/) = /spl psi//sub e-1/(x/sub 0/,...,x/sub e-1/) for a_,b_ /spl isin/ G'(f(x),p/sup e/).