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1.
A model predicting the behavior of various parameters, such as 2DEG sheet charge density and threshold voltage, with the variation of barrier thickness and oxide thickness considering interface density of states is presented. The mathematical dependence of these parameters is derived in conjunction with the interface density of states. The dependence of sheet charge density with the barrier thickness and with the oxide thickness is plotted and an insight into the barrier scaling properties of AlInN based MOSHEMTs is presented. The threshold voltage is also plotted with respect to barrier thickness and oxide thickness, which reveals the possibility of the enhancement mode operation of the device at low values of the interface DOS. The results are in good agreement with the fabricated device available in the literature.  相似文献   

2.
Planar two-electrode nonlinear elements using carbon nanotubes doped with platinum metals are created and investigated. Among the nanotubes, branched ones are found. If doped, these nanotubes take a regular form. With appropriate doping, limiting currents above 1 A are achieved. However, the problem of contact between carbon nanotubes and electrodes has yet to be solved.  相似文献   

3.
We performed numerical analysis of the current–voltage characteristics of long-wavelength infrared unipolar HgCdTe nBn photodetectors and compared those results with those of conventional p-on-n HgCdTe photodiodes. A computer program was applied to explain in detail the impact of the charge carrier generation and recombination processes on current densities. In our model the carrier diffusion, thermal generation–recombination, band-to-band tunneling, trap-assisted tunneling (via states located at mercury vacancies as well as dislocation cores), and impact ionization are included as potential limiting mechanisms. To validate the model, we compared the theoretical predictions with experimental data of high-quality p-on-n photodiodes published in the literature.  相似文献   

4.
Journal of Communications Technology and Electronics - UV visible-blind and solar-blind 320 × 256 photodiode arrays based on AlxGa1 – xN heteroepitaxial structures (AlGaN HES) and...  相似文献   

5.
6.
Semakova  A. A.  Bazhenov  N. L.  Mynbaev  K. D.  Chernyaev  A. V.  Kizhaev  S. S.  Stoyanov  N. D. 《Semiconductors》2021,55(6):557-561
Semiconductors - The results of a study in the temperature range 4.2–300 K of the current–voltage characteristics of light emitting diode (LED) heterostructures with an active region...  相似文献   

7.
A decrease in the residual pressure to 10–6 Pa during the deposition of bismuth films results in low-temperature metallic conductance of the films. Cross-shaped microstructures made of these films exhibit the property of ballistic transport, which is typical of two-dimensional systems. This property shows up as a bend of the current–voltage characteristics (CVCs). The value of bend resistance changes in inverse proportion to the width of interconnects and drops with increasing temperature in the range of 4.2–77 K. The free path of conduction electrons, are responsible for the CVC bend, was estimated at more than 1 m.  相似文献   

8.
The capacitance–voltage–temperature (CVT) and the conductance/angular frequency–voltage–temperature (G/ω–VT) characteristics of Au/TiO2(rutile)/n-Si Schottky barrier diodes (SBDs) were investigated over the temperature range from 200 K to 380 K by considering the series resistance effect. Titanium dioxide (TiO2) was deposited on n-type silicon (Si) substrate using a direct-current (DC) magnetron sputtering system at 200°C. To improve the crystal quality, the deposited film was annealed at 900°C to promote a phase transition from the amorphous to rutile phase. The C ?2 versus V plots gave a straight line in the reverse-bias region. The main electrical parameters, such as the doping concentration (N D), Fermi energy level (E F), depletion layer width (W D), barrier height (ф CV), and series resistance (R S), of Au/TiO2(rutile)/n-Si SBDs were calculated from the CVT and the G/ω–VT characteristics. The obtained results show that ф CV, R S, and W D values decrease, while E F and N D values increase, with increasing temperature.  相似文献   

9.
The manifestations of ion traps, ion neutralization, and minority carrier generation at the insulator/semiconductor interface (hereafter, interface for brevity) in MIS structures are judged from isothermal dependences of ion depolarization current J and high-frequency capacitance C s of the depletion layer in the semiconductor on gate potential V g and the rate of potential change v = dV g/dt = const. In the general case, even for a single type of mobile ions in the insulator, the dynamic current–voltage characteristics (CVCs) may exhibit three current peaks. The transfer of some nonlocalized (free) ions at the interface through the insulator, depletion of ion traps, and decomposition of neutral ion–electron associates are responsible for the peaks. The sequence and number (down to one) of the peaks depend on the activation energies of the associated processes, value of v, and energy of activation of minority carrier generation. Depending on these parameters, the peaks may appear, disappear, or merge into a broad peak, which may erroneously be identified as a result of the depletion of ion traps that have an energy spectrum. In other words, the CVC with a single peak does not necessarily mean that there exist several types of mobile ions. From the J, C s = f(T, V g, n 0, v) families, one can discriminate between purely ionic and electronic phenomena and identify free, neutralized, and/or trapped ions present at the interface (here, T is the temperature and n 0 is the initial total surface concentration of particles (ions) and neutral associates at the interface).  相似文献   

10.
Ziane  A.  Amrani  M.  Rabehi  A.  Douara  A.  Mostefaoui  M.  Necaibia  A.  Sahouane  N.  Dabou  R.  Bouraiou  A. 《Semiconductors》2021,55(1):51-55
Semiconductors - A nitride GaAs Schottky diode have been fabricated by nitridation of GaAs substrates with thickness 0.7 nm of GaN layer. The capacitance–voltage C(V) and...  相似文献   

11.
A 2D analytical electrostatics analysis for the cross-section of a FinFET (or tri-gate MOSFET) is performed to calculate the threshold voltage.The analysis results in a modified gate capacitance with a coefficient H introduced to model the effect of trigates and its asymptotic behavior in 2D is that for double-gate MOSFET.The potential profile obtained analytically at the cross-section agrees well with numerical simulations.A compact threshold voltage model for FinFET,comprising quantum mechanical effects,is then proposed.It is concluded that both gate capacitance and threshold voltage will increase with a decreased height,or a decreased gate-oxide thickness of the top gate,which is a trend in FinFET design.  相似文献   

12.
陈祖辉  揭斌斌  薩支唐 《半导体学报》2010,31(12):121001-10
Impurity deionization on the direct-current current–voltage characteristics from electron–hole recombination (R-DCIV) at SiO2/Si interface traps in MOS transistors is analyzed using the steady-state Shockley-Read-Hall recombination kinetics and the Fermi distributions for electrons and holes. Insignificant distortion is observed over 90% of the bell-shaped R-DCIV curves centered at their peaks when impurity deionization is excluded in the theory. This is due to negligible impurity deionization because of the much lower electron and hole concentrations at the interface than the impurity concentration in the 90% range.  相似文献   

13.
On-State Breakdown Model for High Voltage RESURF LDMOS   总被引:5,自引:3,他引:2  
An analytical breakdown model under on-state condition for high voltage RESURF LDMOS is proposed.The model considers the drift velocity saturation of carriers and influence of parasitic bipolar transistor.As a result,electric field profile of n-drift in LDMOS at on-state is obtained.Based on this model,the electric SOA of LDMOS can be determined.The analytical results partially fit to our numerical (by MEDICI) and experiment results.This model is an aid to understand the device physics during on-state accurately and it also directs high voltage LDMOS design.  相似文献   

14.
Atomic layer deposition (ALD) of Al2O3 on Ga-face GaN is studied with respect to the effects of growth saturation, precursor injection sequence, and H2O pretreatment. A metal–oxide–semiconductor capacitor (MOSCAP) structure is fabricated to measure the capacitance–voltage (CV) characteristics. The origin of CV hysteresis is explained by a model considering the different trapping behaviors of interface states and oxide border traps. The interface state density (D it) is extracted as a function of band bending using an ultraviolet (UV)-assisted method. It is found that H2O pretreatment followed by saturated ALD growth produces the best interface quality, with a reduced D it compared with growth without H2O pretreatment.  相似文献   

15.
Abstract: The current measuring principle, the hardware structure and the software functions of a high voltage breaker current monitoring and fault diagnosis system are introduced. A simple algorithm for calculating the current effective value is given. The cut - off characteristics of the breaker are classified. This system can provide a foundation for reasonably determining the breaker service period.  相似文献   

16.
美国加利福尼亚大学研制成新型异质结Al GaN/AlN/GaNHEMT。对于通常的HEMT在高的电荷密度下 ,插入极薄的AIN界面层 (~ 1nm )保持高迁移率 ,提高有效△Ec和降低合金散射。基于这种结构的器件具有优良的Dc和RF性能。在VGS为 2V下 ,高的峰值电流为 1A/mm ,在 8GHz下 ,功率附加效率为 2 8%时的输出功率密度为8 4W /mm。AlGaN/AlN/GaN大功率微波HEMT@一凡  相似文献   

17.
In this article, a voltage equaliser is proposed for a battery string with four Li–Fe batteries. The proposed voltage equaliser is developed from a flyback converter, which comprises a transformer, a power electronic switch and a resonant clamped circuit. The transformer contains a primary winding and four secondary windings with the same number of turns connected to each battery. The resonant clamped circuit is for recycling the energy of leakage inductance of the transformer and for performing zero-voltage switching (ZVS) of the power electronic switch. When the power electronic switch is switched on, the energy is stored in the transformer; and when the power electronic switch is switched off, the energy stored in the transformer will automatically charge the battery whose voltage is the lowest. In this way, the voltage of individual batteries in the battery string is balanced. The salient features of the proposed voltage equaliser are that only one switch is used, the energy stored in the leakage inductance of the transformer can be recycled and ZVS is obtained. A prototype is developed and tested to verify the performance of the proposed voltage equaliser. The experimental results show that the proposed voltage equaliser achieves the expected performance.  相似文献   

18.
提出了一种新的全耗尽SOI MOSFETs阈值电压二维解析模型.通过求解二维泊松方程得到器件有源层的二维电势分布函数,氧化层-硅界面处的电势最小值用于监测SOI MOSFETs的阈值电压.通过对不同栅长、栅氧厚度、硅膜厚度和沟道掺杂浓度的SOI MOSFETs的MEDICI模拟结果的比较,验证了该模型,并取得了很好的一致性.  相似文献   

19.
The measurement theorem of fiber optically driven instrument for high-voltage line current is presented.The PLL voltage-frequency-narrow pulse principle and its micro-consuption mechanism are proposed.followed by anayssis on the two main factors affecting PLL measurement precision.A software desighn scheme using 80C196KB mciro-controller is introduced.The experiment results is satisfactory.  相似文献   

20.
Kınacı  B.  Çelik  E.  Çokduygulular  E.  Çetinkaya  Ç.  Yalçın  Y.  Efkere  H. İ.  Özen  Y.  Sönmez  N. A.  Özçelik  S. 《Semiconductors》2021,55(1):28-36
Semiconductors - In this study, we investigated the Cu-doped ZnO (CZO) structure. This structure was deposited on the Si and glass substrates using the RF magnetron sputtering technique....  相似文献   

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