A W-band monolithic downconverter

The design, fabrication, and evaluation of a fully integrated W-band monolithic downconverter based on InGaAs pseudomorphic HEMT technology are presented. The monolithic downconverter consists of a two-stage low-noise amplifier and a single-balanced mixer. The single-balanced mixer has been designed using the HEMT gate Schottky diodes inherent to the process. Measured results of the complete downconverter show conversion gain of 5.5 dB and a double-sideband noise figure of 6.7 dB at 94 GHz. Also presented is the downconverter performance characterized over the -35°C to +65°C temperature range. The downconverter design was a first pass success and has a high circuit yield     

30GHz单片接收机

已经研制成功30GHz接收机用的几种单片集成电路.低噪声放大器芯片在14dB增益时噪声系数为7.dB,中频放大器在30dB控制范围内,增益为13dB.混频器和移相器变频损耗和插入损耗分别为10.5dB和1.6dB.     

K-band 3-D MMIC low noise amplifier and mixer using TFMS lines with ground slit

Three-dimensional (3-D) microwave monolithic integrated circuit (MMIC) technology, that incorporates slits in the ground metal, was applied to K-band low noise amplifier (LNA) and I/Q mixer to provide a low cost solution for various K-band receivers such as for P-to-P radio, WLAN, and UWB sensors. The LNA incorporates a quasicoplanar stub in the input-matching network, improving the noise figure by 1 dB. This low-noise amplifier (LNA) exhibits a noise figure of 2.5 dB with an associated gain of 16 dB and an area of 0.75/spl times/0.65 mm/sup 2/. The I/Q resistive mixer incorporates a broadside 3-dB coupler with a 22-/spl mu/m-wide slit in the ground metal beneath the coupled thin-film micro-strip (TFMS) lines (patent pending). The insertion loss of the 3 dB coupler is 0.75 dB. The I/Q mixer exhibits a conversion loss of less than 14 dB at 0.1-2.0GHz IF frequencies for 2-dBm local input power. These LNA and mixer potentially make it easier to integrate receiver functions in a die.     

10 GHz dual-conversion low-IF downconverter with microwave and analogue quadrature generators

A 10 GHz dual-conversion low-IF downconverter using 0.18-mum CMOS technology is demonstrated. The high-frequency quadrature RF and LO₁ signals are generated by broadside-coupled quadrature couplers while a two-section polyphase filter is utilised for the low-frequency LO₂ quadrature signal generation. As a result, the demonstrated downconverter achieves a conversion gain of 7 dB, IP_{1 dB} of -16 dBm, IIP₃ of -5 dBm and noise figure of 26 dB at a 1.8 V supply. The image-rejection ratio of the first/second image signal is 33/42 dB for IF frequency ranging from 10 to 60 MHz, respectively.     

Millimeter-wave-band amplifier and mixer MMICs using a broad-band45° power divider/combiner

This paper demonstrates millimeter-wave-band amplifier and mixer monolithic microwave integrated circuits (MMIC's) using a broad-band 45° power divider/combiner. At first, we propose a broad-band 45° power divider/combiner, which combines a Wilkinson divider/combiner, 45° delay line, and 90° short stub. A coupling loss of 4.0±0.2 dB and a return loss and an isolation of more than 19 dB with 45±1° phase difference was obtained from 17 to 22 GHz for the fabricated K-band MMIC 45° power divider/combiner. Next, a parallel amplifier using the broad-band 45° power divider/combiner, which can be used in a power-combining circuit configuration requiring no isolator, is shown. Comparing the transmitter intermodulation generated in the parallel amplifier using the broad-band 45° power divider/combiner and that generated in the one using the conventional type, the broad-band suppression effect was confirmed. Finally, an application of the broad-band 45° power divider/combiner to a single-sideband (SSB) subharmonically pumped (SHP) mixer requiring no IF switch is shown. In an RF frequency range from 22.89 to 26.39 GHz, the fabricated K-band MMIC mixer achieved (for up-conversion) the good results of more than -13-dB conversion gain and more than 24-dB image-rejection ratio. These contribute significantly to the miniaturization of millimeter-wave communication equipment     

A 31-GHz monolithic GaAs mixer/preamplifier circuit for receiver applications

The portion of a monolithic receiver containing integrated Schottky mixer diodes and MESFET'S with microstrip circuitry has been developed and tested at 31 GHz. This work is part of a program to establish the feasibility of monolithic receivers and transmitters at microwave and millimeter-wave frequencies. Receiver designs using high-cutoff frequency diodes in a mixer configuration followed by a MESFET amplifier are capable of operating from microwave through millimeter-wave frequencies. However, the fabrication of monolithic receiver designs requires the integration on the same wafer of devices with different material requirements. We have developed a compatible integration scheme which is fundamental to the fabrication of monolithic receivers at millimeter-wave frequencies. Fabrication and design considerations for the 31-GHz balanced mixer and IF preamplifier are described. Completed monolithic units typically exhibit a conversion gain of 4 dB from the signal frequency of 31 GHz to the IF frequency of 2 GHz. The associated noise figure is typically 11.5 dB.     

Ku波段GaAs单片接收机

报道了工作频率分别为10.7-11．6GHz和11．7－12．2GHzGaAs单片接收机的研制结果。接收机并包括四种电路，即低噪声效大器、介质稳频振荡器、混频器和中频放大器。电路均采用GaAs全离子注入平面工艺创作，并封装在金属管壳内测试．10．7－11．6GHz接收机的噪声系数达到3．5dB，增益大于35dB；11．7－12.2GHz接收机的噪声系数可达到4dB，增益大于31dB。     

（英）D波段InP基高增益、低噪声放大芯片的设计与实现

利用90-nm InAlAs/InGaAs/InP HEMT工艺设计实现了两款D波段（110~170 GHz）单片微波集成电路放大器。两款放大器均采用共源结构,布线选取微带线。基于器件A设计的三级放大器A在片测试结果表明：最大小信号增益为11.2 dB@140 GHz,3 dB带宽为16 GHz,芯片面积2.6×1.2 mm2。基于器件B设计的两级放大器B在片测试结果表明：最大小信号增益为15.8 dB@139 GHz,3dB带宽12 GHz,在130~150 GHz频带范围内增益大于10 dB,芯片面积1.7×0.8 mm2,带内最小噪声为4.4 dB、相关增益15 dB@141 GHz,平均噪声系数约为5.2 dB。放大器B具有高的单级增益、相对高的增益面积比以及较好的噪声系数。该放大器芯片的设计实现对于构建D波段接收前端具有借鉴意义。     

A single-chip GaAs MMIC image-rejection front-end for digitalEuropean cordless telecommunications

An active image-rejection filter is presented in this paper, which applies actively coupled passive resonators. The filter has very low noise and high insertion gain, which may eliminate the use of a low-noise amplifier (LNA) in front-end applications. The GaAs monolithic-microwave integrated-circuit (MMIC) chip area is 3.3 mm² . The filter has 12-dB insertion gain, 45-dB image rejection, 6.2-dB noise figure, and dissipates 4.3 mA from a 3-V supply. An MMIC mixer is also presented. The mixer applies two single-gate MESFETs on a 2.2-mm² GaAs substrate. The mixer has 2.5-dB conversion gain and better than 8-dB single-sideband (SSB) noise figure with a current dissipation of 3.5 mA applying a single 5-V supply. The mixer exhibits very good local oscillator (LO)/RF and LO/IF isolation of better than 30 and 17 dB, respectively, Finally, the entire front-end, including the LNA, image rejection filter, and mixer functions is realized on a 5.7-mm ² GaAs substrate. The front-end has a conversion gain of 15 dB and an image rejection of more than 53 dB with 0-dBm LO power. The SSB noise figure is better than 6.4 dB, The total power dissipation of the front-end is 33 mW. The MMIC's are applicable as a single-block LNA and image-rejection filter, mixer, and single-block front-end in digital European cordless telecommunications. With minor modifications, the MMIC's can be applied in other wireless communication systems working around 2 GHz, e.g., GSM-1800 and GSM-1900     

A low-current Ku-band GaAs monolithic image rejectiondown-converter

A single-chip image rejection downconverter has been designed, fabricated. and tested for broadcast satellite receivers operating in the 11.7- to 12.2-GHz range. The downconverter consists of an RF low-noise amplifier (LNA), a filter-type image rejection mixer (IRM), and an intermediate frequency amplifier (IFA). It receives 11.7- to 12.2-GHz RF signals and down converts to 1.0- to 1.5-GHz IF signals with an external local oscillator. Since the filter integrated on the downconverter produces an image rejection of more than 30 dB, the downconverter requires no off-chip circuits for the image rejection. A conversion gain of 37±1 dB and a noise figure of less than 3.5 dB have been achieved over the RF frequency range. The current dissipation is only 40 mA, and the chip size is 2.8 mm×2.8 mm×0.45 mm     

12-GHz-Band GaAs Dual-Gate MESFET Monolithic Mixers

12-GHz-band GaAs dual-gate MESFET monolithic mixers have been developed for use in direct broadcasting satellite receivers. In order to reduce chip size, a buffer amplifier has been connected directly after a mixer IF port, instead of employing an IF matching circuit. The mixer and the buffer were fabricated on separate chips, so that individual measurements could be achieved. Chip size is 0.96X 1.26 mm for the mixer and 0.96X0.60 mm for the buffer. A dual-gate FET for the mixer, as well as a single-gate FET for the buffer, has a closely spaced electrode structure. Gate length and width are 1 µm and 320 µm, respectively. The mixer with the buffer provides 2.9+-0.4-dB conversion gain with 12.3+-0.3dB SSB noise figure in the 11.7-12.2-GHz RF band. Local oscillator (LO) frequency is 10.8 GHz. A low-noise converter was constructed by connecting a monolithic preamplifier, an image rejection filter, and a monolithic IF amplifier to the mixer. The converter provides 46.8+-1.5-dB conversion gain with 2.8+-0.2-dB SSB noise figure in the same frequency band.     

A 30-GHz monolithic receiver

Several monolithic integrated circuits have been developed to make a 30-GHz receiver. The receiver components include a low-noise amplifier, an IF amplifier, a mixer, and a phase shifter. The LNA has a 7-dB noise figure with over 17 dB of associated gain. The IF amplifier has a 13-dB gain with a 30-dB control range. The mixer has a conversion loss of 10.5 dB. The phase shifter has a 180° phase shift control and a minimum insertion loss of 1.6 dB.     

GaAs Monolithic MIC's for Direct Broadcast Satellite Receivers

A 12-GHz low-noise amplifier (LNA), a 1-GHz IF amplifier (IFA), and an 11-GHz dielectric resonator oscillator (DRO) have been developed for DBS home receiver applications by using GaAs monolithic microwave integrated circuit (MMIC) technology. Each MMIC chip contains FET's as active elements and self-biasing source resistors and bypass capacitors for a single power supply operation. It also contairns dc-block and RF-bypass capacitors. The three-stage LNA exhibits a 3.4-dB noise figure and a 19.5-dB gain over 11.7-12.2 GHz. The negative-feedback-type three-stage IFA shows a 3.9-dB noise figure and a 23-dB gain over 0.5-1.5 GHz. The DRO gives 10.mW output power at 10.67 GHz, with a frequency stability of 1.5 MHz over a temperature range from -40-80°C. A direct broadcast satellite (DBS) receiver incorporating these MMIC's exhibits an overafl noise figure of /spl les/ 4.0 dB for frequencies from 11.7-12.2 GHz.     

A 1.9-GHz silicon receiver with monolithic image filtering

A 1.9-GHz fully monolithic silicon superheterodyne receiver front-end is presented; it consists of a low noise amplifier (LNA), a tunable image reject filter, and a Gilbert cell mixer integrated in one die. The receiver was designed to operate with a 1.9-GHz RF and a 2.2-GHz local oscillator (LO) for a 300-MHz IF. Two chip versions were fabricated on two different fabrication runs using a 0.5-μm bipolar technology with 25 GHz transit frequency (f_T). Measured performance for the receiver front-end version 1, packaged and without input matching, was: conversion gain 33.5 dB, noise figure 4.9 dB, input IP3 -28 dBm, image rejection 53 dB (tuned to reject a 2.5-GHz image frequency), and 15.9 mA current consumption at +3 V. The image rejection was tunable from 2.4-2.63 GHz by means of an on-chip varactor. Version 2 had increased mixer degeneration for improved linearity. Its measured performance for the packaged receiver with its input matched to 50 Ω was: conversion gain 24 dB, noise figure 4.8 dB, input IP3 -19 dBm, and 65 dB image rejection for a 2.5-GHz image with an image tuning range from 2.34-2.55 GHz     

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

High-performance in W-band monolithic pseudomorphic InGaAsHEMT LNA's and design/analysis methodology

High-performance W-band monolithic one- and two-stage low noise amplifiers (LNAs) based on pseudomorphic InGaAs-GaAs HEMT devices have been developed. The one-stage amplifier has a measured noise figure of 5.1 dB with an associated gain of 7 dB from 92 to 95 GHz, and the two-stage amplifier has a measured small signal gain of 13.3 dB at 94 GHz and 17 dB at 89 GHz with a noise figure of 5.5 dB from 91 to 95 GHz. An eight-stage LNA built by cascading four of these monolithic two-stage LNA chips demonstrates 49 dB gain and 6.5 dB noise figure at 94 GHz. A rigorous analysis procedure was incorporated in the design, including accurate active device modeling and full-wave EM analysis of passive structures. The first pass success of these LNA chip designs indicates the importance of a rigorous design/analysis methodology in millimeter-wave monolithic IC development     

A low-power Ku-band downconverter in InGaP-GaAs HBT technology

We have developed a low-voltage, low-power Ku-band microwave monolithic integrated circuit (MMIC) downconverter using InGaP-GaAs heterojunction bipolar transistor technology. It consists of a preamplifier, a double-balanced mixer, and an L-band wideband intermediate-frequency (IF) amplifier. The downconverter achieves a conversion gain of 31 dB, with a gain flatness within /spl plusmn/ 1 dB, and an output-referred 1-dB compression power (P/sub 1dB,OUT/) of +2.5dBm. This downconverter dissipates 33mA from a 3-V supply. We believe that the operating voltage and power consumption are lower than those of previously published Ku-band MMIC downconverters.     

Wide-band balanced active HEMT mixer

The design and characteristics of a balanced active high electron-mobility transistor (HEMT) mixer operating in the 4.5-10-GHz frequency band are described in this paper. It consists of two parts implemented as independent hybrid circuits, namely, an microwave part fabricated by using a uniplanar technology and comprising a 180° hybrid ring coupler, HEMTs, and input-output matching circuits, and a low-frequency part consisting of an L-C balun and a low-pass filter built of discrete elements. The design of the microwave part of the mixer ensures a high degree of isolation between the signal and local-oscillator (LO) inputs within a wide frequency band at low IF. The measurements show a conversion gain of 5-7 dB, noise figure of 5-7.5 dB, and isolation between the signal and LO ports greater than 20 dB within the 4.5-10-GHz range     

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

This paper presents the design and performance characteristics of a 20-40 GHz monolithic double-balanced direct conversion mixer implemented using InGaP/GaAs HBT process. The compact MMIC mixer makes use of a Gilbert-cell multiplier and utilizes a broadband monolithic passive balun that has been developed for MMIC applications. The new balun makes use of multidielectric layer structure to achieve a broadband performance in a simple coplanar configuration. A measured return loss better than 15 dB, with a maximum insertion loss of 4.5 dB including the 3-dB power splitting loss has been achieved over the band from 15 to 45 GHz. Operated as a downconverter mixer, the newly developed direct conversion mixer achieves a measured conversion gain of 16 dB given an RF signal at 30 GHz, LO drive of 5 dBm and a downconverted baseband signal at 10 MHz. The mixer IP3 occurs at an output power of 4 dBm while the IP2 occurs at an output power of 11 dBm.     

110-120-GHz monolithic low-noise amplifiers

The authors discuss the development of 110-120-GHz monolithic low-noise amplifiers (LNAs) using 0.1-mm pseudomorphic AlGaAs/InGaAs/GaAs low-noise HEMT technology. Two 2-stage LNAs have been designed, fabricated, and tested. The first amplifier demonstrates a gain of 12 dB at 112 to 115 GHz with a noise figure of 6.3 dB when biased for high gain, and a noise figure of 5.5 dB is achieved with an associated gain of 10 dB at 113 GHz when biased for low-noise figure. The other amplifier has a measured small-signal gain of 19.6 dB at 110 GHz with a noise figure of 3.9 dB. A noise figure of 3.4 dB with 15.6-dB associated gain was obtained at 113 GHz. The authors state that the small-signal gain and noise figure performance for the second LNA are the best results ever achieved for a two-stage HEMT amplifier at this frequency band