A noise model for high electron mobility transistors

A model to explain the noise properties for AlGaAs/GaAs HEMT's, AlGaAs/InGaAs/GaAs pseudomorphic HEMT's (P-HEMT's) and GaAs/AlGaAs inverted HEMT's (I-HEMT's) is presented. The model Is based on a self-consistent solution of Schrodinger and Poisson's equations. The influence of the drain-source current, frequency and device parameters on the minimum noise figure F_min and minimum noise temperature T_min, for different HEMT structures are presented. The study shows that P-HEMT's have a better noise performance than the normal and inverted HEMT's. The present model predicts that a long gate P-HEMT device will exhibit a better noise performance than a conventional HEMT. There is a range of doped epilayer thickness where minimum noise figure is a minimum for pseudomorphic HEMT's which is not observed in conventional and inverted HEMT's. The calculated noise properties are compared with experimental data and the results show excellent agreement for all devices     

Distributed channel model for HEMT signal and noise parameters

A new simple model for the signal and noise properties of a microwave FET or HEMT avoids the need for any explicit correlation between gate and drain noise sources by distributing the drain-to-gate capacitance and the drain noise source along the conducting channel. The new model applied to a commercial HEMT chip demonstrates a very good fit to measured scattering and noise parameter data.<>     

An improved large signal model of InP HEMTs

An improved large signal model for InP HEMTs is proposed in this paper.The channel current and charge model equations are constructed based on the Angelov model equations.Both the equations for channel current and gate charge models were all continuous and high order drivable,and the proposed gate charge model satisfied the charge conservation.For the strong leakage induced barrier reduction effect of InP HEMTs,the Angelov current model equations are improved.The channel current model could fit DC performance of devices.A 2 × 25μm × 70 nm InP HEMT device is used to demonstrate the extraction and validation of the model,in which the model has predicted the DC I-V,C-Vand bias related S parameters accurately.     

Compact analytical model for single gate AlInSb/InSb high electron mobility transistors

We have developed a 2D analytical model for the single gate Al In Sb/In Sb HEMT device by solving the Poisson equation using the parabolic approximation method.The developed model analyses the device performance by calculating the parameters such as surface potential,electric field distribution and drain current.The high mobility of the Al In Sb/In Sb quantum makes this HEMT ideal for high frequency,high power applications.The working of the single gate Al In Sb/In Sb HEMT device is studied by considering the variation of gate source voltage,drain source voltage,and channel length under the gate region and temperature.The carrier transport efficiency is improved by uniform electric field along the channel and the peak values near the source and drain regions.The results from the analytical model are compared with that of numerical simulations(TCAD) and a good agreement between them is achieved.     

Monte Carlo simulation of electronic characteristics in short channel δ-doped AlInAs/GaInAs HEMTs

We present a microscopic analysis of electronic noise in short channel δ-doped AlInAs/GaInAs HEMTs. A classical Monte Carlo device simulation, appropriately modified to locally introduce the effects of electron degeneracy and nonequilibrium screening, is used for the calculations. Even if the energy quantization in the channel is not taken into account in the Monte Carlo model, its validity has been checked by means of the comparison with experimental results of static characteristics, small signal behavior and noise performance in a recessed 0.1 μm T-gate δ-doped HEMT (InP based). The geometry and layer structure of the simulated HEMT is completely realistic, including recessed gate and δ-doping configuration and also the T-shape of the gate and the dielectric disposition has been included in the simulation     

Microwave effects of UV light exposure of a GaN HEMT: Measurements and model extraction

This paper presents an experimental investigation on the microwave performance of a GaN HEMT subject to UV light exposure. The device, having 0.25 μm gate length and 100 μm gate width, has been characterized by measuring its DC performance, linear scattering parameters, noise parameters in the 2–26 GHz frequency range, either in dark condition and under CW light exposure at 375 nm. Clear variations of the GaN HEMT performance related to the charge generation and the relevant threshold voltage shift within the semiconductor layers are recognizable in the reported results. The scattering parameters and the noise parameters are affected in a similar way as it occurs in GaAs HEMT's under optical irradiation in the visible range. A circuit model extraction has then been performed to analyze more deeply the effects of the UV exposure. The observed changes of the noise parameters might be ascribed to the effects of the increased gate conduction under illumination and have been efficiently modeled by an additional resistor between the internal gate and source terminals with an assigned noise temperature of 3053 °C.     

Modeling of hetero-interface potential and threshold voltage for tied and separate nanoscale InAlAs-InGaAs symmetric double-gate HEMT

This paper presents an approximate solution of a 2-D Poisson’s equation in the channel region, based on physical correspondence between MOSFET and HEMT, with the approximation that the vertical channel potential distribution is a cubic function of position to study not only tied gate but separate gate bias conditions as well. An analytical expression for both front and back heterointerface potential is derived and threshold voltage is obtained iteratively from the proposed potential model. The threshold voltage behavior for tied and separated double-gate HEMT is investigated for various device dimensions. The back gate effect of the separated double gate HEMT is investigated for the depleted back channel only. The results obtained are verified by comparing them with simulated and experimental results.     

1μm栅HEMT DCFL门电路及环形振荡器的设计与实验研究

利用作者提出的HEMT DCFL倒相器直流传输特性及瞬态特性计算机分析的模型,设计并制成了HEMT DCFL门电路及环形振荡器.在电路设计中,重点讨论了E/D NEMT倒相器的电路性能与器件的主要参数(栅长、栅宽、阈压)间的理论关系.工艺研究中,建立了挖栅时沟道饱和电流Is′与阈压值V_(t~h)间关系的理论曲线,并改进了传统化学湿法刻蚀工艺的阈压均匀性及E,D器件电流匹配的控制精度.实验制作了栅长为1μm的增强型和耗尽型HEMT.在1×1mm范围内,阈压偏差小于50mV,E/D倒相器的传输特性为:V_(OH)≈V_(DD),V_(OL)<0.1V,高、低电平转换范围仅0.1V,噪容达0.3V左右.研制的9级、17级环形振荡器,在V_(DD)为0.5V到3.5V范围内都观察到正弦波振荡波形.     

DC and microwave characteristics of sub-0.1-μm gate-lengthplanar-doped pseudomorphic HEMTs

Analytical modeling of these very-short-channel HEMTs (high-electron-mobility transistors) using the charge-control model is given. The calculations performed using this model indicate a very high electron velocity in the device channel (3.2±0.2×10⁷ cm/s) and clearly demonstrate the advantages of the planar-doped devices as compared to the conventional uniformly doped HEMTs. Devices with different air-bridged geometries have been fabricated to study the effect of the gate resistance on the sub-0.1-μm HEMT performance. With reduced gate resistance in the air-bridge-drain device, noise figures as low as 0.7 and 1.9 dB were measured at 18 and 60 GHz, respectively. Maximum available gains as high as 13.0 dB at 60 GHz and 9.2 dB at 92 GHz, corresponding to an f_max of 270 GHz, have also been measured in the device. Using the planar-doped pseudomorphic structure with a high gate aspect-ratio design, a noise figure of less than 2.0 dB at 94 GHz is projected based on expected further reduction in the parasitic gate and source resistances     

High-frequency MESFET noise modeling including distributed effects

A microwave field-effect transistor (FET) noise analysis is presented including distributed effects caused by the wave propagation along the width of the gate. Using this model the noise characteristics of submicron gate MESFETs at frequencies beyond 20 GHz are evaluated. It is ascertained that in the case of well-designed quarter-micron low-noise MESFETs, distributed effects may be neglected. Common lumped approximations, on the other hand, are shown to produce noticeable deviations. An improved lumped model is proposed. The analysis presented can also be used with high-electron-mobility transistor (HEMT) devices after introducing adequate geometry and small-signal parameters     

一种紧凑的GaN高电子迁移率晶体管大信号模型拓扑

GaN高电子迁移率晶体管（HEMT）以其复杂的器件特性使其大信号建模变得十分困难,尽管EEHEMT、Angelov等模型结构曾经成功应用于GaAs HEMT/MESFET的大信号模型,但当它们被用于GaN HEMT建模时却不再准确和完备.面向GaN HEMT器件的大信号模型,本文提出了一种紧凑的模型拓扑,此模型拓扑综合了GaN HEMT器件的直流电压-电流（I-V）特性、非线性电容、寄生参数、栅延迟漏延迟与电流崩塌、自热效应以及噪声等特性.经验证此模型拓扑在仿真中具有很好的收敛性,适用于GaN HEMT器件的大信号模型的建立,满足GaN基微波电路设计对器件模型的需求.     

A physically-based high-frequency noise model of MESFETs takingstatic feedback effect into account

A new physically-based thermal noise model for MESFETs has been proposed, which is compatible with small signal equivalent circuit and large signal current-voltage characteristics. Specifically, the static feedback effect is taken into account to model noise characteristics correctly especially in low current regime. The gate and drain bias dependence of the gate noise voltage, the drain noise current, and the correlation coefficient between them has been investigated thoroughly, showing good agreement with experimental results from 0.5-μm gate length MESFET, As a result, our formulation is successfully used to model bias dependence of the four noise parameters with reasonably good accuracy. Our model is simple and physical enough for device design and circuit simulation especially for MMIC application     

Performance assessment and sub-threshold analysis of gate material engineered AlGaN/GaN HEMT for enhanced carrier transport efficiency

The present work explores the features of gate material engineered (GME) AlGaN/GaN high electron mobility transistor (HEMT) for enhanced carrier transport efficiency (CTE) and suppressed short channel effects (SCEs) using 2-D sub-threshold analysis and device simulation. The model accurately predicts the channel potential, electric field and sub-threshold current for the conventional and GME HEMT, taking into account the effect of work function difference of the two metal gates. This is verified by comparing the model results with the ATLAS simulation results. Further, simulation study has been extended to reflect the wide range of benefits exhibited by GME HEMT for its on-state and analog performance. The simulation results demonstrate that the GME HEMT exhibits much higher on current, lower conductance and higher transconductance as compared to the conventional HEMT due to improved CTE and reduced SCEs. This in turn has a direct bearing on the device figure of merits (FOMs) such as intrinsic gain, device efficiency and early voltage. Tuning of GME HEMT in terms of the relative lengths of the two metal gates, their work function difference and barrier layer thickness has further been carried out to enhance the drive current, transconductance and the device FOMs illustrating the superior performance of GME HEMT for future high-performance high-speed switching, digital and analog applications.     

A comparative study of the noise performance ofaluminium-gallium-arsenide/gallium-arsenide high electron mobilitytransistors with and without superconducting gate electrodes

The noise performance of an AlGaAs high electron mobility transistor (HEMT) with a 1 μm vanadium/titanium superconducting gate electrode is compared to an otherwise identical nonsuperconducting titanium gate HEMT. At a frequency of 1 GHz and at a temperature below its critical temperature, the superconducting gate HEMT achieved a noise temperature of 21 K. Under these conditions the HEMT with the Ti gate electrode demonstrated a noise temperature of approximately 70 K. This factor of three reduction in noise temperature is due to the reduced gate resistance of the V/Ti superconducting gate. This is the first demonstration of noise reduction in an HEMT using a low-temperature superconducting gate electrode     

AlGaN/GaN高电子迁移率晶体管大信号I-V特性模型

对非线性电流源Ids(Vgs,Vds)的准确描述是Al GaN/GaN HEMT大信号模型的最重要部分之一.Materka模型考虑了夹断电压与Vds的关系,其模型参数只有三个,但是Ids与Vgs的平方关系不符合实际,计算结果与测量数据有误差.我们在考虑了栅电压与漏电流的关系及不同栅压区漏电流随漏电压斜率改变的基础上,提出了改进的高电子迁移率晶体管(HEMT)的直流特性模型.采用这个模型,计算了Al GaN/GaN HEMT器件的大信号I-V特性,并与实际测量数据进行了比较.实验结果表明改进的模型更精确,Ids与Vgs的呈2.5次方的指数关系.     

太赫兹InP HEMT器件的建模

采用减小栅长(Lg)的方法可以显著提高磷化铟基高电子迁移率晶体管(InP HEMT)器件的直流和微波性能,并使器件的工作频率上升到太赫兹频段。采用T形栅工艺制备了70 nm栅长的InP HEMT器件,器件的直流跨导达到了2.87 S/mm,截止频率ft和最大振荡频率fmax分别为230 GHz和310 GHz。对器件的寄生参数进行了提取和去嵌入,得到了器件的本征S参数。采用经典的9参数模型拓扑结构对器件进行了小信号建模,模型仿真与测试结果拟合良好。针对电流的短沟道效应,采用电流分段的方法来拟合I-V曲线,取得了较好的拟合结果。最后采用Angelov模型对器件的电容进行建模,并最终建立了器件的大信号模型。     

Sensitivity analysis of integrated InGaAs MSM-PD's and HEMToptoelectronic receiver array

A sensitivity analysis is given of a long wavelength optoelectronic receiver array consisting of InAlAs/InGaAs interdigitated Metal Semiconductor Metal photodetectors (MSM-PD's) and a HEMT preamplifier. It is shown that the capacitance varies with the finger width and spacing for a MSM-PD with same active area. Analytical expressions are derived for calculating the sensitivity of the receiver array by means of the equivalent circuit models of the MSM-PD's array and the HEMT. Major noise sources in the receiver array, such as shot noise in the photodetectors, thermal noise in the resistors, gate and drain noises as well as their correlation term in the HEMT, are considered. The influences of geometric parameters of the MSM-PD's and HEMT on the sensitivity of the receiver array are investigated. The optimum gate width of the HEMT is determined for a given MSM-PD array to obtain a high receiver sensitivity. It is also demonstrated that the optical signal related shot noise from the MSM-PD's makes a substantial contribution to the total noise of the receiver array     

Random telegraph noise and leakage current in smart power technology DMOS devices

Random telegraph signal (RTS) noise, analyzed in time and frequency domains, and leakage current are studied in smart power technology double-diffused metal oxide semiconductor (DMOS) field effect transistors. The RTS noise is strongly correlated with the presence of an excess leakage current in the device. The observed drain current (gate bias) dependencies of relative (absolute) RTS amplitude and gate voltage dependence of RTS mean pulse widths suggest that the RTS noise sources are located under the gate and in the drain-body region. A model, where the multicell DMOS structure is considered as parallel connection of submicron MOSFETs, is proposed to account for the results.     

A simple yet comprehensive unified physical model of the donorlayer electrons in delta-doped and uniformly doped HEMT's

The trapped and free electrons in the donor layer of a high electron mobility transistor (HEMT) play an important role in limiting the current modulation efficiency and the current-gain cutoff frequency of the device. This paper presents a simple model, which closely tracks accurate but complex numerical calculations of the concentration and capacitance of these electrons as a function of the gate voltage. The model is comprehensive in the sense that it captures the effects of all device parameters including temperature on trapped as well as free electrons, and encompasses both uniformly doped and delta-doped HEMT's. A simple power law charge voltage function, which is both differentiable and integrable, is shown to adequately represent the behavior of the two types of donor layer electrons in both the HEMT's. The model is useful in the design and simulation of ac performance of HEMT devices and circuits. Together with the n_s-V_G model proposed recently by the authors of this paper, it gives a complete yet simple analytical picture of all the charges of significance in a general HEMT     

A monolithic DC temperature compensation bias scheme for multistageHEMT integrated circuits

This work benchmarks the first demonstration of a multistage monolithic HEMT IC design which incorporates a DC temperature compensated current-mirror bias scheme. This is believed to be the first demonstrated monolithic HEMT bias scheme of its kind. The active bias approach has been applied to a 2-18 GHz five-section low noise HEMT distributed amplifier which achieves a nominal gain of 12.5 dB and a noise figure <2.5 dB across a 2-18 GHz band, The regulated current-mirror scheme achieves better than 0.2% current regulation over a 0-125°C temperature range, The RF gain response was also measured over the same temperature range and showed less than 0.75 dB gain degradation. This results in a -0.006 dB/°C temperature coefficient which is strictly due to HEMT device G_m variation with temperature. The regulated current-mirror circuit can be employed as a stand-alone V_gs-voltage reference circuit which fan be monolithically applied to the gate bias terminal of existing HEMT ICs for providing temperature compensated performance, This monolithic bias approach provides a practical solution to DC bias regulation and temperature compensation for HEMT MMICs which can improve the performance, reliability, and cost of integrated microwave assemblies (IMAs) used in space-flight military applications