Perturbation Approach to Ebers–Moll Equations for Transistor Circuit Analysis

In this paper, a perturbation theoretic technique has been used to analyze an Ebers–Moll modeled transistor amplifier circuit. The main advantage of the proposed method is that the use of the perturbation technique helps to obtain more accurate closed form Volterra series. These expressions can be used to derive corrections to the behavior of the amplifier when the input swing is not small enough. The expressions derived in this paper can also be used for transistor parameter estimation, as variations in transistor parameters affect the circuit performance critically.     

2～ 4 0 GHz Detection-log-video Amplifier Series

2～8GHz、8～18GHz、18～26.5GHz、26.5～40GHzdetection-log-videoamplifierseries(DLVAs),developedbyNanjingElectronicDevicesInstitute,havebeenappliedinreceiversdesignedforelectronicsystem.TheDLVAcontainsRFamplifier,detectorandlog-videoamplifier.Theyhaveadvantageofsmallvolume,widedynamicrange,broadfreqencyrange,goodlog-linearity,excellentnarrowpulse(50ns)toCWresponse.Andnowtheyhavebeenputintobatchproduction.Thecharacteristicsofthemoduleareasfollows:Frequencyrange:8～18GHzLoglinearity:±1…     

On a Linear Summation Problem of the Double Fourier Series

1IntroductionactQ=(--RSxon,~nSyac)andC(O)betheconhnuousfunchonspaceofthePeriodicfunchonwithperiodZn.Ifthefunchonf(x,y)EC(Q),thenthepAnalsumofthedoubleFourierseriesofthefimchonMy)isgivenbySmnably)=ck,lcoskxsinly dk,Isinkxsinly)(l)whereakJ,bk,l,ck,IanddkJarecoefficientsOfthedoubleFourierseries.Thefactorsoftriangularmatrixaregivenby4:."),k~0,l,...,m;I=0,l,...,n;m,n=0,l,2,...(2)In1951,ReL[l]consideredthegenerallinearsunUnationProblemofthedoubleFourierseries:HePOintedoutthatifthesullUna…     

A Very Fast Method for the DC Analysis of Diode–Transistor Circuits

The paper offers a universal method for finding a unique or multiple DC operating points of nonlinear circuits. The developed method is based on the theory known as a linear complementarity problem (LCP) and the homotopy concept. It is a combination of Lemke’s method for solving LCP and some variant of the homotopy method. To express the problem of finding DC operating points in terms of LCP, an appropriate piecewise–linear approximation of diode characteristic is proposed. Although the method does not guarantee finding all the DC operating points, usually it finds them. The method is very fast and remarkably efficient. Numerical examples, including practical BJT and CMOS circuits having a unique or multiple DC operating points are given.     

An Analysis of the Blockcipher-Based Hash Functions from PGV

Preneel, Govaerts, and Vandewalle (1993) considered the 64 most basic ways to construct a hash function $H{:\;\:}\{0,1\}^{*}\rightarrow \{0,1\}^{n}Preneel, Govaerts, and Vandewalle (1993) considered the 64 most basic ways to construct a hash function H:   {0,1}^*? {0,1}ⁿH{:\;\:}\{0,1\}^{*}\rightarrow \{0,1\}^{n} from a blockcipher E:   {0,1}ⁿ×{0,1}ⁿ? {0,1}ⁿE{:\;\:}\{0,1\}^{n}\times \{0,1\}^{n}\rightarrow \{0,1\}^{n}. They regarded 12 of these 64 schemes as secure, though no proofs or formal claims were given. Here we provide a proof-based treatment of the PGV schemes. We show that, in the ideal-cipher model, the 12 schemes considered secure by PGV really are secure: we give tight upper and lower bounds on their collision resistance. Furthermore, by stepping outside of the Merkle–Damg?rd approach to analysis, we show that an additional 8 of the PGV schemes are just as collision resistant (up to a constant). Nonetheless, we are able to differentiate among the 20 collision-resistant schemes by considering their preimage resistance: only the 12 initial schemes enjoy optimal preimage resistance. Our work demonstrates that proving ideal-cipher-model bounds is a feasible and useful step for understanding the security of blockcipher-based hash-function constructions.     

A Study of Equilibrium Points and Stability in a Nonlinear Model of a Phase-Compensated Operational Amplifier

A nonlinear model is derived for a phase-compensated operational amplifier. Instead of well-known s-domain small-signal analysis, which linearizes the system equations with respect to an operating point, we locate all equilibrium points and study the stability of important ones. Two important conclusions incorporating novel, yet simple, design equations to improve stability and linearity are stated.     

Practical Construction and Analysis of Pseudo-Randomness Primitives

We give a careful, fixed-size parameter analysis of a standard (Blum and Micali in SIAM J. Comput. 13(4):850–864, 1984; Goldreich and Levin in Proceedings of 21st ACM Symposium on Theory of Computing, pp. 25–32, 1989) way to form a pseudo-random generator from a one-way function and then pseudo-random functions from said generator (Goldreich et al. in J. Assoc. Comput. Mach. 33(4):792–807, 1986) While the analysis is done in the model of exact security, we improve known bounds also asymptotically when many bits are output each round and we find all auxiliary parameters efficiently, giving a uniform result. These optimizations makes the analysis effective even for security parameters/key-sizes supported by typical block ciphers and hash functions. This enables us to construct very practical pseudo-random generators with strong properties based on plausible assumptions.     

Simulation and Analysis of Photo—charge Transfer Characteristics of Bipolar Junction Photogate Transistor for CMOS Imagers

The principle of the two carriers contributing to carry the pixel signal charges is firstly presented,and then the bipolar junction photogate transistor(BJPT)with high performance is proposed for the CMOS image sensor.The numerical analytical model of the photo-Chrge transfer for the bipolar junction photogate is established in detail.Some numerical simulations are obtained unider 0.6μm CMOS process,which show that its readout rate increases exponentially with the increase of the photo-Charge at applied voltage.     

Hybrid Architecture and VLSI Implementation of the Cosine–Fourier–Haar Transforms

This paper presents a VLSI implementation of a novel hybrid architecture that computes three 8-point 1-D transforms—the discrete cosine transform, the discrete Fourier transform, and the Haar wavelet transform—on a single chip. The architecture is developed on matrix factorization and row permutation algorithms, where the basis forward transformation matrices are decomposed into common submatrices which are then shared among the transforms. A two-level hardware mapping has been employed which is parallel, pipelined, and multiplexed. The hybrid architecture, the first of its kind, is implemented using 0.18 μm CMOS technology. The estimated die size of the hybrid processor is 0.203 sq. mm, the frequency of operation is 100 MHz, the gate count is 20,400, and the power consumption is 15.38 mW. Compared to the existing designs, the proposed hybrid scheme has less power density and higher frequency of operation, making it very suitable for modern multimedia-based transcoding applications.     

Error Analysis of the Anti-Causal Realization of Periodic Inverse Systems

A causal realization of an inverse system can be unstable, and an anti-causal realization is used to deal with this problem to provide a numerically stable procedure to realize the inverse system and compute its input signal. In this paper, we consider the anti-causal realization of the inverse of discrete-time linear periodic systems obtained by an outer-inner factorization approach. It presents an analysis and understanding of the inverse system error caused by different parts of the system components. The analysis shows that the inverse system error due to the mismatching of the system initial state in the anti-causal inverse system is inevitable in practical computations.     

Space Charges Effect of Static Induction Transistor

The space charge effect (SCE) of static induction transistor (SIT) that occurs in high current region is systematically studied.The I-V equations are deduced and well agree with experimental results.Two kinds of barriers are presented in SIT,corresponding to channel voltage barrier control (CVBC) mechanism and space charge limited control (SCLC) mechanism respectively.With the increase of drain voltage,the gradual transferring of operational mechanism from CVBC to SCLC is demonstrated.It points out that CVBC mechanism and its contest relationship with space charge barrier makes the SIT distinctly differentiated from JFET and triode devices,etc.The contest relationship of the two potential barriers also results in three different working regions,which are distinctly marked and analyzed.Furthermore,the extreme importance of grid voltage on SCE is illustrated.     

Analysis for New Types of Waveguide with Fourier’s Expansion-Differential Method

Two new types of rectangular waveguide loaded with latten are analyzed by using Fourier’s expansion-differential method effectively in this paper. The correctness of the new method is verified and the mode distributions of the new types of rectangular waveguide are obtained. It is shown that their bandwidth and transmission characteristics for single mode are improved, and some modes may be restrained by loading latten in the rectangular waveguide. It is useful for designing and applying in the parts of microwave apparatus.     

RF Power Amplifier Behavioral Modeling Based on Takenaka–Malmquist–Volterra Series

In this paper, a Takenaka–Malmquist–Volterra (TMV) model structure is employed to improve the approximations in the low-pass equivalent behavioral modeling of radio frequency (RF) power amplifiers (PAs). The Takenaka–Malmquist basis generalizes the orthonormal basis functions previously used in this context. In addition, it allows each nonlinearity order in the expanded Volterra model to be parameterized by multiple complex poles (dynamics). The state-space realizations for the TMV models are introduced. The pole sets for the TMV model and also for the previous Laguerre–Volterra (LV) and Kautz–Volterra (KV) models are obtained using a constrained nonlinear optimization approach. Based on experimental data measured on a GaN HEMT class AB RF PA excited by a WCDMA signal, it is observed that the TMV model reduces the normalized mean-square error and the adjacent channel error power ratio for the upper adjacent channel (upper ACEPR) by 1.6 dB when it is compared to the previous LV and KV models under the same computational complexity.     

1.0 THz GaN IMPATT Source: Effect of Parasitic Series Resistance

The degradation of high-frequency characteristics of a 1.0-THz double-drift region (DDR) impact avalanche transit time (IMPATT) diode based on wurtzite gallium nitride (Wz-GaN), due to the influence of parasitic series resistance, has been investigated. A two-dimensional (2-D) large-signal (L-S) simulation method based on a non-sinusoidal voltage excitation (NSVE) model has been used for this purpose. A comprehensive model of series resistance has been developed by considering the influence of skin effect, and the said model has been incorporated in the 2-D L-S simulation for studying the effect of RF power output and DC to RF conversion efficiency of the device. Results indicate 24.2–35.9% reduction in power output and efficiency due to the RF power dissipation in the positive series resistance. However, the device can still deliver 191.7–202.9 mW peak RF power to the load at 1.0 THz with 8.48–6.41% conversion efficiency. GaN IMPATT diodes are capable of generating higher RF power at around 1 THz than conventional diodes, but the effect of parasitic series resistance causes havoc reduction in power output and efficiency. The nature of the parasitic resistance is studied here in the level of device fabrication and optimization, which to our knowledge is not available at present.     

Design and Fabrication of Power Si1-xGex/Si Heterojunction Bipolar Transistor for Wireless Power Amplifier Applications

采用简单的双台面工艺制作了完全平面结构的2个单元4个发射极指的SiGe HBT.在没有扣除测试结构的影响下,当直流偏置IC=10mA,VCE=2.5V时,FT和fmax分别为1.8和10.1GHz.增益β为144.25,BVCBO为9V.     

A 11.2 mW 48–62 GHz Low Noise Amplifier in 65 nm CMOS Technology

In this paper, a wideband low noise amplifier (LNA) for 60 GHz wireless applications is presented. A single-ended two-stage cascade topology is utilized to realize an ultra-wideband and flat gain response. The first stage adopts a current-reused topology that performs the more than 10 GHz ultra-wideband input impedance matching. The second stage is a cascade common source amplifier that is used to enhance the overall gain and reverse isolation. By proper optimization of the current-reused topology and stagger turning technique, the two-stage cascade common source LNA provides low power consumption and gain flatness over an ultra-wide frequency band with relatively low noise. The LNA is fabricated in Global Foundries 65 nm RFCMOS technology. The measurement results show a maximum \(S_{21}\) gain of 11.4 dB gain with a \(-\)3 dB bandwidth from 48 to 62 GHz. Within this frequency range, the measured \(S_{11}\) and \(S_{12}\) are less than \(-\)10 dB and the measured DC power consumption is only 11.2 mW from a single 1.5 V supply.     

Fundamental Problems of the Theory of Transistor Charge Control†

In order to determine dynamic currents and voltages of a circuitry containing transistors, dynamic transistor characteristics must be known. This paper shows how to derive dynamic transistor characteristics for a charge-controlled transistor model by a synthesis of Ebers and Moll's static and Beaufoy and Sparkes dynamic transistor relations. Dynamic transistor quantities may then be determined by two methods : one may solve the related system of dynamic circuit equations directly, and another may solve the system of corresponding ‘ adjoined static ’ circuit equations loading to ‘ adjoined static ’ quantities from which dynamic quantities may then be computed. Adjoined static quantities are time-dependent quantities which would be observed if all base-charging currents were supplied from wells inside the transistor base, whereas in reality they are supplied by sources outside the base, leading to the observation of corresponding dynamic quantities. The possibility of deriving dynamic from adjoined static quantities follows from the basic assumptions of charge-control theory.

If switching times or, more generally, durations of dynamic transistor processes in terms of base charge only are required, then, given current or voltage control, the respective control quantity being known as a function of time, it is not necessary to formulate and solve the complete system of circuit equations. In the case of current control, one may solve Sparkes equation, assuming different values for the switching time constant corresponding to the various operating regions. In the case of voltage control, an analogue equation may be solved, derived from a generalization of Sparkes equation, which obviates the need for regional time constants. Both methods do not lend themselves well to the determination of dynamic transistor currents and voltages generally, except in the active region where base charge and output current are approximately proportional.     

An improved Hurst parameter estimator based on fractional Fourier transform

A fractional Fourier transform (FrFT) based estimation method is introduced in this paper to analyze the long range dependence (LRD) in time series. The degree of LRD can be characterized by the Hurst parameter. The FrFT-based estimation of Hurst parameter proposed in this paper can be implemented efficiently allowing very large data set. We used fractional Gaussian noises (FGN) which typically possesses long-range dependence with known Hurst parameters to test the accuracy of the proposed Hurst parameter estimator. For justifying the advantage of the proposed estimator, some other existing Hurst parameter estimation methods, such as wavelet-based method and a global estimator based on dispersional analysis, are compared. The proposed estimator can process the very long experimental time series locally to achieve a reliable estimation of the Hurst parameter.     

Multi-signal Transfer Characteristics of a Travelling-Wave Amplifier†

The operation of a travelling-wave amplifier with a multi-frequency component input signal is investigated using the non-linear Boltzmann— Vlasov equation. Small C, zero space-charge conditions are presumed, and the r.f. circuit voltage and electron density function are expanded in a power series of the input voltages. The final equations are solved numerically and the results are plotted in terms of the phase and amplitude cross-modulation factors. The results compare reasonably well with those obtained from a direct integration of the particle equations of motion