SAGCM-APD增益影响因子分析与优化

应用二维漂移扩散模型研究具有分立吸收层、渐变层、电荷层和倍增层结构(SAGCM)的InGaAsP-InP雪崩光电探测器(APD),仿真分析了不同电荷层、倍增层厚度和掺杂浓度对电场分布、电流响应及击穿电压的影响,特别是参数变量对增益计算模型的影响,载流子传输过程的时间依赖关系和倍增层中所处位置的影响,仿真结果表明:较高掺杂浓度和较薄电荷层结构可以改变器件内部的电场分布,进而提高增益值.当入射光波长为1.55μm,光功率为500 W/m2时,光电流响应量级在10-2A;阈值电压降低到10V以下,击穿电压为42.6V时,器件倍增增益值大于100.     

4H-SiC 雪崩光电探测器中倍增层参数的优化模拟

应用ATLAS模拟软件,设计了吸收层和倍增层分离的（SAM）4H-SiC 雪崩光电探测器（APD）结构。分析了不同外延层厚度和掺杂浓度对器件光谱响应的影响,对倍增层参数进行优化模拟,得出倍增层的最优化厚度为0.26μm,掺杂浓度为9.0×1017cm^-3。模拟分析了APD的反向IV特性、光增益、不同偏压下的光谱响应和探测率等,结果显示该APD在较低的击穿电压66.4V下可获得较高的倍增因子105;在0V偏压下峰值响应波长（250nm）处的响应度为0.11A/W,相应的量子效率为58%;临近击穿电压时,紫外可见比仍可达1.5×103;其归一化探测率最大可达1.5×1016cmHz ^1/2 W^-1。结果显示该APD具有较好的紫外探测性能。     

In0.53Ga0.47As/InP高速光电二极管材料生长及光电性能

利用低压MOCVD技术制备PIN结构的InP基InGaAs外延材料。采用分层吸收渐变电荷倍增(SAGCM)结构,通过两次Zn扩散、多层介质膜淀积、Au/Zn p型欧姆接触、Au/Ge/Ni n型欧姆接触等标准半导体平面工艺,设计制造正入射平面In_(0.53)Ga_(0.47)As/InP雪崩光电二极管器件。该器件采用与InP衬底晶格匹配的In_(0.53)Ga_(0.47)As材料做吸收层,InP材料做倍增层,同时引入InGaAsP梯度层。探测器件光敏面直径50μm,器件测试结果表明该器件光响应特性正常,击穿电压约43 V,在低于击穿电压3 V左右可以得到大约10 A/W的光响应度,在0 V到小于击穿电压1 V的偏压范围内,暗电流只有1 nA左右。光电二极管在8 GHz以下有平坦的增益,适用于5 Gbit/s光通信系统。     

高速InP/InGaAs雪崩光电二极管

采用分层吸收渐变电荷倍增(SAGCM)结构,通过两次扩散、多层介质淀积、AuZn p型欧姆接触、AuGeNi n型欧姆接触等工艺,设计制造了正面入射平面InP/InGaAs雪崩光电二极管,器件利用InGaAs做吸收层,InP做增益层,光敏面直径50 μm;测试结果表明器件有正常的光响应特性,击穿电压32～42 V,在低于击穿电压2 V左右可以得到大约10A/W的光响应度,在0到小于击穿电压1 V的偏压范围内,暗电流只有1 nA左右;器件在2.7 GHz以下有平坦的增益.     

Ge/Si SACM-APD器件分析

Ge/Si吸收区-电荷区-倍增区分离(SACM)结构的APD作为一种新型光电探测器已成为硅基APD器件研究的重点.对SACM Ge/Si型APD器件的基本结构及其主要特性参数,包括量子效率、响应度、暗电流等进行了理论分析及仿真验证.实验结果表明:在给定的器件参数条件下,所设计的APD器件的雪崩击穿电压为25.7 V,最大内部量子效率为91%,单位增益下响应度峰值为0.55 A/W,在750~1 500 nm范围内具有较高响应度,其峰值波长为1 050 nm;在高偏压以及高光照强度情况下,倍增区发生空间电荷效应从而导致增益降低.     

10Gbit/s InGaAs/InP雪崩光电二极管

基于InGaAs/InP吸收区、渐变区、电荷区和倍增区分离雪崩光电二极管(SAGCMAPD)器件结构,利用数值计算方法,模拟了各层参数对器件频率响应特性的影响.模拟结果表明,吸收层、倍增层厚度及电荷层面电荷密度可影响器件的-3 dB带宽;随增益的增加,器件带宽会逐渐降低;电荷层面电荷密度对器件击穿电压有明显影响.结合此模拟结果,制作出了高速InGaAs/InP雪崩光电二极管,并对器件进行了封装测试.测试结果表明,该结果与模拟结果相吻合.器件击穿电压为30 V;在倍增因子为1时,器件响应度大于0.8 A/W;在倍增因子为9时,器件暗电流小于10 nA,-3 dB带宽大于10 GHz,其性能满足10 Gbit/s光纤通信应用要求.     

吸收层与倍增层分离的4H-SiC雪崩光电探测器

设计和制备了吸收层和倍增层分开的4H-SiC穿通型雪崩紫外光电探测器.设计器件的倍增层和吸收层厚度分别为0.25和1μm.采用multiple junction termination extension(MJTE)方法减少器件的电流集边效应和器件表面电场.对器件的暗电流、光电流和光谱响应进行了测量.器件在55V的低击穿电压下获得了一个高的增益(＞104);穿通前器件暗电流约为10pA数量级;0V偏压下器件光谱响应的紫外可见比大于103.光谱响应的峰值波长随反向偏压的增大而向短波方向移动,在击穿电压附近光谱响应的峰值波长移到210nm,此波长远远小于在0V时的响应峰值.结果显示器件在紫外光探测中具有优良的性能.     

吸收层与倍增层分离的4H-SiC雪崩光电探测器

设计和制备了吸收层和倍增层分开的4H-SiC穿通型雪崩紫外光电探测器.设计器件的倍增层和吸收层厚度分别为0.25和1μm.采用multiple junction termination extension(MJTE)方法减少器件的电流集边效应和器件表面电场.对器件的暗电流、光电流和光谱响应进行了测量.器件在55V的低击穿电压下获得了一个高的增益(＞104);穿通前器件暗电流约为10pA数量级;0V偏压下器件光谱响应的紫外可见比大于103.光谱响应的峰值波长随反向偏压的增大而向短波方向移动,在击穿电压附近光谱响应的峰值波长移到210nm,此波长远远小于在0V时的响应峰值.结果显示器件在紫外光探测中具有优良的性能.     

基于0.35μm CMOS工艺的APD器件仿真分析

提出了一种基于0.35μm CMOS工艺的、具有p+/n阱二极管结构的雪崩光电二极管(APD),器件引入了p阱保护环结构.采用silvaco软件对CMOS-APD器件的关键性能指标进行了仿真分析.仿真结果表明:p阱保护环的应用,明显降低了击穿电压下pn结边缘电场强度,避免了器件的提前击穿.CMOS APD器件的击穿电压为9.2V,工作电压下响应率为0.65 A/W,最大内部量子效率达到90％以上,响应速度能够达到6.3 GHz,在400～900 nm波长范围内,能够得到很大的响应度.     

AIInGaN／GaN PIN紫外光电探测器的研制

用AlInGaN四元合金代替AlGaN作为PIN探测器的有源层,研制出AlInGaNPIN紫外探测器。详细介绍了该器件的结构设计和制作工艺,并对器件进行了光电性能测试。测试结果表明,器件的正向开启电压约为1．5V,反向击穿电压大于40V;室温-5V偏压下,暗电流为33pA,350nm处峰值响应度为0．163A／W,量子效率为58％。     

Hot-implantation of nitrogen donors into p- type α-SiC and characterization of n+-p junction

N⁺ implantation into p-type a-SiC (6H-SiC, 4H-SiC) epilayers at elevated temperatures was investigated and compared with implantation at room temperature (RT). When the implant dose exceeded 4 × 10₁₅ cm₋₂, a complete amorphous layer was formed in RT implantation and severe damage remained even after post implantation annealing at 1500°C. By employing hot implantation at 500~800°C, the formation of a complete amorphous layer was suppressed and the residual damage after annealing was significantly reduced. For implant doses higher than 10¹⁵ cm⁻², the sheet resistance of implanted layers was much reduced by hot implantation. The lowest sheet resistance of 542Ω/ was obtained by implantation at 500 ~ 800°C with a 4 × 10¹⁵ cm⁻² dose. Characterization of n⁺-p junctions fabricated by N⁺ implantation into p-type epilayers was carried out in detail. The net doping concentration in the region close to the junction showed a linearly graded profile. The forward current was clearly divided into two components of diffusion and recombination. A high breakdown voltage of 615 ∼ 810V, that is almost an ideal value, was obtained, even if the implant dose exceeded 10¹⁵ cm⁻². By employing hot implantation at 800°C, the reverse leakage current was significantly reduced.     

Some properties of ion-implanted p−n junctions in silicon

Diodes have been made by implantation of boron or gallium ions in n-type, and phosphorus ions in p-type silicon. The doses range from 5 × 10¹² to 10¹⁵ ions/cm², and the energies from 20 to 70 keV. In all diodes the reverse current shows a sharp recovery step upon annealing at 500–600°C. The reverse current after this annealing is typically of the order of 1 nA/cm² at 1 V reverse bias. To overcome the problem of low breakdown voltages usually found for implanted junctions, methods have been developed to enlarge the effective radius of curvature at the edge of the implanted junction. In a planar process with oxide masking, breakdown voltages of 150 V for 3 Ωcm or 1500 V for 300 Ωcm silicon are obtained. This is done by implanting the ions through a tapered oxide, where the oxide walls make an angle of only 3–5° with the silicon surface. The junction depth in this case is 0.4 μm.Another method uses a mask, placed free in front of the slice. Slice and mask rotate during implantation. In this way, a breakdown voltage of 2700 V is obtained with 300 Ωcm silicon.     

Characteristics of enhancement/depletion (E/D) gate MOSFET fabricated using ion implantation

The E/D gate MOSFET, which has an enhancement and depletion mode region under the same gate, is fabricated by using ion implantation as a tool for shifting threshold voltage. Threshold voltage, transconductance and drain breakdown voltage are studied as functions of implantation dose up to 12 × 10¹² cm^?2.It is found that, at an appropriate dose, the transconductance of this device is determined solely by the channel length of the enhancement mode region, and is larger than that of a short channel MOSFET with a standard structure but with the same drain breakdown voltage. Moreover, the dependence of threshold voltage on substrate bias measured in this device is found less sensitive to the transconductance than that in the standard short channel MOSFET.     

Avalanche photodiode with sectional InGaAsP/InP charge layer

An InGaAs/InP avalanche photodiode (APD) with a sectional InGaAsP/InP charge layer at the heterointerface between the InGaAs absorption and InP multiplication region has been designed, fabricated and tested. We demonstrate a new APD structure that utilizes the sectional 140 nm thin charge layer and a 500 nm thin multiplication layer. The band diagram, electrical field distribution and current-voltage (I-V) characteristics up to punch-through voltage have been simulated. The fabricated mesa structure photodiode shows responsivity 0.9 A/W at 1310 nm at 20 V and avalanche gain up to 10 near breakdown voltage 36 V. The measured results revealed that the sectional charge layer could be used for control of the electric field profile in the APD structure.     

The effect of argon implantation on the conductivity of boron implanted silicon

Silicon wafers have been implanted with boron (3 × 10¹⁴ or 1 × 10¹⁵ ions cm^?2) and with argon (up to 1 × 10¹⁵ ions cm^?2). The energies were chosen to approximately superimpose the two impurity distributions. After the boron and argon implantations the sheet resistance of each wafer was measured following annealing in nitrogen at temperatures in the range 400–1050°C. The highest dose argon implantation produced an increase in sheet resistance which persisted throughout the entire temperature range. Lower argon doses produced a reduction in sheet resistance for anneal temperatures between 550 and 800°C. The magnitude of the reduction is a function of the boron and argon doses and of the anneal temperatures. The greatest reduction, observed after a 600°C anneal, was by a factor of 5.8. Above 800°C the low dose argon did not affect the sheet resistance.The observed reduction in sheet resistance is expected to lead to an improvement in metal to p-type silicon contacts. A particular application is in the contacts to resistors in fast bipolar logic circuits. As high electrical activity can be obtained at moderate annealing temperatures with combined boron and argon implantations, these implantations can be carried out at a late stage in an integrated circuit process schedule without the danger of additional movement of existing junctions.     

Heterojunction diodes in 3C-SiC/Si system grown by reactive magnetron sputtering: Effects of growth temperature on diode rectification and breakdown

3C-SiC/Si heterojunction diodes were prepared by reactive magnetron sputtering of pure Si in CH₄-Ar discharge on Si(111) substrates kept at temperatures (T_s) ranging from 800 to 1000°C. A good diode rectification process started for films grown at T_s≤900°C. Heterojunction diodes grown at T_s = 850°C showed the best performance with a saturation current density of 2.4 × 10⁻⁴ A cm⁻². Diode reverse breakdown was obtained at a voltage of −110 V. The doping concentration (N_d) of the 3C-SiC films was calculated from 1/C² vs V plot to be 3 × 10¹⁵ cm⁻³. Band offset values obtained were −0.27 and 1.35 eV for the conduction and valence band, respectively. X-ray diffraction analysis revealed the film grown at T_s = 850°C to be single-phase 3C-SiC. The full width at half maximum of the 3C-SiC(111) peak was only 0.25 degree. Cross-sectional transmission electron microscopy showed the film to be highly (111)-oriented with an epitaxial columnar structure of double positioning domain boundaries.     

Al+ and B+ implantations into 6H-SiC epilayers and application to pn junction diodes

Aluminum (Al) and boron (B) ion implantations at room temperature into n-type 6H-SiC epilayers have been investigated. Rutherford backscattering spectroscopy (RBS) channeling measurements revealed larger lattice damage in Al⁺ implantation at a given total implantation dose. A nearly perfect electrical activation ratio (>90%) could be attained by high-temperature annealing at 1600°C for Al⁺ and 1700°C for B⁺ implantations. Mesa pn junction diodes formed by either Al⁺ or B⁺ implantation with a 1×10¹⁴ cm⁻² dose exhibited high blocking voltages of 950∼1070 V, which are 80∼90% of the ideal value predicted for the diode structure. The forward current can clearly be divided into two components of diffusion and recombination currents. B⁺-implanted diodes showed higher breakdown voltage on average but poor forward conduction. Comparison of the performance of Al⁺ and B⁺-implanted diodes is discussed.     

Diffusion of ion-implanted boron impurities into pre-amorphized silicon

Boron ion implantation into pre-amorphized silicon is studied. Pre-amorphization is performed either by F⁺ or Si⁺ implantation prior to B⁺ implantation at 10 keV with 3×10¹⁵ ions/cm². Broadening of the boron profile can be suppressed markedly in the pre-amorphized layers. For instance, the as-implanted depth at a B concentration of 1×10¹⁸ atoms/cm³ decreases from 0.19 to 0.1 μm for implantation into a pre-amorphized layer compared to B implantation into crystalline silicon. After annealing at 950°C, B atoms diffuse much more rapidly in the pre-amorphized layers than in the crystalline silicon case. Nevertheless, shallower junctions are obtained with the use of pre-amorphization. For dual F⁺ and B⁺ implantation at F⁺ doses above 1×10¹⁵ F⁺/cm², fluorine is found to segregate to the peak of the boron profile during annealing. Fluorine is also trapped at the peak of the as-implanted fluorine profile peak and near the amorphous–crystalline interface. The effects of fluorine dose and anneal temperature on the F precipitation are described and compared to results for BF⁺₂ implants.     

Influence of irradiation with swift heavy ions on multilayer Si/SiO2 heterostructures

The influence of Xe ions with an energy of 167 MeV and a dose in the range 10¹²-3 × 10¹³ cm^?2 on heterostructures consisting of six pairs of Si/SiO₂ layers with the thicknesses ～8 and ～10 nm, correspondingly, is studied. As follows from electron microscopy data, the irradiation breaks down the integrity of the layers. At the same time, Raman studies give evidence for the enhancement of scattering in amorphous silicon. In addition, a yellow-orange band inherent to small-size Si clusters released from SiO₂ appears in the photoluminescence spectra. Annealing at 800°C recovers the SiO₂ network, whereas annealing at 1100°C brings about the appearance of a more intense photoluminescence peak at ～780 nm typical of Si nanocrystals. The 780-nm-peak intensity increases, as the irradiation dose is increased. It is thought that irradiation produces nuclei, which promote Si-nanocrystal formation upon subsequent annealing. The processes occur within the tracks due to strong heating because of ionization losses of the ions.