Molecule Charge Transfer Doping for p‐Channel Solution‐Processed Copper Oxide Transistors

The doping of semiconductors plays a critical role in improving the performance of modern electronic devices by precisely controlling the charge carrier density. However, the absence of a stable doping method for p‐type oxide semiconductors has severely restricted the development of metal oxide‐based transparent p–n junctions and complementary circuits. Here, an efficient and stable doping process for p‐type oxide semiconductors by using molecule charge transfer doping with tetrafluoro‐tetracyanoquinodimethane (F₄TCNQ) is reported. The selections of a suitable dopant and geometry play a crucial role in the charge‐transfer doping effect. The insertion of a F₄TCNQ thin dopant film (2–7 nm) between a Au source‐drain electrode and solution‐processed p‐type copper oxide (Cu_xO) film in bottom‐gate top‐contact thin‐film transistors (TFTs) provides a mobility enhancement of over 20‐fold with the desired threshold voltage adjustment. By combining doped p‐type Cu_xO and n‐type indium gallium zinc oxide TFTs, a solution‐processed transparent complementary metal‐oxide semiconductor inverter is demonstrated with a high gain voltage of 50. This novel p‐doping method is expected to accelerate the development of high‐performance and reliable p‐channel oxide transistors and has the potential for widespread applications.     

Impact of Layer Configuration and Doping on Electron Transport and Bias Stability in Heterojunction and Superlattice Metal Oxide Transistors

The astonishing recent progress in the field of metal oxide thin‐film transistors (TFTs) and their debut in commercial displays is accomplished using vacuum‐processed multicomponent oxide semiconductors. However, emulating this success with their solution‐processable counterparts poses numerous scientific challenges. Here, the development of high mobility n‐channel TFTs based on ultrathin (<10 nm) alternating layers of In₂O₃ and ZnO that are sequentially deposited to form heterojunction and superlattice channels is reported. The resulting TFTs exhibit high electron saturation mobility (13 cm² V^?1 s^?1), excellent current on/off ratios (>10⁸) with nearly zero onset voltages and hysteresis‐free operation despite the low temperature processing (≤200 °C). The enhanced performance is attributed to the formation of a quasi‐2D electron gas‐like system at the In₂O₃/ZnO heterointerface due to the conduction band offset. It is shown that altering the oxide deposition sequence has an adverse effect on electron transport due to formation of trap states. Optimized multilayer TFTs are shown to exhibit improved bias‐stress stability compared to single‐layer TFTs. Modulating the electron concentration within the superlattice channel via selective n‐doping of the ZnO interlayers leads to almost 100% saturation mobility increase (≈25 cm² V^?1 s^?1) even when the TFTs are fabricated on flexible plastic substrates.     

Doping Indium Oxide Films with Amino-Polymers of Varying Nitrogen Content Markedly Affects Charge Transport and Mechanical Flexibility

Here, correlations between polymer structure and charge transport in solution-processed indium oxide, In₂O₃:polymer blend flexible thin film transistors (TFTs) are investigated using four polymers having electron-donating amine functionalities (polyethyleneimine (PEI), poly(allylamine), polyethyleneimine ethoxylated (PEIE), and PVP-NH₂ (PVP; poly(4-vinylphenol)), and two PEI-PEIE mixtures) with varied atomic amine nitrogen content (N%) of 12.6, 9.1, 6.9, 2.6, respectively. These amino-polymers influence the semiconducting oxide film TFT electron mobilities via a delicate interplay of electron transfer/doping, charge generation/trap-filling, film morphological/microstructural variations, which depend on the polymer structure, thermal stability, and N%, as well as the polymer content of the In₂O₃ precursor and the carbon residue content in In₂O₃. Thus, increasing the N% from 0.0% in the control PVP to 12.6% in PEI increases the electron doping capacity, the polymer content of the blend formulation, and the blend TFT field-effect mobility. Optimal polymer incorporation invariably enhances charge transport by as much as ≈2×, leading to a maximum carrier mobility of 8.47 ± 0.73 cm² V⁻¹ s⁻¹ on rigid Si/SiO_x substrates and a remarkable 31.24 ± 0.41 cm² V⁻¹ s⁻¹ on mechanically flexible polyimide/Au/F:AlO_x substrates with Al contacts. Furthermore, all of the polymers equally enhance the mechanical durability of the corresponding In₂O₃:polymer blend TFTs with respect to mechanical stress.     

非晶氧化物半导体薄膜晶体管沟道层的研究进展

薄膜晶体管(TFT)作为开关元件广泛应用于平板显示领域,沟道层材料的选择直接影响了TFT的性能.近年来,基于非晶氧化物半导体(AOS)沟道层材料的TFT已成为具有潜力替代传统硅材料(非晶硅或多晶硅)沟道层TFT的新一代技术,有望应用于超大屏显示、3D显示、柔性显示以及透明显示等新一代显示领域.综述了AOS TFT沟道层的研究进展,重点介绍了AOS TFT用AOS沟道层在材料体系、成膜技术、薄膜的后续处理工艺、材料体系中各元素含量以及掺杂等方面的研究成果,并分析了AOS沟道层对AOS TFT性能的影响以及存在的问题,对AOS TFT的未来发展趋势进行了预测和展望.     

金属氧化物IGZO薄膜晶体管的最新研究进展

最近几年,金属氧化物IGZO薄膜晶体管成为研究热点,具有高迁移率、稳定性好、制作工艺简单等优点,备受人们关注。文章综述了制作金属氧化物IGZO晶体管的结构及其优缺点,总结了影响金属氧化物IGZO薄膜晶体管性能的因素,并提出了制作高性能金属氧化物IGZO薄膜晶体管的方法。     

Top Interface Engineering of Flexible Oxide Thin‐Film Transistors by Splitting Active Layer

The effect of active layer (amorphous indium–gallium–zinc oxide, a‐IGZO) splitting on the performances of back‐channel‐etched (BCE) and etch‐stopper (ES) thin‐film transistors (TFTs) on polyimide substrate is studied. While the performance of BCE TFT is independent of active layer splitting, the performance of ES TFT is improved significantly by splitting the active layer into 2–4 µm width along the channel. The saturation mobility is enhanced from 24.3 to 76.8 cm² V^?1 s^?1 and this improvement is confirmed by the operation of a ring oscillator made of the split TFTs also. X‐ray photoelectron spectroscopy (XPS) analysis of the split a‐IGZO indicates the incorporation of F at the island interface and thus improves the top interface quality, leading to a significant improvement of the top channel TFT mobility from 0.25 to 24.22 cm² V^?1 s^?1. This improvement is correlated with bonding of In with F at the top interface according to XPS results. The bias stability, hysteresis, and mechanical stability of the ES a‐IGZO TFT are also remarkably improved by splitting a‐IGZO active layer.     

Highly Robust Bendable Oxide Thin‐Film Transistors on Polyimide Substrates via Mesh and Strip Patterning of Device Layers

Advancement in thin‐film transistor (TFT) technologies has extended to applications that can withstand extreme bending or folding. The changes of the performances of amorphous‐indium‐gallium‐zinc‐oxide (a‐IGZO) TFTs on polyimide substrate after application of extreme mechanical bending strain are studied. The TFT designs include mesh and strip patterned source/drain metal lines as well as strip patterned a‐IGZO semiconductor layer. The robustness of the a‐IGZO TFTs with the strain of 2.17% corresponding to the radius of 0.32 mm is tested and no crack generation even after 60 000 bending cycles is found. The split of source/drain electrodes and semiconductor layer can improve the mechanical bending stability of the TFTs. This can be possible by using conventional TFT manufacturing process so that this technology can be easily applied to build robust TFT array for foldable displays.     

底栅和顶栅结构全透明氧化锌薄膜晶体管的制备

报道了制备在50mm石英玻璃衬底上的透明氧化锌薄膜晶体管(ZnO-TFT),采用了底栅和顶栅两种结构进行比较.ZnO沟道层由射频磁控溅射方法制备,SiO2薄膜作为栅绝缘层.结果发现底栅结构的ZnO-TFT具有较好的电学性质,该器件工作在n沟道增强模式,具有较好的夹断效应和饱和特性,其场效应迁移率、阈值电压和电流开关比分别为18.4cm2/(V·s),-0.5V和104.顶栅结构的ZnO-TFT则工作在n沟道耗尽模式,没有明显的饱和特征.不同结构ZnO-TFT电学性质的差别可能是由于不同的ZnO/SiO2界面特性所致.两种结构的ZnO-TFT在可见光波段都有很高的光学透过率.     

底栅和顶栅结构全透明氧化锌薄膜晶体管的制备

报道了制备在50mm石英玻璃衬底上的透明氧化锌薄膜晶体管(ZnO-TFT),采用了底栅和顶栅两种结构进行比较.ZnO沟道层由射频磁控溅射方法制备,SiO2薄膜作为栅绝缘层.结果发现底栅结构的ZnO-TFT具有较好的电学性质,该器件工作在n沟道增强模式,具有较好的夹断效应和饱和特性,其场效应迁移率、阈值电压和电流开关比分别为18.4cm2/(V·s),-0.5V和104.顶栅结构的ZnO-TFT则工作在n沟道耗尽模式,没有明显的饱和特征.不同结构ZnO-TFT电学性质的差别可能是由于不同的ZnO/SiO2界面特性所致.两种结构的ZnO-TFT在可见光波段都有很高的光学透过率.     

Large‐Area Schottky Barrier Transistors Based on Vertically Stacked Graphene–Metal Oxide Heterostructures

The fabrication of all‐transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene–metal oxide–metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution‐processed indium‐gallium‐zinc‐oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene–IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene–IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm^?2) and on–off current ratios (>10⁴) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low‐power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large‐area, and room‐temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene‐based future electronics.     

非晶铟镓锌氧化物薄膜晶体管的制备及其光敏特性研究

基于射频磁控溅射法制备了以非晶铟镓锌氧化物(a-IGZO)作为有源层的底栅顶接触式薄膜场效应晶体管(Thin Film Transistor,TFT),其长/宽比为300μm/100μm。研究了该器件在无激光和在三种不同波长激光照射下的光敏特性。实验表明,器件在波长分别为660、450和405nm三种激光照射下的阈值电压V_th分别为4.2、2.5和0V,均低于无激光时的4.3V,且器件的阈值电压随激光波长减小单调降低,此外,随着激光波长的下降,“明/暗”电流比K由0.54上升到8.06(在VGS=6V且VDS=5V条件下),光敏响应度R由0.33μA/mW上升到4.88μA/mW,可见激光波长越短,可获得更强的光电效应,光灵敏度也更高,该效应表明该器件在光电探测等领域具有广阔的应用前景。     

Stretchable,Transparent Zinc Oxide Thin Film Transistors

Stretchable and transparent thin film transistors (TFTs) with intrisically brittle oxide semiconductors are built using a wavy structural configuration that can provide high flexibility and stretchability. After device fabrication procedures including high temperature annealing, the oxide semiconductor‐based TFT arrays can be transferred directly to plastic or rubber substrates, without an additional device process, using transfer printing methods. This procedure can avoid some of the thermal degradation problems associated with plastic or rubber substrates by separating them from the annealing procedure needed to improve the device performance. These design and fabrication methods offer the possibility of developing a new format of stretchable electronics.     

Solution‐Deposited Zinc Oxide and Zinc Oxide/Pentacene Bilayer Transistors: High Mobility n‐Channel,Ambipolar, and Nonvolatile Devices

A solution processed n‐channel zinc oxide (ZnO) field effect transistor (FET) was fabricated by simple dip coating and subsequent heat treatment of a zinc acetate film. The field effect mobility of electrons depends on ZnO grain size, controlled by changing the number of coatings and zinc acetate solution concentration. The highest electron mobility achieved by this method is 7.2 cm² V^?1 s^?1 with On/Off ratio of 70. This electron mobility is higher than for the most recently reported solution processed ZnO transistor. We also fabricated bilayer transistors where the first layer is ZnO, and the second layer is pentacene, a p‐channel organic which is deposited by thermal evaporation. By changing the ZnO grain size (or thickness) this type of bilayer transistor shows p‐channel, ambipolar and n‐channel behavior. For the ambipolar transistor, well balanced electron and hole mobilities are 7.6 × 10^?3 and 6.3 × 10^?3 cm² V^?1 s^?1 respectively. When the ZnO layer is very thin, the transistor shows p‐channel behavior with very high reversible hysteresis. The nonvolatile tuning function of this transistor was investigated.     

氧化锌薄膜生长与ZnO基薄膜晶体管制备

通过金属有机化学气相沉积(MOCVD)方法生长ZnO薄膜.XRD测试显示出(002)晶面的强衍射峰,表明生长的ZnO 薄膜是主度的c轴取向.基于 ZnO 薄膜基础,我们制备了 ZnO 基薄膜晶体管.     

铝的结晶复合阳极氧化膜Ⅰ．水合氧化膜存在下的阳极氧化膜的形成

铝箔先与热水反应，再进行阳极氧化，可形成结晶复合阳极氧化膜。介绍这种膜的形成机理以及膜的结构。这种膜适用于制造中、高压铝电解电容器     

铝的结晶复合阳极氧化膜Ⅱ．热氧化膜存在下阳极氧化膜的形成

在低压铝电解电容器生产中，铝箔常先在高温（４５０℃以上）短时间加热，形成一薄层热氧化膜，再进行阳极氧化，可形成结晶复合氧化膜，使比容增加，形成电量降低。介绍了有关这种膜的形成机理、结构及应用实例。