Tunable linear CMOS current mirror

Based on triode MOSFETs as tunable devices, a tunable linear current mirror is proposed, whose current gain is tunable over a wide range. Simulations show that, total harmonic distortion on the output current is within 2% for a tuning range of almost five octaves. Although the structure is in the form of an active-input current mirror, keeping the tuned MOSFETs in triode region significantly relaxes the stability problems of an active-input current mirror. This issue is revealed by theoretical analyses and further simulations are included for demonstration. An application example is also supplied.     

Low power high output impedance high bandwidth QFGMOS current mirror

Current mirror is a basic block of any mixed-signal circuit for example in an analog-to-digital converter. Its precise performance is the key requirement for analog circuits where offset is a measure issue. The key parameter which defines the performance of current mirror is its input/output impedance, input swing, and bandwidth. In this paper, a low power design of current mirror using quasi-floating gate MOS transistor is presented. The proposed current mirror boosts its output impedance in range of giga-ohm through use of regulated cascode structure followed by super-cascode. Another improvement is done in reduced input compliance voltage limits with the help of level shifter. The proposed current mirror operates well for input current range 0–700 $\mathrm{\mu }A$ with an input and output impedance of 160 $\Omega$ and 8.55 $\mathrm{G}\Omega$ respectively and high bandwidth of 4.05 $\mathrm{GHz}$. The total power consumption of the proposed current mirror is about 0.84 mW. The low power consumption with enhanced output impedance and bandwidth suits proposed current mirror for various high-speed analog designs. Performance of the presented current mirror circuit is verified using HSpice simulations on 0.18 $\mathrm{\mu }m$ mixed-mode twill-well technology at a supply voltage of ±0.5 V.     

High-gain wideband error amplifier topology for DC-DC buck converter switching at 20 MHz

A wideband error amplifier topology with increased DC-gain and reduced quiescent current consumption is presented. The reduction in quiescent current consumption is achieved by lowering the output stage current, which helps to increase the output impedance and hence the overall DC-gain of the amplifier. Simulation results show that the proposed topology has 60 dB DC gain and 540 MHz unity gain bandwidth with 450 muA quiescent current consumption. The experimental result of the loop-gain of a high-frequency (20 MHz) DC-DC buck converter that utilises the proposed topology also confirms the simulation results.     

A Novel Ultra-Low-Power Low-Voltage Femto-Ampère Current Mirror

A novel femto-ampère current mirror/negative impedance converter (FACMNIC) is proposed in this paper. It is shown that extremely large output impedance approaching infinite value and also negative impedances of different values can be remarkably obtained just by adjusting the built-in positive feedback loop gain. Operation of this circuit is based on two approaches called here as source voltage shifting and channel conduction manipulation. Although those two techniques are briefly explained in this paper but due to their strong action worth extensively studying and exercising. Deliberately having been composed of both current mirror and negative impedance converter capabilities in the same structure causes the proposed circuit to have a simple structure prohibiting large chip area consumption while favorably preserves following unique features. At 0.9 volt power supply it produces very small currents down to 4.6 fA and consumes an ultra-low power of 86 nW, thus it is the best choice for Ultra-Low-Power Low-Voltage (ULPLV) applications. It also exhibits the outstanding high output impedance of 400 GΩ when it is optimized for best performance operation, otherwise it can be adjusted so as to produce very high output impedances (approaching infinite values). Due to the inclusion of positive feedback, Monte Carlo analyses are performed to ensure the stability and robustness of the circuit’s operation in the presence of the PVT (process, voltage and temperature) variations. Simulation results in TSMC 0.18 μm CMOS technology with HSPICE are presented to demonstrate the validation of the proposed current mirror.     

A very high performance self-biased cascode current mirror for CMOS technology

This paper presents a novel high performance self-biased cascode current mirror (CM) for CMOS technology. The proposed circuit shows a resistance compensated high bandwidth CM operating at low voltages. This circuit uses super cascode configuration to obtain high output impedance required for high performance of CM. Active implementation of passive resistances of the proposed circuit is shown. The simulations of proposed CM are carried out by Mentor Graphics Eldospice based on TSMC 0.18 μm CMOS technology, for input current range of 0–500 μA. A bandwidth of 2.26 GHz, input and output resistances of 679 Ω and 482 MΩ respectively, are obtained with a single supply voltage of ?1 V.     

Low Voltage High Output Impedance Bulk-Driven Quasi-Floating Gate Self-Biased High-Swing Cascode Current Mirror

A low voltage self-biased high-swing cascode current mirror using bulk-driven quasi-floating gate MOSFET is proposed in this paper. The proposed current mirror bandwidth and especially the output impedance show a significant improvement compared to prior arts. The current mirror presented is designed using bulk-driven and bulk-driven quasi-floating gate N-channel MOS transistors, which helped it to operate at very low supply voltage of \({\pm }0.2\,\hbox {V}\). To achieve high output resistance, the current mirror uses regulated cascode stage followed by super cascode architecture. The small-signal analysis carried out proves the improvement achieved by proposed current mirror. The current mirror circuit operates well for input current ranging from 0 to \(250\,{\upmu }\mathrm{A}\) with good linearity and shows the bandwidth of 285 MHz. The input and output resistances are found as \(240\,\Omega \) and \(19.5\,\hbox {G}\Omega \), respectively. Further, the THD analysis and Monte Carlo simulations carried prove the robustness of proposed current mirror. The complete analysis is done using HSpice on UMC \(0.18\,\upmu \mathrm{m}\) technology.     

一种低压CMOS衬底驱动共源共栅电流镜

基于PMOS衬底驱动技术设计了低压PMOS衬底驱动CMOS共源共栅电流镜电路(BDCCM),并讨论分析了其输入阻抗、输出阻抗和频率特性。BDCCM的最低输入压降要求只有0.4V,但是其输入输出线性度和频率带宽要比传统的共源共栅电流镜低,是低频低压CMOS模拟集成电路设计的新型高性能共源共栅电流镜。     

A bulk-driven quasi-floating gate FVF current mirror for low voltage,low power applications

This paper introduces a new low-voltage, low-power FVF current mirror circuit. The bulk-driven (BD) technique is employed to achieve extended input voltage swing and low supply voltage. Besides, the quasi-floating gate (QFG) is used to achieve high frequency performance. The merging of (BD) and (QFG) appear as a good and attractive solution to improve the circuit performance with reduced supply voltage. Benefiting from the interesting properties of (BD-QFG) MOSFET (MOST) technique, the proposed FVF current mirror circuit exhibits superior performance compared to other previously reported works. The workability of the proposed circuit has been verified through ELDO simulator based on a 0.18 μm USMC process. It achieves an enhanced bandwidth (2.7 GHz), low power consumption (79.33 μW), a low input impedance (130 Ω), and high output impedance (9.5 G Ω) from a low supply voltage (0.8 V). Monte Carlo simulation is also carried out, which proves the robust performance of the proposed circuit against mismatches. An application of the proposed current mirror is presented in the form of the current comparator to ensure the workability of the proposed BD-QFG current mirror.     

CMOS current mirrors with reduced input and output voltagerequirements

A CMOS current mirror with lower than V/sub DS(sat/) input voltage requirement is presented. It is shown that the structure can be modified to provide cascode-type output resistance for output voltages even lower than 2V/sub DS(sat/). The topology of the proposed current mirror allows low distortion operation from a single 1.5 V supply, which makes it attractive for low-voltage applications     

Insensitive current/voltage-mode filters using FTFNs

A new configuration for realising insensitive current/voltage-mode filters using two four-terminal floating nullors (FTFNs) is presented. It can provide the curren/voltage-mode filters with reduced sensitivities. Moreover, the current-mode filters can have high output impedance and only grounded capacitors. The proposed universal voltage-mode filter with dual outputs can realise lowpass, bandpass, highpass, notch and allpass filtering functions. Simulation results are given to verify the theoretical analysis     

BJT-BJT, FET-BJT, and FET-FET

Cascode amplifiers have three configurations: bipolar junction transistor-bipolar junction transistor (BJT-BJT), field-effect transistor (FET)-BJT, and FET-FET. Although the high-frequency behaviors of these configurations are not the same in practice, in most textbooks only the BJT-BJT configuration is analyzed. High-frequency response of the BJT-BJT cascode amplifier is limited by three factors: 1) the source impedance or the output impedance of the previous stage; 2) the output impedance or the load of the amplifier; and 3) the dc bias current of the amplifier. In order to cope with these limitations, this article presents a modified cascode amplifier. In this new configuration, only a single transistor is added to the elements of each of the aforementioned cascode amplifiers. Corresponding to each configuration, a modified configuration results in greater or approximately equal gain and higher bandwidth.     

A low-voltage low-power instrumentation amplifier based on supply current sensing technique

In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique.     

新型激光驱动可变形反射镜的模型、研制及特性

介绍了一种新型的利用激光驱动的可变形反射镜.它包括三个部分:以聚脂薄膜为主体做成的2μm厚的镜面,支撑镜面的6μm高栅格状的支撑柱,由光敏材料砷化镓(GaAs)构成的感光底层.同时在镜面与感光底层之间施加偏置的高频交流电压.当感光底层背面被激光照亮时,GaAs中载流子的变化导致镜面与感光底层之间电阻的重新分布,从而镜面与感光底层之间电压发生变化,因此在静电力的作用下镜面将会发生相应的形变.文中分析了此反射镜工作的理论模型,介绍了此装置的制作工艺,并通过实验验证了偏置电压幅值、交流电压频率等参数对可变形反射镜性能的影响.     

High frequency flipped voltage follower with improved performance and its application

In this paper a wideband flipped voltage follower (FVF) with low output impedance at high frequency has been proposed. Inductive-peaking-based bandwidth extension technique is employed in the FVF cell. The small signal high-frequency analysis of both conventional and proposed FVF has been done. It is shown in analytical derivation of the proposed FVF that by adding an inductive element in the feedback path, the bandwidth is enhanced. Simulation results show that bandwidth extension ratio (BWER) of proposed FVF is about 2.00, without extra dc power dissipation. A wideband low voltage current mirror has been developed by using proposed FVF in place of conventional FVF and by doing so, BWER of 2.98 has been achieved. The performances of circuits are verified in TSMC 0.18 μm CMOS, BSIM3 and Level 49 technology with 1.5 V power supply and by using Spectre simulator of Cadence.     

Cascadable current-mode single CCII biquads

A new configuration for the realisation of current-mode single-CCII-biquad (SCB) filters with high output impedance is presented. It can synthesise lowpass, bandpass, highpass, notch, and allpass filtering functions with a single CCII connected to five passive RC one-port elements. The quality factor, Q, and the central frequency, omega /sub 0/, of the proposed SCBs are insensitive to the current tracking error of the CCII. These SCBs have the advantages of low passive sensitivities and independently adjustable omega /sub 0/ or Q.<>     

Very low input impedance low power current mirror

In this paper a novel low input impedance current mirror/source is proposed. The principle of its operation compared to that of the simple current mirror is discussed. Also are given the comparative simulation results with HSPICE in TSMC 0.18 μm CMOS which verify the theoretical formulation and operation of the proposed structure. Simulation results show an input resistance for the proposed current mirror about 0.006 Ω. This is 4 × 10⁵ times lower than that of the simple one while both working with 1.5 V supply and 50 μA bias current. It consumes only 161 μW and exhibits an excellent current error value of Zero at 55 μA which remains below 0.6% up to 100 μA. Favorably its minimum output voltage is reduced to 0.2 V.     

New CMOS linear transconductor

A new transconductor is proposed which uses a bias feedback technique and has a simple configuration and a good high-frequency performance. The proposed transconductor is tunable by adjusting the bias current, and suitable for application to highly linear continuous-time filters. Experimental results show that the total harmonic distortion (THD) of the output current is less than 1% for the differential/single-ended input signals of up to 6.0 V/4.3 V (peak-to-peak) when the supply voltages are +or-5 V.<>     

Power voltage current convertor using quasi complementary MOSFET current mirrors

A voltage current convertor is described having a quasi complementary class AB architecture that is particularly suited to implementation using discrete power MOSFETs. High-voltage mirror designs are presented, enabling the construction of sources with kilovolt compliance range, tens of watts of output power and greater than 100 kHz bandwidth. GΩ output impedance and distortion below 1% can be obtained with no trimming or transistor matching.     

一个65nm GP CMOS工艺0.06mm2 1.0V 2.5mW 10bit 250MS/s 电流舵数模转换器

A10 bit 250 MS/s current-steering digital-to-analog converter is presented. Only standard Vv core de- vices are available for the sake of simplicity and low cost. In order to meet the INL performance, a Monte Carlo model is built to analyze the impact of mismatch on integral nonlinearity （INL） yield with both end-point line and best-fit line. A formula is derived for the relationship oflNL and output impedance. The relation of dynamic range and output impedance is also discussed. The double eentroid layout is adopted for the current source array in order to mitigate the effect of electrical, process, and temperature gradient. An adapted current mirror is used to over- come the gate leakage of the current source array, which cannot be ignored in the 65 nm GP CMOS process. The digital-to-analog converter occupies 0.06 mm2, and consumes 2.5 mW from a single 1.0 V supply at 250 MS/s.     

一种电压控制CMOS电调谐第二代电流传输器(ECCⅡ)

提出了一种电压跟随能力强、功耗低、调节范围大的CMOS电调谐第二代电流传输器(ECCⅡ),通过引入对称的CMOS电流舵电路,保证了电流传输精度,电流增益连续可调,调节因子-2≤K≤2,同时避免了电流镜的过多使用,减小了电流损耗.采用电压调控方式,增大了电流输入范围;将电流输入端和电流加减电路隔离,保证了精确的电压跟随能力.采用TSMC 0.35μm工艺参数,在±1.5V电源供电的条件下对电路进行了Hspice模拟,VY/VX,和IZ/IX的-3 dB带宽分别为83.5 MHz和136 MHz,功耗为1.7515 mW.该电路在可调谐连续时间电流模式滤波器的设计中有广泛的应用前景.