改进模拟退火遗传算法的3D NoC低功耗映射

功耗优化是NoC设计的重要部分,针对将IP (intellectual property)核合理映射NoC的问题,提出一种初始种群优化的模拟退火遗传映射算法.首先以功耗优化为主要目标,通过对初始种群选取方法进行改进来获取功耗更低的映射方案,并针对遗传算法局部最优问题,在遗传算法交叉操作阶段结合模拟退火算法,得到全局最优方案.实验在Windows系统下采用C++语言实现,结果显示,与传统的遗传算法相比,该算法具有较好的收敛性,能快速搜索到较优解,在124个IP核的情况下,采用改进的模拟退火遗传算法进行映射产生的平均功耗比使用遗传算法时降低了32.0%.     

面向实时复杂系统的基于片上网络多核平台的映射技术研究

为了提高通信与信号处理系统向片上网络(NoC)平台映射的性能,提出一种面向系统能耗和响应时间的新型NoC映射模型。该模型改进了传统映射算法中能耗的计算方法,同时考虑交换网络的能耗和处理节点的能耗,采用多对多映射技术,在带宽约束的基础上,结合复杂通信系统特有的注入率、迭代边界等约束,同时优化能耗和响应时间,提高了映射算法的实用性。仿真实例证明,该映射模型得到的优化方案能降低约15%的系统能耗,能够获得综合的最优性能。     

基于报文检测的快速自适应NoC容错路由算法

传统的自适应片上网络(NoC)容错路由算法采用一步一比较的方式来确定最优端口, 未能有效降低传输延迟。根据数据包在2D Mesh NoC前若干连续的跳数内最优端口固定的特点, 提出了一种基于报文检测的快速(FPIB)自适应容错路由算法。算法采用跳步比较的方式来减少数据包的路由时间, 并使用模糊优先级策略来进行容错路由计算。实验结果表明, 与uLBDR容错路由算法相比, 该算法能有效地降低平均延迟, 且实现算法的硬件开销更低。     

面向时延的NoC映射技术研究

针对NoC任务映射问题中时延难以预测和启发式算法效率低的问题,提出一个时延改进模型和近邻随机遗传算法。该模型从宏观的链路负载分布和单个节点的排队时延两方面来构建NoC映射的时延模型,通过引入时延因子、权重系数来刻画不同映射方案对时延性能的影响,避免了NoC通信时延精确建模的难题。提出近邻随机思想来构建遗传算法的初始种群,并且运用该算法实现了面向时延的NoC映射,在达到全局最优的情况下,比经典遗传算法效率提升将近20%。实验结果表明,该算法优于现有的经典遗传算法和随机映射方案。     

基于路由器解析式模型的NoC网络性能分析方法

建立一种高效的片上网络(NoC)性能分析方法对NoC早期的系统设计分析具有重要的指导意义.首先从NoC路由器工作原理出发,对报文传输中的各种阻塞现象进行分析,建立了基于M/G/1/N排队系统的路由器模型;然后提出NoC网络性能分析算法,并且给出了传输延迟、饱和吞吐率等参数的解析表达式.与时钟精度仿真结果比较表明,该方法分析误差约为6.9%,但分析效率提高了约200倍.该方法适用于指导程序NoC拓扑映射,在获取最优映射方案同时,可有效地挖掘网络通信瓶颈.     

异构多核协作系统的混沌离散粒子群NoC映射算法

针对异构多核片上网络(NoO的任务映射问题,根据IP核的选择以及IP核向NoC平台中位置映射的两个阶段的不同特点,分别提出能耗和延时的粗略估算模型和精确计算模型。为避免离散空间搜索解落入局部最优,设计了混沌扰动机制。提出了带混沌扰动机制的改进型离散粒子群优化算法,以搜索能耗和延时优化的多目标NoC映射方案,该算法比传统优化算法在能耗和延时上有显著的性能提高。     

基于云自适应遗传算法的NoC映射研究

NoC映射是NoC设计中的重要步骤,映射结果的优劣对NoC的QoS约束和通信功耗有着很大的影响。提出一种采用云自适应遗传算法实现NoC映射的方案,该算法利用云模型对传统遗传算法加以改进,以此新方法自动调整遗传算法过程中的交叉概率和变异概率,从而达到优化遗传算法的目的。结合NoC映射中的具体问题,在功耗和延时约束的限制条件下,建立了延时约束下的NoC映射功耗数学模型。实验表明,该方法在NoC映射中取得了良好的效果,降低了通信功耗。     

面向测试优化的片上网络映射算法

针对复杂片上系统(SoC)芯片的片上网络(NoC）映射方案未考虑测试需求的问题,提出了一种面向测试优化的NoC映射算法,兼顾了可测性的提升和映射开销的最小化。该映射方案首先依据特定的测试结构,使用划分算法进行片上系统所有IP核的测试分组,其优化目标为测试时间最短;之后,再基于分组内IP核之间的通信量,应用遗传算法实现NoC映射,其优化目标是在测试优化的基础上实现映射开销最小。通过多个ITC'02测试基准电路进行的实验结果表明:应用该方案后,测试时间平均减少12.67%;与随机任务映射相比,映射代价平均减少24.5%。     

片上网络映射问题的改进禁忌搜索算法

为求解通信时延受约束的低能耗片上网络(NoC)映射问题,提出一种改进禁忌搜索算法.该算法由局部搜索和精英重组2个步骤经过多次迭代完成,局部搜索采用简化的robust tabu search (RoTS),精英重组步骤选用COHX交叉操作.实验结果表明:文中算法与RoTS相比具有优化性能好、搜索空间小的优点,映射结果比分支限界法平均节能16.1%,适于求解大规模NoC映射问题.     

基于蚁群优化算法的NoC映射

功耗问题正逐渐成为NoC领域的研究热点,很多研究人员都在研究NoC功耗最小化的设计技术。文章采用一种有效的蚁群优化算法实现了NoC映射：在自动映射处理单元的同时,尽可能地减少了系统的通讯功耗。实验结果表明采用蚁群优化算法可以很快地收敛;针对不同的应用,可以减少25％-70％通讯功耗。     

Performance-driven assignment and mapping for reliable networks-on-chips

Network-on-chip （NoC） communication architectures present promising solutions for scalable communication requests in large system-on-chip （SoC） designs. Intellectual property （IP） core assignment and mapping are two key steps in NoC design, significantly affecting the quality of NoC systems. Both are NP-hard problems, so it is necessary to apply intelligent algorithms. In this paper, we propose improved intelligent algorithms for NoC assignment and mapping to overcome the draw-backs of traditional intelligent algorithms. The aim of our proposed algorithms is to minimize power consumption, time, area, and load balance. This work involves multiple conflicting objectives, so we combine multiple objective optimization with intelligent algorithms. In addition, we design a fault-tolerant routing algorithm and take account of reliability using comprehensive performance indices. The proposed algorithms were implemented on embedded system synthesis benchmarks suite （E3S）. Experimental results show the improved algorithms achieve good performance in NoC designs, with high reliability.     

基于Prim初始种群选取优化遗传算法的三维片上网络低功耗映射

针对将计算任务合理地映射到三维片上网络（NoC）的问题,提出了一种基于遗传算法（GA）的改进算法。GA具有快速随机的搜索能力,Prim算法可在加权连通图内得到最小生成树,改进算法结合了两种算法的优势,将计算任务合理地分配到各个网络节点,对于优化三维片上网络功耗和散热等问题具有很高的效率。通过仿真实验,对所提出的基于Prim算法的改进GA与基本GA的3D NoC映射算法进行了对比,仿真结果显示,基于Prim算法的改进GA平均功耗更低,从总体趋势来看,处理单元数量的增加与功耗降低幅度成正相关,在101个处理单元情况下,平均功耗比基本GA降低32%。     

Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip

3-D Networks-on-Chip(NoC) emerge as a potent solution to address both the interconnection and design complexity problems facing future Multiprocessor System-on-Chips(MPSoCs).Effective run-time mapping on such 3-D NoC-based MPSoCs can be quite challenging,as the arrival order and task graphs of the target applications are typically not known a priori,which can be further complicated by stringent energy requirements for NoC systems.This paper thus presents an energy-aware run-time incremental mapping algorithm(ERIM) for 3-D NoC which can minimize the energy consumption due to the data communications among processor cores,while reducing the fragmentation effect on the incoming applications to be mapped,and simultaneously satisfying the thermal constraints imposed on each incoming application.Specifically,incoming applications are mapped to cuboid tile regions for lower energy consumption of communication and the minimal routing.Fragment tiles due to system fragmentation can be gleaned for better resource utilization.Extensive experiments have been conducted to evaluate the performance of the proposed algorithm ERIM,and the results are compared against the optimal mapping algorithm(branch-and-bound) and two heuristic algorithms(TB and TL).The experiments show that ERIM outperforms TB and TL methods with significant energy saving(more than 10%),much reduced average response time,and improved system utilization.     

拓扑结构感知的片上网络体系结构应用映射与优化

应用映射是片上网络体系结构研究的关键问题之一,映射结果的好坏会极大地影响体系结构的性能。现有的应用映射方法大多基于特定的网络结构,如2d-mesh、2d-torus等,研究NoC性能或功耗约束的应用映射与优化方法。本文提出了一种拓扑结构感知的基于高层代码转换的片上网络应用映射与优化方法。该方法采用多面体模型对应用的核心循环进行自动并行和局部性优化,并将网络拓扑结构抽象成带权重的有向图,使用该有向图对任务流图进行覆盖,以提高任务的并行性,降低任务间同步和通信开销。实验结果表明,采用优化的映射方法后任务节点间的并行性被充分利用,通信开销降低,整体上提高了片上网络系统性能。     

片上互连网络的功耗特征分析与优化

随着处理器核数的增加,片上互连网络NoC结构日趋复杂,导致片上互连网络功耗所占的比重和功耗分析的难度也在增加。片上互连网络的任务映射,既要保证多处理器核心之间通信的高性能,又要保证耗费尽可能少的功耗和面积,即在有限的功耗和面积开销下获得较高的性能。在进行任务映射时,核心之间的通信距离是减少任务通信功耗的关键。连续且近凸的区域有助于缩短任务的通信距离。分析了一种功耗最优的片上互连网络启发式映射算法（INC）,该算法由区域选择算法和节点映射算法组成。对区域选择算法的2个因子进行了改进,使应用总的通信开销最小化且保证后续应用以很小的通信代价进行区域选择。提出了新的基于选择区域的映射算法。它们在动态到达程序映射问题中的实验结果表明,新的区域选择算法和节点映射算法相比于INC,可以减少12.10%的通信功耗,并且带来11.23%的通信延迟优化。     

一种基于遗传算法的片上网络映射算法

片上网络NoC以其高可扩展性成为片上多核的互连解决方案。IP核到NoC结点的映射是片上网络设计的重要阶段。映射对芯片的性能和功耗有重要的影响。本文详细阐述了映射算法的研究现状,给出了映射算法的分类方法,并且分析各种方法的特点。最后,给出一种采用顺序表示的基于遗传算法的NoC映射算法。实验结果表明,该映射算法能够取得较好的准确性和较高的效率。     

ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs

The rapid increase in the number of cores on chips forced the designers to invent new communication methods such as Network-on-Chip (NoC) paradigm. Advances in integrated circuit fabrications even allowed three-dimensional NoC (3D-NoC) implementations. 3D-NoCs have more advantages than their 2D counterparts such as lower area, higher throughput, better performance, and less energy consumption. However, they lack the design automation algorithms. An important design problem for a given application is mapping it on a 3D-NoC topology. In this paper, we present an integer linear programming (ILP) formulation and a novel heuristic algorithm, called CastNet3D, for application mapping onto mesh-based 3D-NoCs with energy minimization being the objective. The algorithm tries to utilize vertical links for communicating nodes as much as possible. Vertical links are shorter than horizontal ones; therefore, they are faster and consume less energy. We compared CastNet3D against ILP in terms of energy consumption and execution time on several benchmarks. Our results show that CastNet3D obtains close to optimum results in much shorter time frames.

     

Scalable benchmark synthesis for performance evaluation of NoC core mapping

Network On Chip is determined as an On-chip packet-switched communication in the study of multi-processors. As the number of components is proliferating, there were many issues regarding the performance of a network. By taking into consideration of this problem, in this paper, we proposed an efficient core mapping algorithm named BMAP, used for customizing the NoC platforms and performing the SPLASH-2 Benchmark synthesis evaluation. This proposed mapping technique is applied to various NoC applications and SPLASH-2 Benchmark applications. The experimental outcomes exhibit optimized NoC platforms on outperforming the performance and cost metrics when compared with other mapping algorithms. In contrast, the SPLASH-2 Benchmarks reveal that the proposed algorithm has a significant improvement in performance metrics against NMAP, MMAP, and EMAP algorithms. The metrics such as Speed-up Execution Time has improved by 40%, 30%, and 20%, and Latency reduced by 42%, 34%, and 28%, Energy efficiency was improved by 36%, 30%, 26%, and Power consumption reduced by 32.6%, 28.2%, and 26.4% respectively.