A two-dimensional numerical analysis of a silicon N-P-N transistor

First-order transistor theory leads to conclusions that do not compare well with experimental results obtained for today's transistors fabricated with sophisticated technology. In an effort to overcome this situation, Gummel [1] for the first time used a digital computer to give a unified exact treatment of one-dimensional device performance. This paper treats the two-dimensional case that must be considered in order to account for lateral current effects. A set of 3 nonlinear partial differential equations describing the flow of carriers within the transistor under steady-state conditions is formulated and solved iteratively. The potential distribution and the hole and electron distribution within the transistor are calculated, and two-dimensional plots of these quantities are given.     

A two-dimensional Boltzmann transport equation approach to ion implantation in silicon

A precise two-dimensional modeling for ion implantation based on Boltzmann transport equation is presented, in order to obtain impurity distributions for current small dimensioned devices. Ion irradiation region dependence of the distributions is calculated for As+ ion implants in silicon. Good agreement between experimental results and calculations for sufficiently large irradiation region implants, is successfully obtained in range distribution comparison. This modeling is applicable to design two-dimensional multilayered and fine structured devices.     

A comparison of etched-geometry and overgrown silicon permeable base transistors by two-dimensional numerical simulations

Etched-geometry and overgrown Si permeable base transistors (PBT's) are compared by using two-dimensional numerical simulations. Because of the asymmetry of the etched structure, two biasing conditions are possible (etched-collector and etched-emitter) and both are considered. The base-to-collector transfer characteristics of PBT devices have two regions of operation. At low base-to-emitter voltages, barrier-limited current flow is observed, The two-dimensional nature of the depletion region near the Schottky-contact base grating results in a smaller electron barrier and thus a larger collector current in the etched structures than in the overgrown structure. At high base-to-emitter bias levels, charge is limited from entering the base region of the etched-emitter structure and from leaving the base region of the etched-collector device. The resulting parasitic feedback effects lead to a deviation from the square-law behavior found in the collector characteristics of the overgrown PBT. Because of the absence of semiconductor material directly above the base grating lines in the etched devices, these structures have lower device capacitances. They also have smaller transconductances at high base-to-emitter voltages. The important consequence of this is that overgrown and etched structures have comparable predicted maximum values of the small-signal unity short-circuit current-gain frequency and maximum frequency of oscillation. Fabrication-related effects are discussed qualitatively and GaAs PBT operation is considered in light of the present simulations.     

A two-dimensional numerical model of a single-electron transistor

A two-dimensional numerical model of a single-electron transistor is suggested. It is based on the numerical solution to Poisson’s equation and makes it possible to calculate a potential distribution and currentvoltage characteristics (CVCs) of the transistor in dependence of its design, process, and electrophysical parameters. Model results agree well with experimental data.     

A new numerical approach to the calculation of electromagnetic scattering properties of two-dimensional bodies of arbitrary cross section

A new method is introduced for formulating the scattering problem in which the scattered fields (and the interior fields in the case of a dielectric scatterer) are represented in an expansion in terms of free-space modal wave functions in cylindrical coordinates, the coefficients of which are the unknowns. The boundary conditions are satisfied using either an analytic continuation procedure, in which the far-field pattern (in Fourier series form) is continued into the near field and the boundary conditions are applied at the surface of the scatterer; or the completeness of the modal wave functions, to approximately represent the fields in the interior and exterior regions of the scatterer directly. The methods were applied to the scattering of two-dimensional cylindrical scatterers of arbitrary cross section and only the TM polarization of the excitation is considered. The solution for the coefficients of the modal wave functions are obtained by inversion of a matrix which depends only on the shape and material of the scatterer. The methods are illustrated using perfectly conducting square and elliptic cylinders and elliptic dielectric cylinders. A solution to the problem of multiple scattering by two conducting scatterers is also obtained using only the matrices characterizing each of the single scatterers. As an example, the method is illustrated by application to a two-body configuration.     

Simplified numerical approach to Mueller's design of optimum linearphase pulse shaping filter

A reduced mathematical formulation of the problem of optimum design of a linear phase Nyquist filter is introduced. The method makes use of the even symmetry inherent in the filter design which leads to an eigenvalue problem with a matrix size one quarter of that of the original formulation, resulting in a considerable CPU time saving and greater numerical accuracy     

A numerical approach to modeling the ultrashort-gate MESFET

A simple numerical model compatible to small computers is developed for an ultrashort-gate GaAs MESFET that takes into account the transient electron dynamics leading to velocity overshoot of electrons. It is assumed that because of the velocity overshoot phenomenon, the carriers move with constant high mobility at fields greater than the threshold field necessary for intervalley scattering for a certain time before relaxing to the equilibrated velocity of the low-mobility satellite valley. These time constants are taken from results of Monte Carlo calculations. The model also takes into account nonuniform channel doping as well as the nonabrupt depletion boundary. It is shown that changing the gate length from 1.0 to 0.5 µm does result in improved gain bandwidth although not in perfect proportion to the gate length reduction. This is due to excess charge dipole buildup in saturation as well as capacitance from fringing effects. The effects of profiles on the peak electric fields are also pointed out.     

基于FPGA实现简易数字频率计的设计

简易数字频率计的设计,采用FPGA实现对模数转换芯片A/Dtlc549的控制,对外来信号采样,实现信号从模拟到数字的转换,在单位时间内通过计数器的累加实现对频率的计数。该设计实现的频率精度为1Hz,测量范围为0～100MHz,经实际电路测试,仿真结果表明,该频率计具有较高的实用性和可靠性。     

A describing-function approach to antiskid design

A describing-function approach is employed in the design of an antiskid braking system. This includes the specification of the dynamics of a braking vehicle, a proposed system employing a feedback compensator to provide antiskid behavior, and the determination of the design parameters by a describing-function analysis. A wide range of tire-roadway conditions was considered in the latter. The resulting design was implemented and evaluated in field tests. The observed antiskid braking performance was approximately that predicted from the design. Thus the describing-function approach, especially in view of its ease of application and the insights it provides, appears to be a useful one for the control aspect of antiskid design.     

A mechatronic approach to microsystem design

This paper discusses the implementation of a concurrent-engineering view of microsystem design. The proposed concurrent-engineering or mechatronic approach to the design of hybrid microsystems is illustrated by three case studies. First, the design of an advanced computer writing tool is discussed. The design of this consumer product requires a mechatronic approach at different functional levels and at different levels of miniaturization. Another illustration of this approach is the design of an implantable drug delivery device. A device for solid drug delivery, as well as a device for liquid drug delivery, are presented. It is demonstrated that miniaturization can be obtained by a combination of functions in a single component. The multiplication of functions in a single component automatically leads to a concurrent-engineering approach far the design. Finally, the micromanufacturing of silicon parts by electrodischarge machining is described. It is demonstrated that electrodischarge machining of silicon is not only feasible, but forms an interesting and complementary technology to traditional silicon micromachining. Therefore, this powerful manufacturing technique opens the way for concurrent engineering of real three-dimensional micromechanical sensors and actuators with integrated processing electronics on the same wafer     

A computer approach to laser design

The problem of maximizing laser efficiency is usually approached through experimental study. The method proposed in this paper permits us to approximate the optimum design prior to the actual physical construction of the system. The efficiency of a four-level laser system is first defined as a product of six subefficiencies, each associated with one of the loss mechanisms operative in the system. Equations which relate the subefficiencies to physically measurable parameters are derived. The set of these equations constitutes the model for system efficiency. Based on the model, a program is written for the IBM 1620 digital computer. A sample problem involving the design of a neodymium doped glass laser oscillator is solved to illustrate the use of the model. The results are in general agreement with known theoretical and experimental properties of the pulsed four-level laser. In general, the efficiency increases with length, radius, doping density and pumping energy, and decreases as end reflectivities and pumping pulse time constant increase, within the restrictions imposed on the model by assumptions and approximations.     

A novel approach to silicon gate CMOS device scaling

A new approach is reported for fabricating scaled Si-gate CMOS devices using medium temperature (?900° C) LPCVD deposited SiO₂ as the dielectric interlayer. The film can be deposited from 850 to 1000°C using a graded temperature profile and optimum pressure. A maximum of 100 wafers with 8% variation of thickness per run has been achieved using the process described in this paper. The medium-temperature LPCVD SiO₂ film exhibited step-coverage as good as the conventional low temperature PSG film. Since the new film requires no high temperature treatment, the convetional Si-gate CMOS diffusion process has been used to obtain the micron and submicron junction depths that are required to fabricate scaled CMOS devices. Such a processing approach, converting a 5–6 μm geometry CMOS process to a 3 μm geometry CMOS process, is described.     

Bottom-up approach to silicon nanoelectronics

This paper presents a brief review of our recent work investigating a novel bottom-up approach to realize silicon-based nanoelectronics. We discuss fabrication technique, electronic properties, and device applications of silicon nanodots as a building block for various nanoscale silicon devices.     

A new approach to active antenna design

Design considerations for wide-band active antenna circuits for frequencies up to 30 MHz are presented. High performance is obtained by using unusual amplifier types having a virtually grounded input electrode of the input active device, and a large amount of negative feedback over several stages. The realized antennas with a physical length of 0.5 m have a flat frequency response from 5 kHz to 30 MHz and extremely low distortion (second-order intercept >+70 dBm, third-order intercept > +50 dBm). The antennas are thoroughly protected against statics; without sacrificing the high dynamic range. Output power levels up to +28 dBm can be handled. The electric field strength may exceed 10 V/m. The equivalent input noise field strength amounts to about 25 nV/msqrt{Hz}.     

A systematic approach to intelligent building design

The Future Intelligent System and Engineering Service for Buildings (FINEBIL) concept, which integrates intelligent building marketing, engineering and construction is reviewed. The integration of facilities management, building automation, data communication, and office automation systems, called for in the FINEBIL-System Development Engineering Methodology (SDEM) is summarized. It consists of standard techniques for engineering intelligent building systems. Several technologies for the next generation of intelligent buildings are discussed     

A computational approach to VLSI analog design

A new technique for the design of analog VLSI is described. Borrowing from digital design technology concepts, an analog processor is described which can be digitally programmed to execute a small but powerful set of analog operations. At a very high level of abstraction these instructions can be used to perform mathematical processing on analog signals directly rather than through the traditional processing chain of sampling, A/D conversion, digital processing, and D/A conversion. A key feature of the technique is the conversion of signals into logarithmic form, and the practical problems associated with this are discussed and their solutions outlined. Finally implementation of these techniques in BiCMOS, CMOS, and bipolar technologies is discussed with conclusions.     

A computational approach to VLSI analog design

A new technique for the design of analog VLSI is described. Borrowing from digital design technology concepts, an analog processor is described which can be digitally programmed to execute a small but powerful set of analog operations. At a very high level of abstraction these instructions can be used to perform mathematical processing on analog signals directly rather than through the traditional processing chain of sampling, A/D conversion, digital processing, and D/A conversion. A key feature of the technique is the conversion of signals into logarithmic form, and the practical problems associated with this are discussed and their solutions outlined. Finally implementation of these techniques in BiCMOS, CMOS, and bipolar technologies is discussed with conclusions.     

一种新的混沌振荡器设计方法

介绍了一种具有普适性的混沌振荡器设计方法,该方法完全基于无量纲状态方程设计,整个电路由反相加法模块、积分模块和反相器模块三大模块组成.各状态变量以原变量和反变量的形式出现,设计者只需根据系统状态方程,将各模块连接起来就可实现,大大简化了混沌电路的设计,实现了混沌电路的模块化设计.根据该方法,文中分别设计了Lorenz、...