Environmental Qualification Testing and Failure Analysis of Embedded Resistors

Embedding passive components (capacitors, resistors, and inductors) within printed wiring boards (PWBs) is one of a series of technology advances enabling performance increases, size and weight reductions, and potentially economic advantages in electronic systems. This paper explores the reliability testing and subsequent failure analysis for laser-trimmed Gould subtractive nickel chromium and MacDermid additive nickel phosphorous embedded resistor technologies within a PWB. Laser-trimmed resistors that have been “reworked” using an inkjet printing process to add material to their surface to reduce resistance have also been considered. Environmental qualification testing performed included: thermal characterization, stabilization bake, temperature cycling, thermal shock and temperature/humidity aging. In addition, a pre/post-lamination analysis was performed to determine the effects of the board manufacturing process on the embedded resistors. A failure analysis consisting of optical inspection, scanning acoustic microscope (SAM) and environmental scanning electron microscope (ESEM) imaging, and PWB cross-sectioning was employed to determine failure mechanisms. All the embedded resistors were trimmed and the test samples included resistors fabricated both parallel and perpendicular to the weave of the board dielectric material. Material stability assessment and a comparison with discrete resistor technologies was performed.     

Optimizing Embedded Passive Content in Printed Circuit Boards

A genetic algorithm's optimization approach is used in conjunction with a size/cost model to study the optimum mix of passives (resistors and capacitors) to embed within a printed circuit board on an application-specific basis. Using the models and solution approach developed in this paper, the effect of board size on the optimum embedded passive solution (minimum cost solution) is studied, and an assessment of whether better system solutions can be found by varying or constraining the size of the board using several different criteria has been performed. Example optimization results for a GSM mobile phone are presented. The analysis has shown that the system size limitation when embedded passives are used is not only dependent on the quantity, type, and electrical properties (capacitance and resistance) of the embeddable components, but is also very sensitive to layout specifications and the placement of the nonembeddable parts.     

印制电路板内埋薄膜电阻和聚合厚膜电阻的可靠性初步评估

多层印制板内埋无源元件,可以节省有源元件安装面积,减小印制板尺寸,提高设备功能、提升安全性,并降低制造成本。由于制作完成后内埋式无源元件不可替换,元件是否拥有长期稳定性和可靠性是制造商最关心的方面。文章给出了内埋NiP薄膜电阻和聚合厚膜电阻持续作业的可靠性测试结果,讨论了无铅焊接模拟和温度循环测试（一40℃～＋85℃）的温度对阻值的影响。     

Electrical behavior of decoupling capacitors embedded inmultilayered PCBs

We describe the modeling of prototype capacitors embedded in multilayered printed circuit boards. We present the design of these devices. We also report measurement and characterization results. The emphasis is on the modeling of via hole connections to the embedded capacitor, not on the technology of buried capacitors. Several designs have been compared with respect to their electrical behavior. In particular, several via hole configurations have been studied, because they are the main cause of parasitic behavior. With these buried capacitors, we obtained a reduction of the parasitic inductance of 80% compared to an equivalent discrete capacitor. This work has been carried out under a European Brite-EuRAM funded project COMPRISE (BE 96-3371). The objective of this project was to develop new materials and manufacturing processes to embed passive components (R, L, and C) within printed wiring structures fabricated from laminate materials. This technology enables the manufacture of space efficient and radio frequency (RF) optimal performing types of modules or board assemblies particularly suited to the market domain of portable and handheld communication and information technology products     

Design method and material technologies for passives in printed circuit Board Embedded circuits

The integration of passive components into the printed circuit board (PCB) as embedded passives integrated circuits (emPIC) results in a higher power density of power converters. To achieve a highly automated, low cost, integral manufacturing, the devices are constructed layer wise. Materials and processes necessary for the manufacturing of such circuits are described in this publication. Especially for magnetic components like inductors and transformers the design of such thin components is challenge. Because of the high aspect ratio, traditionally used models lead to a high calculation effort or use nonappropriate approximations. This contribution presents an analytic approach for the design. The model considers the magnetic flux distribution in the core and in the winding area and therefore allows a precise calculation of the inductivity as well as the losses in the device and their distribution. It is very well suited for a parametric analysis and thus for the synthesis of thin planar magnetic components. Material technologies for the construction of the capacitive layers and the magnetic cores are investigated. A ferrite polymer compound is adapted to be compatible with the PCB laminating process. Accordingly a 60-W offline converter was designed and fabricated using the new technology. Its transformer is entirely integrated in the PCB as well as 11 capacitors. Standard PCB lamination processes are used for the layerwise integration of the components. The circuit needs an area of the size of a credit card with a PCB thickness of 4 mm. Up to 82% efficiency could be demonstrated.     

Preliminary assessment of the stability of thin- and polymer thick-film resistors embedded into printed wiring boards

Embedding passive components into multilayer printed wiring boards (PWBs) meet electronic device requirements concerning the necessity of saving the surface board area for active elements, reducing board’s size, improving device functionality and safety as well as overall product cost reduction. Since embedded components cannot be replaced after the board is completed, a long term stability and reliability are the important concerns for manufactures.This paper presents the results of examinations of embedded thin-film NiP resistors and polymer thick-film resistors during their continuous operation and the influence of temperature on the resistance values after the simulation of a lead-free soldering process and after the temperature cycling test (?40 ?C/+85 ?C).     

An assessment of the applicability of embedded resistor trimming and rework

The successful use of embedded resistors in many applications will require that the fabricated resistors be trimmed prior to lamination into printed circuit boards to attain required design tolerances. Depending on the application, the economic value of the board being fabricated, and the process used to create the embedded resistors, it may also be prudent to consider reworking resistors that are incorrectly trimmed or with initial values that are too large (untrimmable resistors). This paper uses a model of the resistor/board yield coupled with a cost model of the trim and rework processes to identify conditions under which applications should neither trim nor rework, trim but not rework, or perform both trimming and rework of embedded resistors, as a function of the design tolerance for the resistors and the accuracy with which the embedded resistors can be fabricated. Example results are presented for several applications ranging from small boards with a high density of embedded resistors to large boards with a low density of embedded resistors. Distinct regions of trimming and rework applicability that are nearly application independent can be identified as a function of design tolerance, printing/plating/etching variation, and the characteristics of the trimming process.     

有机基板中埋入无源元件概述

介绍了埋入无源元件在减小基板面积和提高基板高频特性的优点,总结了目前正在应用和研究的埋入电阻和埋入电容技术的实现方法.并提出基于埋入平面薄膜电阻和埋入薄芯介质材料形成平面电容技术的混合埋入技术将成为未来埋入无源元件PCB的主流技术.最后阐述了埋入无源元件技术在产业化过程中遇到的困难.     

Power-bus decoupling with embedded capacitance in printed circuit board design

This paper experimentally investigates the effectiveness of embedded capacitance for reducing power-bus noise in high-speed printed circuit board designs. Boards with embedded capacitance employ closely spaced power-return plane pairs separated by a thin layer of dielectric material. In this paper, test boards with four embedded capacitance materials are evaluated. Power-bus input impedance measurements and power-bus noise measurements are presented for boards with various dimensions and layer stack ups. Unlike discrete decoupling capacitors, whose effective frequency range is generally limited to a few hundred megahertz due to interconnect inductance, embedded capacitance was found to efficiently reduce power-bus noise over the entire frequency range evaluated (up to 5 GHz).     

埋置电容板板边分层探究和改良

针对埋容板板边分层问题,通过分析并跟进埋容板生产各关键制程,确认了埋容板板边分层的原因。受机械应力作用时铜层与埋容材料层之间出现微小裂纹,随着机械应力作用次数的增加,裂纹扩展导致分层。通过试验验证,更改了埋容层芯板的制作照相底片,彻底解决了埋容板板边分层的问题。     

Reliability Modeling and Assessment of Embedded Capacitors in Organic Substrates

Understanding and quantifying the RLC characteristics of the embedded passives under thermomechanical deformation during fabrication and accelerated thermal conditions is necessary for their successful implementation. Embedded passives are composite layers with dissimilar material properties compared to the neighboring layers in the integral substrate. The ongoing project explores the fabrication, multifield physics-based reliability modeling and accelerated testing of embedded passive test vehicles. As a first step, in this paper, the effect of thermomechanical deformation on the electrical characteristics of embedded capacitors is studied at frequencies from 100 KHz to 2 GHz using two test vehicles. Test vehicles with embedded passives were fabricated and were subjected to accelerated thermal cycles between -55degC to 125degC, between -40degC to 125degC and high humidity and temperature conditions of 85degC/85% RH. Significant changes in the electrical parameters of the embedded capacitors are observed. The fabrication process mechanics with multiphysics global-local modeling methodology is demonstrated to study the effect of thermal cycling on the electrical characteristics of embedded capacitors. The results obtained from the multiphysics global-local modeling methodology are validated against the measured electrical characteristics of the fabricated functional test boards. The effect of changes in electrical parameters of embedded passives on system performance of low-pass filters is presented     

Embedded resistors and capacitors for organic-based SOP

System-on-package (SOP) architectures take advantage of compact, high-performance designs to place the maximum amount of functionality on a subsystem that can then be mounted on a lower-cost, lower density interconnect board. Embedding passive components is a key technology in achieving these goals since this enables smaller SOP substrate footprints or, equivalently, higher functional density, along with better power distribution, increased design flexibility and improved reliability. The resulting footprint areas of integrating capacitors will have more of an effect on the layer count of SOP assemblies than will integrating resistors due to the rather low specific capacitances of most embeddable dielectrics, but the situation is improving steadily. It may be necessary to use two different dielectric materials to cover the entire required range. The inherently lower parasitic inductance of embedded capacitors makes them much more useful in decoupling than surface mount capacitors, enabling more robust power distribution and decreased power/ground noise. The key to this performance enhancement in large boards is the use of a thin dielectric to decrease the inductance but, for the smaller SOP substrates, the dielectric constant must also be high to provide sufficient decoupling capacitance in the reduced area.     

Highly reliable processes for embedding discrete passive components into organic substrates

There have been strong demands for a miniaturization and multi-functionalities in the recent electronics, especially in the portable ones. To meet both requirements, passive and/or active devices embedding into PCBs have been regarded as a most promising technique. In this paper, we propose a simple and quite cost effective method for fabricating discrete component embedded PCBs. Discrete components are embedded in cavities formed in the core layer of the PCB, and the external electrodes of the discrete components are connected by a Cu platting and etching method without any additional laser via machining or soldering processes. A prototype is successfully fabricated using MLCCs and chip resistors, size of 0603 in mm scale, and the capacitance and the resistance was measured to be little affected by embedding processes; they were changed by 0.2% and 0.6%, respectively. And they showed good reliabilities under harsh environmental tests including Pb-free reflow conditions.     

采用喷墨技术制造埋入无源元件

由NIST/NCMS发起的研究表明,像电阻、电容和电感可以采用喷墨打印成所需求模式新工艺来制成。     

Putting passives in their place [PCB integration]

The next big thing in miniaturization is integrating resistors, capacitors, and inductors into circuit boards. These integrated passives would be a part of the circuit board itself, formed when the board was, so their overall cost would eventually be less than what manufacturers pay at present to buy and solder attach discrete devices. This article examines the advantages of this integration scheme, and looks at the difficulties involved.     

Quantitative Analysis of Resistance Tolerance of Polymer Thick Film Printed Resistors

Low cost methodologies of resistor fabrications are needed for cost effective embedding of resistors into polymeric substrates. Polymer thick film resistors (PTFRs) are low temperature processable, low cost resistors with a wide resistivity range. The electrical resistance variation of these resistors is in the range of around plusmn20% after deposition and trimming procedure is employed to tune the resistances to meet specifications. This adds to the cost and complicates the fabrication process when the resistors are embedded. In this study, the influences of PTFRs geometries on the resistance tolerances were investigated. Results indicated that the resistance accuracy of stencil printed resistors was markedly higher than that of the screen-printed resistors. The screen-printed resistor edge geometries were observed to be rough. Finite element method analyses revealed that the resistance tolerances were associated with edge roughness. Remedies to reduced variations were proposed and the relationship between resistance tolerances and aperture orientations was also outlined     

Buried active and passive components

The coming generations of portable products require significant improvement of packaging technologies, mainly due to increasing signal frequencies and the demand for higher density of functions. State of the art are organic substrates with high-density build-up layers and micro-vias, equipped on both sides with discrete passive and active components. The space requirement of active chips can be already reduced to a minimum by implementing CSPs (chip size packages) or flip chips. A further miniaturization however requires a 3-dimensional integration of components. Besides miniaturization the new applications require signal frequencies of several GHz. In order to maintain signal integrity, much shorter and impedance-matched interconnects between chips and other components are required. Here a new approach will be described which allows extreme dense 3-dimensional integration and very short interconnects combined with the generation of integrated resistors. This approach, called ?Chip in Polymer“ is based on the integration of extremely thin components into build-up layers of printed circuit boards.     

埋入电镀电阻在高速线路中的应用

埋入电阻是实现高频电路的重要方法之一。现已开发出在内层要求精确电镀上电阻元件的工艺,这意味着PCB制造厂可采用各种类型层压板材料,根据不同电镀时间得到从25 Ω到100 Ω范围内的方块电阻值(电阻率),而不是采用各种不同电阻值金属箔的基材来制备不同阻值的埋入电阻。采用常规PWB的活化和化学镀等制造步骤便可制作这种电阻,这种埋入电阻工艺是易于激光检修并层压到多层板内部是很稳定的。这种埋入电阻经过多层层压,温度变化或者显露于潮湿环境下表明电阻值是很小改变的,经过模拟电路运作具有好的稳定性。     

Embedded Capacitors in Printed Wiring Board: A Technological Review

This paper reviews the technology of embedded capacitors, which has gained importance with an increase in the operating frequency and a decrease in the supply voltage of electronic circuits. These capacitors have been found to reduce the number of surface-mount capacitors, which can assist in the miniaturization of printed wiring boards. This paper describes various aspects of embedded capacitors, such as electrical performance, available dielectric materials, manufacturing processes, and reliability. Improvement in electrical performance is explained using a cavity model from the theory of microstrip antennas. The advantages and disadvantages of dielectric materials such as polymers, ceramics, polymer–ceramic composites, and polymer–conductive filler composites are discussed. Various manufacturing techniques that can be used for the fabrication of embedded capacitors are also discussed. Embedded capacitors have many advantages, but failure of an embedded capacitor can lead to board failure since these capacitors are not reworkable. The effect of various environmental stress conditions on the reliability of embedded capacitors is reviewed.     

DC power-bus design using FDTD modeling with dispersive media andsurface mount technology components

DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) method is demonstrated herein. The dispersive character of the dielectric layers used in printed circuit board substrates is taken into account in this study. In particular, FR-4 is considered. The complex permittivity of the dielectric is approximated by a Debye model. A wide-band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Good agreement is achieved between the modeled and measured results for a typical dc power-bus structure with multiple surface mount technology (SMT) decoupling capacitors placed on the printed circuit board (PCB). The FDTD method is then applied to investigate some general approaches of power-bus noise decoupling