On the Design of the Triple-Resonance Interstage Network

The triple resonance network has emerged as a promising candidate for interstage bandwidth enhancement in cascaded CMOS amplifiers. This paper presents several design procedures for such networks, subject to the condition of moderate (1 dB) or no peaking in the passband, for the case where the devices can be chosen or designed, as well as the case in which the devices are given.      

A Design Theory for Wide-Band Parametric Amplifiers

A new exact design theory for a nondegenerate parametric amplifier with double-tuned signal circuit and single-tuned idler circuit is described. If the resistance of the signal circuit, which is neglected in previous papers, is considered, there exists a frequency band in which the amplifier gain is positive. In this paper the band characteristics of the gain are related to this frequency band. Slope parameters of the idler and signal circuits are normalized by the slope parameters which are associated with the diode itself. These normalized slope parameters are used to relate the actual circuit and gain-bandwidth characteristics. The slope parameter of the external signal resonator is related to the negative slope parameter of the diode, and bounds on this ratio are given over which stable amplification is possible. A design table which gives the coupling ratio and slope parameter of the external signal resonator is derived by computer calculation. Experiments were made at 19 GHz. Positive-gain bandwidth was around 4.0 GHz, and flat bandwidth at 10-dB gain was 2.4 GHz. The ratio of these bandwidths coincided with the theory.     

Design Techniques of CMOS Ultra-Wide-Band Amplifiers for Multistandard Communications

This paper presents design techniques of CMOS ultra-wide-band (UWB) amplifiers for multistandard communications. The goal of this paper is to propose a compact, simple, and robust topology for UWB low-noise amplifiers, which yet consumes a relatively low power. To achieve this goal, a common-gate amplifier topology with a local feedback is employed. The first amplifier uses a simple inductive peaking technique for bandwidth extension, while the second design utilizes a two-stage approach with an added gain control feature. Both amplifiers achieve a flat bandwidth of more than 6 GHz and a gain of higher than 10 dB with supply voltages of 1.8-2.5 V. Designs with different metal thicknesses are compared. The advantage of using thick-metal inductors in UWB applications depends on the chosen topology.     

Design Considerations for 60 GHz Transformer-Coupled CMOS Power Amplifiers

This work discusses the design methodologies for efficient power generation at mm-wave frequencies in CMOS. Passive elements play an important role in PA design, as they determine both the output power and power gain of the circuit. In this work, we have developed a methodology for design of transformer-coupled power amplifiers. A distributed model of on-chip transformers has been developed that can predict the performance up to very high frequencies, is length scalable and uses only a few parameters , compared to a complete lumped model. Using the model, a two-stage transformer-coupled PA has been designed in 90 nm CMOS. The prototype has one of the highest output powers reported for a 60 GHz CMOS PA. A three-stage improved design with higher gain and efficiency is reported, stressing the importance of driver stage design at these frequencies. The PA has been integrated into a complete transmitter and tested with 10 Gb/s QPSK modulated data.     

A Study of the Optimum Design of Wide-Band Parametric Amplifiers and Up-Converters

Single-diode parametric amplifiers or up-converters using multiple-resonator filters as coupling networks can be made to have considerably larger bandwidths than corresponding amplifiers having single-resonator coupling circuits. Data are presented from which the coupling-filter bandwidths required for given coupling network complexity, diode parameters, and required gain can be determined for both parametric amplifiers and up-converters. In the cases of nondegenerate parametric amplifiers and up-converters, the fact that the diode must be brought to resonance at more than one frequency has an added limiting effect on bandwidth. Some trial amplifier designs are shown, and important considerations in the synthesis of the coupling filters are noted. It is seen that for the case upper-sideband up-converters, if a filter having n resonators is used in both the input and upper-sideband circuits, then the over-all response can be made to correspond to that of a filter with 2n resonators. The gain characteristics of the trial amplifier designs as determined with a digital computer are included. Computed responses ranging in bandwidth from 9 to 27 per cent are obtained for multi-resonator designs having C/sub 1// C/sub 0/ = 0.25.     

Improved Computer-Aided Synthesis Tools for the Design of Matching Networks for Wide-Band Microwave Amplifiers

Network synthesis is a powerful design tool when applied to the design of matching networks for wide-band microwave amplifiers. Significant design improvements have been made in the computer-aided synthesis process, which provides a powerful, efficient, and friendly tool for the microwave amplifier designer. Design methodologies are given, computer automation methods are outlined, and a complete amplifier design example is included.     

A New Method for Designing Wide-Band Parametric Amplifiers

A practical method of designing wide-band parametric amplifiers operated with a circulator is described. For amplifiers with an initially series-tuned varactor, it is possible to find simple relations between Butterworth and Chebyshev responses of lowpass filters and desired gain responses of maximally flat or equalripple type. These relations are shown to hold for most practical varactors. For amplifiers with an initially series-tuned varactor, simple expressions for the limiting gain bandwidth product are given. It is also shown how filters should be chosen to give stable amplifiers.     

Practical Design and Performance of Nearly Optimum Wide-Band Degenerate Parametric Amplifiers (Nov. 1961 [T-MTT])

The design of a two-resonator single-diode degenerate parametric amplifier is described, which incorporates features that give it nearly optimum wide-band performance. These features include the use of almost lumped circuit elements, a separate pump resonator which is very lightly coupled to the diode and pump circuits, and a diode resonated in series rather than in shunt, from which several advantages accrue. A bandwidth of 21 per cent with 15-db midband gain (double channel) is obtained at 1 Gc using two resonators, as compared with 8 per cent using one resonator. Both measured responses are found to be in excellent agreement with theoretical responses obtained with a digital computer. The measured double-channel noise figure was 1 db. Theoretical and experimental results are presented which show this type of amplifier to be remarkably insensitive to tuning errors. Good results were also obtained using two identical amplifiers in balanced operation with a 3-db coupler so as to eliminate the need for a circulator.     

Some Aspects of the Design of Wide-Band Up-Converters and Nondegenerate Parametric Amplifiers

Proper design of the diode-resonating circuit is seen to be extremely important if large bandwidth is desired in a varactor-diode parametric amplifier. Cases where there is one resonance of the diode-resonating circuit at a frequency between the frequencies of the signal-input and the sideband resonances are examined in some detail. It is shown that the frequency of this intermediate resonance can greatly influence the bandwidth capabilities of an amplifier design, and the optimum frequency for such a resonance is given for upper-sideband up-converters. The optimum frequency of such a resonance is greatly different if the diode is resonated in series than it is if the diode is resonated in shunt. It is believed that the same results would also apply for lower-sideband up-converters and nondegenerate parametric amplifiers. Some upper-sideband up-converter designs were worked out and their computed responses are given including the effects of all of the parasitic elements of the diode. Bandwidths of the order of an octave are obtained. A systematic sign procedure is given for wide-band nondegenerate parametric amplifiers which use the diode parasitic resistance as the idler termination. Some designs of this type were also worked out and their computed responses (includlng effects of all diode parasitic parameters) are presented. Bandwidths as large as 33 per cent are obtained depending on the peak gain and operating frequency range.     

CMOS斩波稳定放大器的分析与研究

对几种放大器失调消除技术的分析比较后,重点阐述了CMOS斩波稳定放大器的调制方式,和放大器的增益与斩波频率和相移的关系,并分析了斩波调制后的噪声和失调电压的理论大小以及斩波的电路实现方法。最后,提出了几种减小调制后残余失调电压的方法,总结了斩波稳定放大器最近的一些研究发现及其在一些新型产品中的应用,并归纳了斩波稳定技术的优缺点和应用范围。     

宽带、超宽带光纤放大器研究进展

目前,实现宽带、超宽带光纤放大器的技术主要有四种:宽带掺铒光纤放大(EDFA)技术、宽带拉曼放大技术、宽带混合放大技术和光纤参量放大技术.综述了宽带和超宽带光纤放大器的研究现状,并分别分析了其特点及发展趋势.     

Analysis and Design of Two Low-Power Ultra-Wideband CMOS Low-Noise Amplifiers With Out-Band Rejection

Two 3–5-GHz low-power ultra-wideband (UWB) low-noise amplifiers (LNAs) with out-band rejection function using 0.18- $mu{hbox{m}}$ CMOS technology are presented. Due to the Federal Communications Commission's stringent power-emission limitation at the transmitter, the received signal power in the UWB system is smaller than those of the close narrowband interferers such as the IEEE 802.11 a/b/g wireless local area network, and the 1.8-GHz digital cellular service/global system for mobile communications. Therefore, we proposed a wideband input network with out-band rejection capability to suppress the out-band properties for our first UWB LNA. Moreover, a feedback structure and dual-band notch filter with low-power active inductors will further attenuate the out-band interferers without deteriorating the input matching bandwidth in the second UWB LNA. The 55/48/45 dB maximum rejections at 1.8/2.4/5.2 GHz, a power gain of 15 dB, and 3.5-dB minimum noise figure can be measured while consuming a dc power of only 5 mW.      

低压低功耗CMOS电流反馈运算放大器设计

利用电流传输器CCII+作为输入(输出)缓冲器,使用0.18μMCMoS工艺设计了低压低功耗电流反馈运算放大器,模拟结果初步获得了与增益无关的23.3MHz带宽及27.7V/μS的转换速率.     

微波固态反馈放大器的性能分析与自动设计

本文采用不定散射矩阵导出了串联、并联、混联和Mason反馈放大器的定散射矩阵显式表达式，提出了一种反馈放大器噪声参数的简化分析法，从而可快速分析微波反馈放大器的传输和噪声性能。在此方法的基础上，以知识库为支持，实现了微波固态反馈放大器的自动设计。     

Prediction of Wide-Band Power Performance of MESFET Distributed Amplifiers Using the Volterra Series Representation

The power performance of a four-section MESFET distributed amplifier is predicted over the frequency range 2-8 GHz. The nonlinear model of the MESFET used has three nonlinear elements: g/sub d/, and C/sub gs/, which are represented by power series up to the third order. The analysis employs the Volterra series representation up to the third order. Experimental verification is first made on a 0.5x400-µm medium-power MESFET device to confirm the validity of the nonlinear model used in the analysis. The agreement between predicted and measured output power at 1-dB gain compression is within +-0.5 dBm across the 2-16 GHz band. A four-section distributed amplifier was then built with four 0.5x400-µm MESFET's. The agreement between predicted and measured output power at 1-dB gain compression of this amplifier is within +-0.7 dBm across the 2-8-GHz band. The measured output power at 1-dB gain compression is (22+-1) dBm across the 2-8-GHz band.     

Computer Aided Design of Wide-Band Integrated Microwave Transistor Amplifiers on High Dielectric Substrates

The problem of wide bandwidth and flat in-band gain response for microwave transistor amplifiers has been reduced to the optimization of a number of important variables from computer prepared design charts. Through the general flexibility of the computer-generated data, a large variety of amplifier responses are possible using distributed circuit matching networks. As experimental verification of the overall design procedure, single-stage and two-stage octave wide transistor amplifiers were fabricated on 1 inch by 1 inch and 1 inch by 1/2 inch 20 mil thick alumina, respectively. The experimental data gained from these units showed excellent correlation with the computer predicted response.     

Design Procedure for Two-Stage CMOS Transconductance Operational Amplifiers: A Tutorial

This paper deals with well-defined designcriteria for two-stage CMOS transconductance operational amplifiers. A novel and simple designprocedure is presented, which allows electricalparameters to be univocally related to the value ofeach circuit element and biasing value. Unlikeprevious methods, the proposed one is suited for apencil-and-paper design and yields accurateperformance optimization without introducingunnecessary circuit constraints. Bandwidthoptimization strategies are also discussed. SPICE simulations based on the proposed procedures aregiven which closely agree the expected results.     

Bandwidth Extension Techniques for CMOS Amplifiers

Inductive-peaking-based bandwidth extension techniques for CMOS amplifiers in wireless and wireline applications are presented. To overcome the conventional limits on bandwidth extension ratios, these techniques augment inductive peaking using capacitive splitting and magnetic coupling. It is shown that a critical design constraint for optimum bandwidth extension is the ratio of the drain capacitance of the driver transistor to the load capacitance. This, in turn, recommends the use of different techniques for different capacitance ratios. Prototype wideband amplifiers in 0.18-mum CMOS are presented that achieve a measured bandwidth extension ratio up to 4.1 and simultaneously maintain high gain (>12 dB) in a single stage. Even higher enhancement ratios are shown through the introduction of a modified series-peaking technique combined with staggering techniques. Ultra-wideband low-noise amplifiers in 0.18-mum CMOS are presented that exhibit bandwidth extension ratios up to 4.9     

CMOS Power-Efficient Buffers and Amplifiers

In this paper, some topologies of novel power-efficient single-ended and fully differential amplifiers and buffers are presented. The reduction of the power dissipation has been ensured through the application of an adaptive biasing architecture which gives a current dependent on the input differential voltage. This allows the minimization of the stand-by power consumption without affecting the transient characteristics. The proposed topology, implemented in a standard CMOS technology, has been applied in the design of input and output stages of low-power amplifiers and voltage buffers, considering them also in the fully differential version. Simulation and measurement results showing good general performance will be also presented.     

Computer Aided Design of Wide-Band Integrated Microwave Transistor Amplifiers on High Dielectric Substrates

The problem of wide bandwidth and flat in-band gain response for microwave transistor amplifiers has been reduced to the optimization of a number of important variables from computer prepared design charts. Through the general flexibility of the computer-generated data, a large variety of amplifier responses are possible using distributed circuit matching networks. As experimental verification of the overall design procedure, single-stage and two-stage octave wide transistor amplifiers were fabricated on 1inch by 1inch and 1inch by 1/2 inch 20 mil thick alumina, respectively. The experimental data gained from these units showed excellent correlation with the computer predicted response.