A Gap Reduction and Manufacturing Technique for Thick Oxide Mask Layers With Multiple-Size Sub-$mu$m Openings

This paper introduces a technique for the fabrication of thick oxide hard masks on top of a substrate with adjustable opening sizes in the sub-$mu$m regime, while the only lithography step involved has$mu$m-scale resolution. This thick oxide mask layer with sub-$mu$m openings is suitable for etching deep narrow trenches in silicon using deep reactive ion etching (DRIE) tools. Openings of less than 100 nm are realized in a 1.5-$mu$m-thick oxide layer, while the original lithographically defined feature sizes are larger than 1$mu$m in width. This method, combined with modified high aspect ratio DRIE recipes, shows a great potential for single-mask batch-fabrication of high frequency low-impedance single crystalline resonators on silicon-on-insulator (SOI) substrates. Dry-etched trenches with aspect ratios as high as 60:1 are fabricated in silicon using the gap reduction technique to realize 200 nm opening sizes in an oxide mask layer. Various resonator structures with sub-$mu$m capacitive gaps are also fabricated on a SOI substrate using a single-mask process. Measurement results from high-frequency and high-quality factor (Q) all single crystal silicon resonators are presented.1684     

An ion milling pattern transfer technique for fabrication ofthree-dimensional micromechanical structures

We describe a useful method of transferring mask patterns over large distances using ion milling. This technique exploits the anisotropy of a collimated ion beam to etch the projection of a stencil mask pattern into a thin film. This method avoids the difficulties associated with photoresist processing on highly nonplanar substrates, and thus provides an alternative process avenue for the development of three-dimensional microstructures. We demonstrate this technique, in a process including wet anisotropic silicon etching, by fabricating arrays of high aspect ratio barbs which are intended for use in tissue fasteners in biomedical applications     

High aspect ratio silicon trench fabrication by inductively coupled plasma

Very high aspect ratio silicon trench with nearly vertical sidewall profile had been demonstrated by inductively coupled plasma (ICP) etching. This silicon trench with aspect ratio more than 30 and vertical sidewall were basically fabricated by STS ASE^TM technology and controlled at proper process parameters. We controlled the appropriate platen power and reaction gas to solve the problem of more positive profile at high aspect ratio trench and avoid the bowing formation on the sidewall simultaneously. Different feature sizes for silicon trench were designed to study the aspect ratio dependent etching properties. The 2.2 μm wide trench etched had aspect ratio of 33 and etching rate of 1.8 μm/min while the 5.0 μm wide trench had aspect ratio of 20 and etching rate of 2.5 μm/min. Received: 7 July 1990/Accepted: 25 August 1999     

Nanoscale Pattern Definition on Nonplanar Surfaces Using Ion Beam Proximity Lithography and Conformal Plasma-Deposited Resist

Ion beam proximity lithography (IBL) is a technique where a broad beam of energetic light ions floods a stencil mask and transmitted beamlets transfer the mask pattern to resist on a substrate. With a depth-of-field up to 20000 times larger than the minimum feature size and the high-throughput potential of a parallel exposure tool, IBL is very attractive for prototyping and manufacturing nanoelectromechanical systems over the steep topography of micromachined silicon wafers. This paper reports a conformal resist coating process that unlocks this potential. This negative-tone resist, plasma-polymerized methyl methacry- late, has a sensitivity of 27 muC/cm² and a contrast of 1.3 for 30-keV He⁺ ion exposures and amyl acetate developer. Sub-100-nm features have been printed down the sidewall and across a membrane at the bottom of a 500-mum-deep anisotropically etched pit in a silicon wafer. Pattern fidelity is near 2 nm for 10-nm features. Lines have also been formed on unpolished substrates, including rolled titanium foils and coarse-ground silicon wafers. Patterns on ground silicon have been etched into the surface using a nickel hard mask and SF₆/O₂ reactive ion etching.     

Elimination of post-release adhesion in microstructures usingconformal fluorocarbon coatings

The adhesion of polysilicon microstructures to their substrates is eliminated using a relatively conformal hydrophobic fluorocarbon (FC) coating grown in a field-free zone of a plasma reactor. Experiments show that the FC film deposition on top of the microstructure and on the underside was approximately 2:1. The FC coating is able to cover the entire underside of a 200×200 μm² plate, with a 20% deposition nonuniformity. The coating exhibits a contact angle of 110° and is able to prevent adhesion of cantilever beams and doubly supported beams to their substrates even after direct immersion in DI water. The durability of the coating was tested using an accelerated aging method, predicting a lifetime of greater than ten years at 150°C. Periodic wear tests indicate that the coating remains hydrophobic even after 10⁷ contact cycles     

Accelerating Single Iteration Performance of CUDA-Based 3D Reaction–Diffusion Simulations

The most commonly used approach for solving reaction–diffusion systems relies upon stencil computations. Although stencil computations feature low compute intensity, they place high demands on memory bandwidth. Fortunately, GPU computing allows for the heavy reliance of stencil computations on neighboring data points to be exploited to significantly increase simulation speeds by reducing these memory bandwidth demands. Upon reviewing previously published works, a wide-variety of efforts have been made to optimize NVIDIA CUDA-based stencil computations. However, a critical aspect contributing to algorithm performance is commonly glossed over: the halo region loading technique utilized in conjunction with a given spatial blocking technique. This paper presents an in-depth examination of this aspect and the associated single iteration performance impacts when using symmetric, nearest neighbor 19-point stencils. This is accomplished by closely examining how the simulated space is partitioned into thread blocks and the balance between memory accesses, divergence, and computing threads. The resulting optimization strategy for accelerating 3-dimensional reaction–diffusion simulations offers up to 2.45 times speedup for single-precision floating point numbers in reference to GPU-based speedups found within the previously published work that this paper directly extends. In reference to our multithreaded CPU-based implementation, the resulting optimization strategy offers up to 8.69 times speedup for single-precision floating point numbers.     

Silicon shadow mask fabrication for patterned metal deposition with microscale dimensions using a novel corner compensation scheme

Pattern deposition of metals with controlled and microscale dimensions can be a challenging task if traditional photolithography is not a practical option. This is a particularly valid concern for the case of certain polymer substrates, which are gaining in importance in the microelectronics and related industries. Therefore, a novel design and process flow for batch fabricating low cost reusable silicon shadow masks was developed. Of note was the corner compensation scheme employed to avoid over-etching of the convex corners in the design. These shadow masks enabled deposition of metals or other suitable materials with feature sizes ranging from approximately 3 to 250 μm and were successfully utilized to form patterned metal heater lines and pads on various samples. The heaters, required for conducting thermal conductivity measurements of the underlying films/substrates using the three omega (3ω) method, showed resistance–temperature linearity, confirming theoretical estimates to within 0.2%. Moreover, the room temperature thermal conductivity of an amorphous SiO₂ film as well as a polyaniline thick film were measured, further validating the deposition through shadow mask technique.     

Pulsed-laser annealing, a low-thermal-budget technique for eliminating stress gradient in poly-SiGe MEMS structures

In this paper, we demonstrate eliminating the stress gradient in polycrystalline silicon germanium films at temperatures compatible with standard CMOS (Al interconnects) backend processing. First, we study the effect of varying the germanium concentration from 40% to 90%, layer thickness, deposition pressure from 650 to 800 mtorr and deposition temperature from 400 to 450/spl deg/C, on the mechanical properties of SiGe films. Then the effect of excimer laser annealing (248 nm, 38 ns, 780 mJ/cm/sup 2/) on stress gradient is analyzed. It is demonstrated that stress gradient can be eliminated completely by depositing Si/sub x/Ge/sub 1-x/(10%相似文献   

Si基Cu/NiFe薄膜的生长及其粘附特性研究

微机械(MEMS)工艺和集成电路(IC)工艺中,在硅(Si)片上电铸高深宽比坡莫(NiFe)合金材料常出现脱落现象.提出了一种电铸NiFe合金材料的新方法,这种方法制作的合金薄膜厚度达200 μm时不脱落.此方法即对等离子刻蚀后的硅片溅射种子层铜(Cu),然后对种子层进行电镀,当其厚度达到约15 μm时,再进行NiFe合金的电铸.本文用扫描电镜、x射线衍射仪和剥离实验研究了薄膜粘附特性.研究结果表明当对种子层电镀后,随着Cu种子层厚度的增加,Cu/NiFe薄膜与基体的粘附强度增加,而薄膜的残余应力降低;同时Cu膜表面粗糙度增加,也增加了NiFe膜与Cu膜的粘附强度.     

Electrostatic microresonators from doped hydrogenated amorphous and nanocrystalline silicon thin films

This paper reports on the fabrication and characterization of flexural electrostatic microresonators based on doped thin-film hydrogenated amorphous and nanocrystalline silicon processed at temperatures below 110/spl deg/C using surface micromachining on glass substrates. The microelectromechanical structures are bridges made of either phosphorus-doped hydrogenated amorphous silicon (n/sup +/-a-Si:H) deposited by plasma-enhanced chemical vapor deposition (PECVD) or boron-doped hydrogenated nanocrystalline silicon (p/sup +/-nc-Si:H) deposited by hot-wire chemical vapor deposition (HWCVD). The microbridges, which are suspended over an aluminum (Al) gate electrode, are electrostatically actuated and the mechanical resonance is detected in vacuum using an optical detection method. The resonance frequency and energy dissipation mechanisms involved in thin-film silicon based microresonators are studied as a function of the geometrical dimensions of the structures. Resonance frequencies up to 36 MHz are observed and a Young's modulus of 147 GPa is extracted for n/sup +/-a-Si:H, and of 165 GPa for the p/sup +/-nc-Si:H films. Quality factors as high as 5000 and 2000 are observed for the n/sup +/-a-Si:H and p/sup +/-nc-Si:H resonators, respectively, and are limited by surface losses. The effect on the resonance frequency and quality factor of depositing a metal layer on the thin-film silicon structural layer is studied.     

Fabrication of anti‐reflection coatings on plastics using the spraying layer‐by‐layer self‐assembly technique

Abstract— Anti‐reflection (AR) coatings on plastic substrates have been extensively investigated with the development of large‐area LCD and LED displays. A robust AR coating on plastics requires strong adhesion to the substrate, precise thickness and refractive index, and abrasion resistance. In this paper, abrasion‐resistant AR coatings were fabricated on polycarbonate substrates using the layer‐by‐layer spraying deposition of poly(allylamine hydrochloride) (PAH) and silica nanoparticles. The adhesion between the substrates and coatings was enhanced by treating the polycarbonate surfaces with aminopropyltrimethoxylsilane (APTS). The porous low‐refractive‐index PAH/silica‐nanoparticles multilayers were constructed by the layer‐by‐layer spraying of PAH and silica‐nanoparticles aqueous solutions onto the functionalized substrates. The subsequent treatment of the porous coatings with tetrahydroxylsilane leads to stable abrasion‐resistant AR coatings. The resultant AR coatings can reduce the reflection from 5 to 0.3%. The reported technique provides a cost‐effective method for large‐scale production of AR coatings on plastic substrates.     

De-tethering of high aspect ratio metallic and polymeric MEMS/NEMS parts for the direct pick-and-place assembly of 3D microsystem

We report our study on several de-tethering methods for various high aspect ratio metallic and polymeric MEMS and NEMS parts including 5:1 aspect ratio 50 μm thick metallic (nickel) MEMS parts, 3:1 aspect ratio 1 μm thick sub-micron (350 nm) feature size metallic NEMS actuators, and 10:1 aspect ratio 100 μm thick polymer/metal bi-layer MEMS actuators. Resistive heating was found to be effective for the de-tethering of high aspect ratio metallic MEMS parts. In order to de-tether metallic NEMS parts and polymer/metal bi-layer devices, we performed the milling of tethers using a focused ion beam. Very low current (20 pA) ion beam was found to be effective means of de-tethering the metallic NEMS parts. Relatively larger current (0.3–20 nA) ion beam was found to be good for the polymer/metal bi-layer parts. We demonstrated 3D assembly and complete packaging of the de-tethered high aspect ratio metallic and metal/polymer bilayer MEMS parts.     

Polysilicon sacrificial layer etching using ClF3 for thin film encapsulation of silicon acceleration sensors with high aspect ratio

We present a new thin film encapsulation technique for surface micromachined sensors using a polysilicon multilayer process. The main feature of the encapsulation process is that both the sacrificial layer above the silicon sensor structure and the cap layer consist of epitaxial polysilicon. The sacrificial layer is removed by chlorine trifluoride (ClF₃) plasmaless gas-phase etching through vents within the cap layer. The perforated cap membrane is sealed by a nonconformal oxide deposition. The method has been applied to a silicon surface micromachined acceleration sensor with high aspect ratio structures, but is broadly applicable. Capacitance–voltage measurements have been performed to show the electrical functionality of the accelerometer.     

High aspect ratio micromachining (HARM) technologies for microinertial devices

 In this paper, we review work on novel, high aspect processes for microinertial components at the Defence Evaluation and Research Agency (DERA). High aspect components may lead to significant cost-performance improvements in both accelerometers and gyroscopes. We have evaluated 3 low temperature process technologies – silicon on insulator (SOI) HARM, UV electroforming and bulk HARM. Prototype microinertial devices fabricated in these technologies are also presented. The potential of the processes for integration with on-chip CMOS electronics is assessed which may be either as part of a fully integrated MEMS process or as “value-added” post-processing on commercial CMOS wafers. Bonded SOI (BSOI) materials has been specially designed for micromachining applications to give a low stress material that is optimised for a sacrificial release process. Trench isolation is achieved by deep dry etching to the buried dielectric. These trenches may be refilled to allow metallisation to reach isolated components. Structures with aspect ratios of up to 50:1 have been realised using a combination of photolithography, deposition and deep dry etching. CMOS compatibility has been demonstrated. The process is an attractive manufacturing technology. Electroforming of nickel in resist moulds formed using conventional UV photolithography has also been investigated. Some of the early limitations with this technology have been overcome by using a new resist technology, SU8. The process needs to mature further, but remains a promising candidate. Bulk HARM uses deep dry etching of a bulk silicon membrane which is defined using wet etching. Device isolation is difficult and process control complex making this the least attractive of the technologies.     

Studies of the adhesion properties of LIGA microstructures by X-ray spectroscopy and mechanical measurements

In the first step of the LIGA process microstructures with high aspect ratios are fabricated by patterning a resist layer with deep etch X-ray lithography. As resist typically PMMA (polymethylmethacrylate) is used. For the following electroforming process and to achieve perfect microstructures the adhesion of the PMMA on the substrates is of great importance. For a better understanding the adhesion mechanism, particular induced through the adhesion promoter MEMO (methacryloxypropyl-trimethoxysilane) was investigated on various substrates. Two methods, namely XANES/EXAFS spectroscopy under grazing incidence and shear stress measurements were modified for the specific needs of microstructures. Our studies proved that the adhesion strength is determined by two factors. A rough surface, which allows mechanical interlocking, increases the adhesion strength by about 10%. The larger part of the adhesion strength is determined by formation of chemical bonds when adding an adhesion promoter. E.g. addition of 5% adhesion promoter increases the adhesion strength by 90%. These results were, as far as possible, confirmed by the X-ray spectroscopical measurements.     

聚乳酸三维微结构条件下人神经母细胞瘤细胞电压依从式钙通道的功能响应性

以紫外光光刻、硅蚀刻及软光刻技术制备了聚乳酸(poly-L-lactide,PLLA)三维微小凹图式,考察人神经母细胞瘤细胞(SH-SY5Y)在微小凹结构上的生长与分布行为。以共聚焦显微技术结合钙离子荧光染料Calcium Green-1,AM评价SH-SY5Y细胞在PLLA三维微小凹图式和平面基底上电压依从式钙离子通道(VGCCs)的功能响应性。实验发现,分布在微小凹顶部的细胞为二维生长方式,凹内侧壁的为三维生长方式,凹内底部的为边界二维生长方式;以50 mmol/L高钾溶液去极化刺激发现,三维及边界二维细胞VGCCs阳性响应比率为75%和81%,较平面培养的91.2%明显降低。上述结果表明,PLLA三维微结构及细胞生长行为是影响SH-SY5Y细胞VGCCs功能响应性的重要因素,微小凹图式是模拟神经细胞三维生长环境进而构建三维细胞生物传感器的有效途径。     

Fabrication of intermediate mask for deep x-ray lithography

 This paper presents the fabrication of intermediate x-ray mask for deep x-ray lithography. In order to have working mask with absorbers thickness larger than 10 μm, the intermediate mask should have absorbers of 0.7 μm in thickness. To demonstrate intermediate mask fabrication, x-ray zone plates are fabricated on the 1.2 μm low-stress silicon-rich silicon nitride (SiN_x) membrane with the tri-layer Chromium-Tungsten-Chromium (Cr–W–Cr) as the x-ray absorbers. The chromium layers both 200 angstroms are used as adhesion and for stress relief. The SiN_x film is deposited with low pressure chemical vapor deposition (LPCVD) and the free standing membrane are formed by KOH silicon backside etching. With the e-beam lithography and reactive ion etching, width of 0.8 μm of outmost zone of the x-ray zone plates has been achieved on the membrane. The scanning electron microscopy (SEM) images of the x-ray zone plates and pictures of intermediate masks are demonstrated. Received: 25 August 1997/Accepted: 3 September 1997     

Studies of the adhesion properties of LIGA microstructures by X-ray spectroscopy and mechanical measurements

In the first step of the LIGA process microstructures with high aspect ratios are fabricated by patterning a resist layer with deep etch X-ray lithography. As resist typically PMMA (polymethylmethacrylate) is used. For the following electroforming process and to achieve perfect microstructures the adhesion of the PMMA on the substrates is of great importance. For a better understanding the adhesion mechanism, particular induced through the adhesion promoter MEMO (methacryloxypropyl-trimethoxysilane) was investigated on various substrates. Two methods, namely XANES/EXAFS spectroscopy under grazing incidence and shear stress measuremsents were modified for the specific needs of microstructures. Our studies proved that the adhesion strength is determined by two factors. A rough surface, which allows mechanical interlocking, increases the adhesion strength by about 10%. The larger part of the adhesion strength is determined by formation of chemical bonds when adding an adhesion promoter. E.g. addition of 5% adhesion promoter increases the adhesion strnegth by 90%. These results were, as far as possible, confirmed by the X-ray spectroscopical measurements. The financial support of this project by the Federal Ministry of Science and Technology (contract No. 05 5P DAX18) is gratefully acknowledged.     

Experimental study of NiFe and CoFe throughmask electrodeposition of high aspect ratio features

The electrodeposition of NiFe and CoFe onto rotating disk electrodes and into high aspect ratio features in 300 μm-thick photoresist was studied using electrolytes previously considered in the literature. The through-thickness uniformity of the plated features was characterized with reference to the rotating disk electrode results. Current efficiencies for various deposition conditions were also characterized. The composition of NiFe was more sensitive to mixing than CoFe on a rotating disk electrode. This sensitivity was reflected in the higher nonuniformity in general of the plated high aspect ratio NiFe features; a feature with an aspect ratio of three showed decreasing Fe content towards the feature bottom, with the Fe content at the bottom less than half that at the top. CoFe showed only slightly decreasing Fe content for the same aspect ratios. The composition of both alloys near the feature opening (where more mixing occurs) was consistent with that of deposits obtained from rotating disk electrodes at high rotation rates.