SiGe differential transimpedance amplifier with 50-GHz bandwidth

InP and SiGe technologies are both attractive for design of circuits operating at 40 GB/s and beyond. In this paper, we describe a fully differential SiGe transimpedance amplifier (TIA) suitable for differential phase-shift keying applications. The TIA exhibits 49 dB-/spl Omega/ transimpedance, greater than 50-GHz bandwidth, and input-referred current noise less than 30 pA//spl radic/Hz. For comparison, we have also developed a similar TIA in an InP double-heterostructure bipolar transistor technology. The InP TIA had 48 dB-/spl Omega/ transimpedance and 49-GHz bandwidth.     

Fabrication of Transimpedance Amplifier Module and Post‐Amplifier Module for 40 Gb/s Optical Communication Systems

The design and performance of an InGaAs/InP transimpedance amplifier and post amplifier for 40 Gb/s receiver applications are presented. We fabricated the 40 Gb/s transimpedance amplifier and post amplifier using InGaAs/InP heterojunction bipolar transistor (HBT) technology. The developed InGaAs/InP HBTs show a cut‐off frequency (f_T) of 129 GHz and a maximum oscillation frequency (f_max) of 175 GHz. The developed transimpedance amplifier provides a bandwidth of 33.5 GHz and a gain of 40.1 dBΩ. A 40 Gb/s data clean eye with 146 mV amplitude of the transimpedance amplifier module is achieved. The fabricated post amplifier demonstrates a very wide bandwidth of 36 GHz and a gain of 20.2 dB. The post‐amplifier module was fabricated using a Teflon PCB substrate and shows a good eye opening and an output voltage swing above 520 mV.     

A high sensitive 66 dB linear dynamic range receiver for 3-D laser radar

This study presents a CMOS receiver chip realized in 0.18 μm standard CMOS technology and intended for high precision 3-D laser radar. The chip includes an adjustable gain transimpedance pre-amplifier, a post-amplifier and two timing comparators. An additional feedback is employed in the regulated cascode transimpedance amplifier to decrease the input impedance, and a variable gain transimpedance amplifier controlled by digital switches and analog multiplexer is utilized to realize four gain modes, extending the input dynamic range. The measurement shows that the highest transimpedance of the channel is 50 kΩ, the uncompensated walk error is 1.44 ns in a wide linear dynamic range of 66 dB (1:2000), and the input referred noise current is 2.3 pA/√Hz (rms), resulting in a very low detectable input current of 1 μ A with SNR=5.     

应用于10Gb/s光接收机的全差分CMOS跨阻前置电路设计

设计了一种的低成本、低功耗的10 Gb/s光接收机全差跨阻前置放大电路。该电路由跨阻放大器、限幅放大器和输出缓冲电路组成,其可将微弱的光电流信号转换为摆幅为400 mVpp的差分电压信号。该全差分前置放大电路采用0.18 m CMOS工艺进行设计,当光电二极管电容为250 fF时,该光接收机前置放大电路的跨阻增益为92 dB,-3 dB带宽为7.9 GHz,平均等效输入噪声电流谱密度约为23 pA/(0~8 GHz)。该电路采用电源电压为1.8 V时,跨阻放大器功耗为28 mW,限幅放大器功耗为80 mW,输出缓冲器功耗为40 mW,其芯片面积为800 m1 700 m。     

An InGaAs-InP HBT differential transimpedance amplifier with 47-GHz bandwidth

Return-to-zero differential phase-shift keying applications require a differential amplifier with high bandwidth, high gain, low noise, and good input impedance match. In this paper, we describe an InGaAs-InP heterostructure bipolar transistor differential transimpedance amplifier with high bandwidth of 47 GHz and high gain of 56 dB-/spl Omega/. The input-referred current noise is less than 35 pA//spl radic/Hz over the measurement range up to 40 GHz.     

应用于便携式激光雷达测距仪的单芯片全集成前置放大电路系统

基于0.5 m CMOS 工艺,设计了一款应用于便携式激光雷达测距仪的单芯片全集成前置放大电路系统。该芯片主要由前置跨阻放大器（TIPA）,差分电压放大器（DVPA）,带隙基准源和其它接口电路构成。其中如何设计最适用于激光雷达测距信号处理系统的前置跨阻放大器和差分电压放大器是文中重点关注的对象。测试结果表明,该芯片的跨阻增益可达87.27 dB,-3 dB带宽952.8 MHz,输入等效参考噪声电流17.64 pA/Hz1/2。芯片面积为2.816 mm2（包括焊盘面积）,功耗为106.9 mW,其中输出缓冲级功耗占75%。     

Substrate coupling in a high-gain 30-Gb/s SiGe amplifier-modeling, suppression, and measurement

For demonstrating substrate coupling in high-gain broadband amplifiers, a limiting differential transimpedance amplifier has been developed and fabricated in a SiGe bipolar technology. It operates up to 30 Gb/s and stands out for a maximum (nonlinear) transimpedance in the limiting mode of 25 k/spl Omega/, resulting in a gain /spl times/ speed product as high as 750 k/spl Omega//spl middot/Gb/s. This record value could be achieved by applying several techniques for suppression of noise coupling simultaneously. The effectiveness of each technique was verified experimentally by measuring the output eye diagrams of different mounted amplifier versions. The high accuracy potential of the substrate modeling tools applied for optimizing the amplifier design has been demonstrated separately by measurements on special (mounted) test structures up to 40 GHz. These investigations also showed the strong degradation of shielding measures by bond inductances with increasing frequency.     

High-gain transimpedance amplifier in InP-based HBT technology forthe receiver in 40-Gb/s optical-fiber TDM links

A monolithic integrated transimpedance amplifier for the receiver in a 40-Gb/s optical-fiber TDM system has been fabricated in an InP-based HBT technology. Despite its high gain (transimpedance of 2 kΩ in the limiting mode, 10 kΩ in the linear mode) the complete amplifier was realized on a single chip. Clear output eye diagrams were measured up to 43 Gb/s under realistic driving conditions. The voltage swing of 0.6 V_pp at the differential 50 Ω output does not change within the demanded input dynamic range of 6 dB. At the upper input current level even 48 Gb/s were achieved. The power consumption is approximately 600 mW at a single supply voltage of -5.5 V     

6-k/spl Omega/ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range

A high-gain, 43-Gb/s InP HBT transimpedance-limiting amplifier (TIALA) with 100-/spl mu/A/sub pp/ sensitivity and 6 mA/sub pp/ input overload current is presented. The circuit also operates as a limiting amplifier with 40-dB differential gain, better than 15-dB input return loss, and a record-breaking sensitivity of 8 mV/sub pp/ at 43 Gb/s. It features a differential TIA stage with inductive noise suppression in the feedback network and consumes less than 450mW from a single 3.3-V supply. The TIALA has 6-k/spl Omega/ (76dB/spl Omega/) differential transimpedance gain and 35-GHz bandwidth and comprises the transimpedance and limiting gain functions, an auto-zero dc feedback circuit, signal level monitor, and slicing level adjust functions. Other important features include 45-dB isolation and 800-mV/sub pp/ differential output.     

1-Gb/s 80-dB/spl Omega/ fully differential CMOS transimpedance amplifier in multichip on oxide technology for optical interconnects

A 1-Gb/s differential transimpedance amplifier (TIA) is realized in a 0.25-/spl mu/m standard CMOS technology, incorporating the regulated cascode input configuration. The TIA chip is then integrated with a p-i-n photodiode on an oxidized phosphorous-silicon (OPS) substrate by employing the multichip-on-oxide (MCO) technology. The MCO TIA demonstrates 80-dB/spl Omega/ transimpedance gain, 670-MHz bandwidth for 1-pF photodiode capacitance, 0.54-/spl mu/A average input noise current, -17-dBm sensitivity for 10/sup -12/ bit-error rate (BER), and 27-mW power dissipation from a single 2.5-V supply. It also shows negligible switching noise effect from an embedded VCO on the OPS substrate. Furthermore, a four-channel MCO TIA array is implemented for optical interconnects, resulting in less than -40-dB crosstalk between adjacent channels.     

A 250-MHz BiCMOS receiver channel with leading edge timing discriminator for a pulsed time-of-flight laser rangefinder

An integrated receiver channel of a pulsed time-of-flight (TOF) laser rangefinder for fast industrial measurement applications with the measurement accuracy of a few centimeters in the measurement range from /spl sim/1 m to /spl sim/30 m to noncooperative targets was developed. The receiver channel consists of a fully differential transimpedance amplifier channel, a peak detector, an rms meter and a timing discriminator. In this particular application there is no time to measure the received signal strength beforehand and it is not predictable from previous measurements, so a leading edge timing discriminator with a constant threshold voltage was used. The amplitude of the received pulse is measured with a peak detector and the amplitude information is used to compensate for the resulting walk error. The measured bandwidth of the receiver channel is 250 MHz, the maximum transimpedance 40k/spl Omega/ and the input-referred noise /spl sim/7pA//spl radic/Hz (C/sub photodiode/=2 pF). The timing detection accuracy of the receiver is better than /spl plusmn/35 mm in a single-shot measurement in a dynamic range of 1:4000 and a temperature range of 0/spl deg/C to +50/spl deg/C.     

GaAs HBT 0.75-5 GHz multifunctional microwave-analog variable gainamplifier

We report on a GaAs HBT 3-stage variable gain amplifier operating over a 0.75-5 GHz frequency band. The amplifier is broken up into a single-ended HBT LNA pre-amplifier, an analog current steering differential cascode cell for variable gain control, and a differential amplifier output stage. The broadband pre-amplifier is required to reduce the inherently noisy differential cascode stage, and an output differential amplifier is used to provide output drive capability and differential to single-ended conversion. The VGA has a maximum gain of 23.8 dB gain, an IP3>18 dBm, and a noise figure of 6.5 dB. The variable gain control range is >35 dB. This chip demonstrates the versatility of HBT IC technology which can integrate digital, analog, and microwave circuit functions to achieve high performance in a single monolithic chip     

Low-power 10 Gb/s inductorless inverter based common-drain active feedback transimpedance amplifier in 40 nm CMOS

This study presents an inductorless 10 Gb/s transimpedance amplifier (TIA) implemented in a 40 nm CMOS technology. The TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50 Ω differential output driver to provide an interface to the measurement setup. The optical receiver shows measured optical sensitivities of ?17.7 and ?16.2 dBm at BER = 10^?12 for data rates of 8 and 10 Gb/s, respectively. The TIA has a simulated transimpedance gain of 47 dBΩ, 8 GHz bandwidth with 0.45 pF total input capacitance for the photodiode, ESD protection and input PAD. The TIA occupies 0.0002 mm² whereas the complete optical receiver occupies a chip area of 0.16 mm². The power consumption of the TIA is only 2.03 mW and the complete chip dissipates 17 mW for a 1.1 V single supply voltage. The complete optical receiver has a measured transimpedance gain of 57.5 dBΩ.     

A wide-dynamic-range, high-transimpedance Si bipolar preamplifierIC for 10-Gb/s optical fiber links

A wide-dynamic-range, high-transimpedance preamplifier IC for 10-Gb/s optical fiber links was developed using a 0.3-μm Si bipolar process. The preamplifier with a limiting amplifier enables a wide dynamic range from 16 μApp to 2.5 mApp and a high transimpedance of 1 kΩ (2 kΩ in the differential output mode). Moreover, careful circuit design achieves a transimpedance fluctuation of 0.5 dBR and an average equivalent input noise current density of 12 pA/√Hz. This preamplifier IC has the highest transimpedance of any Si bipolar preamplifier for 10-Gb/s operation. Thus, the preamplifier is suitable for 10-Gb/s short-haul optical fiber links and can be used to provide a low-cost system     

Modulator driver and photoreceiver for 20 Gb/s optic-fiber links

Two integrated circuits, a modulator driver and a photoreceiver integrating a metal-semiconductor-metal (MSM) photodetector, a differential transimpedance amplifier and two limiting amplifier stages for high-speed optical-fiber links are presented. The IC's were manufactured in a 0.2 μm gate-length AlGaAs-GaAs high-electron mobility transistor (HEMT) technology with a f_T of 60 GHz. The modulator driver IC operates up to 25 Gb/s with an output voltage swing of 3.3 V_p-p at each output. The 1.3-1.55 μm wavelength monolithically integrated photoreceiver optoelectronic integrated circuit (OEIC) has a bandwidth of 17 GHz with a high transimpedance gain of 12 kΩ. Eye diagrams are demonstrated at 20 Gb/s with an output voltage of 1 V_p.p     

A four-channel monolithic optical/electronic selector for fastpacket-switched WDMA networks

We report the characteristics of a four-channel monolithic GaAs optical/electronic selector for applications in fast packet-switched wavelength division multiaccess networks. The selector chip consists of four metal-semiconductor-metal photodetectors sharing a single differential transimpedance amplifier selected by four enhancement-mode MESFET switches. The channel switching time is about 2 ns and no appreciable crosstalk is observed from neighboring channels     

BiCMOS variable gain transimpedance amplifier for automotive applications

A new BiCMOS variable gain transimpedance amplifier with a large area integrated photodiode for automotive applications is presented. Through careful control of the input pole position and the frequency response of the core amplifier, the bandwidth of the transimpedance amplifier varies from 112 to 300 MHz when its gain changes from 14.2 kOmega to 400 Omega. The proposed circuit configuration maintains a high voltage across a common anode photodiode, and its bandwidth in highest gain varies from 121 to 102 MHz over a temperature range of -40 to +140degC. Simulation results in a 0.6 mum Si BiCMOS technology are given. The amplifier consumes 16 mW from a 3.3 V supply.     

High-gain differential CMOS transimpedance amplifier with on-chip buried double junction photodiode

An integrated fully differential CMOS transimpedance amplifier (TIA) with buried double junction photodiode input is described. The TIA features a variable high transimpedance gain (250 k/spl Omega/ to 2.5 M/spl Omega/), large DC photocurrent rejection capability (>55 dB) and low input referred noise density at 100 kHz (2pA//spl radic/Hz).     

Design of a low-power 3.5-GHz broad-band CMOS transimpedance amplifier for optical transceivers

This paper describes a novel low-power low-noise CMOS voltage-current feedback transimpedance amplifier design using a low-cost Agilent 0.5-/spl mu/m 3M1P CMOS process technology. Theoretical foundations for this transimpedance amplifier by way of gain, bandwidth and noise analysis are developed. The bandwidth of the amplifier was extended using the inductive peaking technique, and, simulation results indicated a -3-dB bandwidth of 3.5 GHz with a transimpedance gain of /spl ap/60 dBohms. The dynamic range of the amplifier was wide enough to enable an output peak-to-peak voltage swing of around 400 mV for a test input current swing of 100 /spl mu/A. The output noise voltage spectral density was 12 nV//spl radic/Hz (with a peak of /spl ap/25 nV//spl radic/Hz), while the input-referred noise current spectral density was below 20 pA//spl radic/Hz within the amplifier frequency band. The amplifier consumes only around 5 mA from a 3.3-V power supply. A test chip implementing the transimpedance amplifier was also fabricated using the low-cost CMOS process.     

F-TRIA01: A Fast Bipolar Transimpedance Amplifier

This paper describes a new transimpedance amplifier for fast current pulses delivered by high energy particle detectors. The choice of a bipolar technology allowed a 100 low input impedance and a rise time down to 1 nS. The fully differential current mode architecture provides an excellent linearity and a large versatility as for its transimpedance, bandwidth and power consumption.