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 共查询到18条相似文献,搜索用时 15 毫秒
1.
The impact of technological processes on Germanium-On-Insulator (GeOI) noise performance is studied. We present an experimental investigation of low-frequency noise (LFN) measurements carried out on (GeOI) PMOS transistors with different process splits. The front gate is composed of a SiO2/HfO2 stack with a TiN metal gate electrode. The result is an aggressively reduced equivalent oxide thickness (EOT) of 1.8 nm. The buried oxide is used as a back gate for experimental purposes. Front and back gate interfaces are characterized and the slow oxide trap densities are extracted. The obtained values are comprised between 5 × 1017 and 8 × 1018 cm−3eV−1. No correlation between front interface trap density and front interface mobility is observed. We underline a strong correlation between rear interface trap density and rear interface mobility degradation. The impact of Ge film thickness is equally studied. For thin films, the measured drain-current noise spectral density shows that LFN can be described by the carrier fluctuation model from weak to strong inversion. For thicker film devices, in weak inversion the LFN can be described by the mobility fluctuation model and in strong inversion the LFN is described by the carrier fluctuation model. The αH parameter for these devices is 1.2 × 10−3. These results are significant for the future development of GeOI technologies.  相似文献   

2.
刘宇安  庄奕琪 《半导体学报》2014,35(12):124005-5
This work presents a theoretical and experimental study on the gate current 1/f noise in Al Ga N/Ga N HEMTs. Based on the carrier number fluctuation in the two-dimensional electron gas channel of Al Ga N/Ga N HEMTs, a gate current 1/f noise model containing a trap-assisted tunneling current and a space charge limited current is built. The simulation results are in good agreement with the experiment. Experiments show that, if Vg Vx, gate current 1/f noise comes from not only the trap-assisted tunneling RTS, but also the space charge limited current RTS. This indicates that the gate current 1/f noise of the Ga N-based HEMTs device is sensitive to the interaction of defects and the piezoelectric relaxation. It provides a useful characterization tool for deeper information about the defects and their evolution in Al Ga N/Ga N HEMTs.  相似文献   

3.
胡蓉彬  王育新  陆妩 《半导体学报》2014,35(2):024006-6
Using 0.18 μm CMOS transistors, the total dose effects on the 1/f noise of deep-submicron CMOS transistors are studied for the first time in mainland China. From the experimental results and the theoretic analysis, we realize that total dose radiation causes a lot of trapped positive charges in STI (shallow trench isolation) SiO2 layers, which induces a current leakage passage, increasing the 1/f noise power of CMOS transistors. In addition, we design some radiation-hardness structures on the CMOS transistors and the experimental results show that, until the total dose achieves 750 krad, the 1/f noise power of the radiation-hardness CMOS transistors remains unchanged, which proves our conclusion.  相似文献   

4.
研究发现辐照能使双极线性稳压器LM117的输出1/f噪声性能退化。本文在研究双极线性稳压器LM117的辐照失效机理基础上,认为LM117的内部带隙基准是其噪声性能退化的关键部件,辐照引起的带隙基准内部的双极性晶体管的基极表面复合电流的退化,导致LM117输出1/f噪声发生退化。通过对比,可以看出1/f噪声比电参数敏感,也可以用来表征LM117辐照损伤。  相似文献   

5.
Based on the whitening property of wavelet transformation for 1/f noise, this paper addresses the problem of detecting deterministic signals in the presence of 1/f fractal noise. The transfer function of whitening filter is provided as well as the condition for whitening. The receiver structure based on Karhunen-Loeve expansion and the decision rule are also given. Finally performance of the detector is analyzed.  相似文献   

6.
We present an investigation of the dependence of low-frequency noise on device geometry in advanced npn silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs). The devices examined in this work have fixed emitter width (WE = 0.4 μm), but varying emitter length (0.5 μm  LE  20.0 μm), and thus the ratio of the emitter perimeter (PE) to the emitter area (AE) varies widely, making it ideal for examining geometrical effects. The SPICE noise parameter AF extracted from these devices decreases with increasing LE. Furthermore, the low-frequency noise measured on SiGe HBTs with significantly different PE/AE ratios suggests a possibility that the fundamental noise source for the diffusion base current may be located at the emitter periphery. Transistors with different distances between the emitter edge and the shallow trench edge (XEC), and shallow trench edge to deep trench edge (XTC), are also investigated. The SiGe HBTs with a smaller value of XEC have higher low-frequency noise, but no significant difference is found in devices with varying XTC. Explanations of the observed noise behavior are suggested.  相似文献   

7.
Hafnium oxide (HfO2) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl4) source by surface sol-gel process, then ultrathin (HfO2)x(SiO2)1−x films were fabricated due to the reaction of SiO2 layer with HfO2 under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO2 and pre-grown SiO2 layer, and the composition was Hf0.52Si0.48O2 under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO2)x(SiO2)1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.  相似文献   

8.
Si1−xGex/Si heterostructures play a primary role in the Si-based fast electronics developments of today. In this work, we will present the experimental results of infrared spectroscopic ellipsometry (IRSE) for structural determination of the boron heavily doped SiGe/Si sample grown by ultra-high vacuum chemical vapor deposition (UHVCVD) (the Ge atomic percent, the thickness of SiGe film and boron concentration). Especially, the principle of boron concentration in p-type SiGe film layer determined by IRSE was elucidated in detail. In addition, in order to corroborate the validity of IRSE for determining dopant concentration, secondary ion mass spectroscopy (SIMS) experiment has also been carried out. The close experimental agreement between IRSE and SIMS demonstrate that IRSE as a contactless, and non-destructive technology can be used in-line tools in production used for measuring the Ge content, the thickness of SiGe layer and boron concentration in p-type dopant SiGe/Si heterostructure, which often used the base layer of SiGe hetero-junction bipolar transistor (HBT) devices.  相似文献   

9.
The effect of thick film Ni(1−x)CoxMn2O4 in-touch overlay on the X band resonance characteristics of thick film microstrip ring resonator is studied. The thick film overlay decreases the resonance frequency and increases the peak output. From the frequency shift the dielectric constant of the thick film Ni(1−x)CoxMn2O4 has been calculated. For the first time Ag thick film microstrip ring resonator has been used to study thick film Ni(1−x)CoxMn2O4 in the X band.  相似文献   

10.
Simulation studies are carried out on the large signal and noise properties of heterojunction (HT) AlxGa1-xAs/GaAs double drift region (DDR) IMPATT devices at V-band (60 GHz). The dependence of Al mole fraction on the aforementioned properties of the device has been investigated. A full simulation software package has been indigenously developed for this purpose. The large signal simulation is based on a non-sinusoidal voltage excitation model. Three mole fractions of Al and two complementary HT DDR structures for each mole fraction i.e., six DDR structures are considered in this study. The purpose is to discover the most suitable structure and corresponding mole fraction at which high power, high efficiency and low noise are obtained from the device. The noise spectral density and noise measure of all six HT DDR structures are obtained from a noise model and simulation method. Similar studies are carried out on homojunction (HM) DDR GaAs IMPATTs at 60 GHz to compare their RF properties with those of HT DDR devices. The results show that the HT DDR device based on N-AlxGa1-xAs/p-GaAs with 30% mole fraction of Al is the best one so far as large signal power output, DC to RF conversion efficiency and noise level are concerned.  相似文献   

11.
Density functional theory was used to performed a survey of transition metal oxide (MO2 = ZrO2, HfO2) ordered molecular adsorbate bonding configurations on the Ge(1 0 0)-4 × 2 surface. Surface binding geometries of metal-down (O-M-Ge) and oxygen-down (M-O-Ge) were considered, including both adsorbate and displacement geometries of M-O-Ge. Calculated enthalpies of adsorption show that bonding geometries with metal-Ge bonds (O-M-Ge) are essentially degenerate with oxygen-Ge bonding (M-O-Ge). Calculated electronic structures indicate that adsorbate surface bonding geometries of the form O-M-Ge tend to create a metallic interfaces, while M-O-Ge geometries produce, in general, much more favorable electronic structures. Hydrogen passivation of both oxygen and metal dangling bonds was found to improve the electronic structure of both types of MO2 adsorbate systems, and induced the opening of true semiconducting band gaps for the adsorbate-type M-O-Ge geometries. Shifts observed in the DOS minima for both O-M-Ge and M-O-Ge adsorbate geometries are consistent with surface band bending induced by the adsorbate films, where such band bending extends much further into the Ge substrate than can be modeled by the Ge slabs used in this work.  相似文献   

12.
An accurate charge control model to investigate the effect of aluminum composition, strain relaxation, thickness and doping of the AlmGa1−mN barrier layer on the piezoelectric and spontaneous polarization induced 2-DEG sheet charge density, threshold voltage and output characteristics of partially relaxed AlmGa1−mN/GaN HEMTs is proposed. The strain relaxation of the barrier imposes an upper limit on the maximum 2-DEG density achievable in high Al content structures and is critical in determining the performance of lattice mismatched AlmGa1−mN/GaN HEMTs. The model incorporates the effects of field dependent mobility, parasitic source/drain resistance and velocity saturation to evaluate the output characteristics of AlmGa1−mN/GaN HEMTs. Close proximity with published results confirms the validity of the proposed model.  相似文献   

13.
In this work we investigate the effects of NO annealing and forming gas (FG) an-nealing on the electrical properties of SiO2/SiC interface by low-temperature con-ductance measurements. With nitrogen passivation, the density of interface states (DIT) is significantly reduced in the entire energy range, and the shift of flatband voltage, ΔVFB, is effectively suppressed to less than 0.4 V. However, very fast states are ob-served after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and ΔVFB are further re-duced. The values of the DIT decrease to less than 1011 cm-2eV-1 for the energy range of EC-ET≥0.4 eV. It is suggested that the fast states in shallow energy levels origi-nated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the re-sidual Si and C dangling bonds corresponding to traps at deep energy levels and im-prove the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high perfor-mance SiC MOSFETs.  相似文献   

14.
The dielectric properties and AC electrical conductivity ac)of the (Ni/Au)/Al0.22Ga0.78N/AlN/GaN heterostructures, with and without the SiNx passivation, have been investigated by capacitance-voltage and conductance-voltage measurements in the wide frequency (5kHz-5 MHz) and temperature (80-400 K) range. The experimental values of the dielectric constant (ε′), dielectric loss (ε′′), loss tangent (tanδ), σac and the real and imaginary part of the electric modulus (M′ and M′′) were found to be a strong function of frequency and temperature. A decrease in the values of ε′ and ε′′ was observed, in which they both showed an increase in frequency and temperature. The values of M′ and M′′ increase with increasing frequency and temperature. The σac increases with increasing frequency, while it decreases with increasing temperature. It can be concluded, therefore, that the interfacial polarization can occur more easily at low frequencies and temperatures with the number of interface states density located at the metal/semiconductor interface. It contributes to the ε′ and σac.  相似文献   

15.
A comparative study of the kinetics of interfacial reaction between the eutectic solders (Sn-3.5Ag, Sn-57Bi, and Sn-38Pb) and electroplated Ni/Pd on Cu substrate (Cu/Ni/NiPd/Ni/Pd) was performed. The interfacial microstructure was characterized by imaging and energy dispersive x-ray analysis in scanning electron microscope (SEM). For a Pd-layer thickness of less than 75 nm, the presence or the absence of Pd-bearing intermetallic was found to be dependent on the reaction temperature. In the case of Sn-3.5Ag solder, we did not observe any Pd-bearing intermetallic after reaction even at 230°C. In the case of Sn-57Bi solder the PdSn4 intermetallic was observed after reaction at 150°C and 180°C, while in the case of Sn-38Pb solder the PdSn4 intermetallic was observed after reaction only at 200°C. The PdSn4 grains were always dispersed in the bulk solder within about 10 μm from the solder/substrate interface. At higher reaction temperatures, there was no Pd-bearing intermetallic due to increased solubility in the liquid solder. The presence or absence of Pd-bearing intermetallic was correlated with the diffusion path in the calculated Pd-Sn-X (X=Ag, Bi, Pb) isothermal sections. In the presence of unconsumed Ni, only Ni3Sn4 intermetallic was observed at the solder-substrate interface by SEM. The presence of Ni3Sn4 intermetallic was consistent with the expected diffusion path based on the calculated Ni-Sn-X (X=Ag, Bi, Pb) isothermal sections. Selective etching of solders revealed that Ni3Sn4 had a faceted scallop morphology. Both the radial growth and the thickening kinetics of Ni3Sn4 intermetallic were studied. In the thickness regime of 0.14 μm to 1.2 μm, the growth kinetics always yielded a time exponent n >3 for liquid-state reaction. The temporal law for coarsening also yielded time exponent m >3. The apparent activation energies for thickening were: 16936J/mol for the Sn-3.5Ag solder, 17804 J/mol for the Sn-57Bi solder, and 25749 J/mol for the Sn-38Pb solder during liquid-state reaction. The corresponding activation energies for coarsening were very similar. However, an apparent activation energy of 37599 J/mol was obtained for the growth of Ni3Sn4 intermetallic layer during solid-state aging of the Sn-57Bi/substrate diffusion couples. The kinetic parameters associated with thickening and radial growth were discussed in terms of current theories.  相似文献   

16.
Charge pumping and low frequency noise measurements for depth profiling have been studied systematically using a set of gate stacks with various combinations of IL and HfO2 thicknesses. The distribution of generated traps after HCI and PBTI stress was also investigated. The drain-current power spectral density made up all of the traps of IL in 0 < z < TIL and the traps of HfO2 in TIL < z < THK. The traps near the Si/SiO2 interface dominated the 1/f noise at higher frequencies, which is common in SiO2 dielectrics. For the HfO2/SiO2 gate stack, however, the magnitude of the 1/f noise did not significantly change after HCI and PBTI because of more traps in the bulk HfO2 film than at the bottom of the interface.  相似文献   

17.
In this paper we show that pseudomorphically strained heterostructures of InAs x P1−x /InP may be an alternative to lattice-matched heterostructures of In1−x Ga x As y P1−y /InP for optoelectronic applications. We first studied the group-V composition control in the gas-source molecular beam epitaxy (GSMBE) of the GaAs1-x P x /GaAs system. Then we studied GSMBE of strained InAs x P1−x /InP multiple quantum wells with the ternary well layer in the composition range 0.15 <x < 0.75. Structural and optical properties were characterized by high-resolution x-ray rocking curves, transmission electron microscopy, absorption and low-temperature photoluminescence measurements. High-quality multiple-quantum-well structures were obtained even for highly strained (up to 2.5%) samples. The achievement of sharp excitonic absorptions at 1.06, 1.3 and 1.55μm at room temperature from InAs x P1−x /InP quantum wells suggests the possibility of long-wavelength optoelectronic applications.  相似文献   

18.
A CMOS LC voltage controlled oscillator (VCO) based on current reused topology with low phase noise and low power consumption is presented for IEEE 802.11a (Seller et al. A 10 GHz distributed voltage controlled oscillator for WLAN application in a VLSI 65 nm CMOS process, in: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 3–5 June, 2007, pp. 115–118.) application. The chip1 is designed with the tail current-shaping technique to obtain the phase noise −116.1 dBc/Hz and power consumption 3.71 mW at the operating frequency 5.2 GHz under supply voltage 1.4 V. The second chip of proposed VCO can achieve power consumption Sub 1 mW and is still able to maintain good phase noise. The current reused and body-biased architecture can reduce power consumption, and better phase noise performance is obtained through raising the Q value. The measurement result of the VCO oscillation frequency range is from 5.082 GHz to 5.958 GHz with tuning range of 15.8%. The measured phase noise is −115.88 dBc/Hz at 1 MHz offset at the operation frequency of 5.815 GHz. and the dc core current consumption is 0.71 mA at a supply voltage of 1.4 V. Its figure of merit (FOM) is −191 dBc/Hz. Two circuits were taped out by TSMC 0.18 μm 1P6M process.  相似文献   

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