A novel thermally-stable zirconium amidinate ALD precursor for ZrO2 thin films

ZrO₂ thin films were deposited by the atomic layer deposition process on Si substrates using tetrakis(N,N′-dimethylacetamidinate) zirconium (Zr-AMD) as a Zr precursor and H₂O as an oxidizing agent. Tetrakis (ethylmethylamino) zirconium (TEMA-Zr) was also evaluated for a comparative study. Physical properties of ALD-derived ZrO₂ thin films were studied using ellipsometry, grazing incidence XRD (GI-XRD), high resolution TEM (HRTEM), and atomic force microscopy (AFM). The ZrO₂ deposited using Zr-AMD showed a better thermal stability at high substrate temperature (>300 °C) compared to that using TEMA-Zr. GI-XRD analysis reveals that after 700 °C anneal both ZrO₂ films enter tetragonal phase. The electrical properties of N₂-annealed ZrO₂ film using Zr-AMD exhibit an EOT of 1.2 nm with leakage current density as low as 2 × 10⁻³ A/cm² (@V_fb−1 V). The new Zr amidinate is a promising ALD precursor for high-k dielectric applications.     

I-V characteristics of a methanol sensor for direct methanol fuel cell (DMFC) as a function of deposited platinum (Pt) thickness

We have fabricated methanol sensor for monitoring the methanol concentration in direct methanol fuel cells. A thin composite nafion membrane was used as an electrolyte. We have analyzed the I-V characteristic of the fabricated methanol sensor as functions of methanol concentration, catalyst electrode and platinum (Pt) thickness. When we measured the sensor with 10 nm Pt and at 1 V, the current value was 1.30×10⁻⁶, 1.96×10⁻⁶, and 2.80×10⁻⁶ A for three methanol concentration of 1, 2, and 3 M, respectively. And when the methanol concentration was fixed at 2 M, the current value of the fabricated device with Pt of 5, 10 and 15 nm was 3.06×10⁻⁶, 1.96×10⁻⁶, and 1.00×10⁻⁶ A, respectively.     

ALD of LaHfOx nano-laminates for high-κ gate dielectric applications

Electrical properties and thermal stability of LaHfO_x nano-laminate films deposited on Si substrates by atomic layer deposition (ALD) have been investigated for future high-κ gate dielectric applications. A novel La precursor, tris(N,N′-diisopropylformamidinato) lanthanum [La(ⁱPrfAMD)₃], was employed in conjunction with conventional tetrakis-(ethylmethyl)amido Hf (TEMA Hf) and water (H₂O). The capacitance-voltage curves of the metal oxide semiconductor capacitors (MOSCAPs) showed negligible hysteresis and frequency dispersion, indicating minimal deterioration of the interface and bulk properties. A systematic shift in the flat-band voltage (V_fb) was observed with respect to the change in structure of nano-laminate stacks as well as La₂O₃ to HfO₂ content in the films. The EOTs obtained were in the range of ∼1.23-1.5 nm with leakage current densities of ∼1.3 × 10⁻⁸ A/cm² to 1.3 × 10⁻⁵ A/cm² at V_fb − 1 V. In addition, the films with a higher content of La₂O₃ remained amorphous up to 950 °C indicating very good thermal stability, whereas the HfO₂ rich films crystallized at lower temperatures.     

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

A Ge-stabilized tetragonal ZrO₂ (t-ZrO₂) film with permittivity (κ) of 36.2 was formed by depositing a ZrO₂/Ge/ZrO₂ laminate and a subsequent annealing at 600 °C, which is a more reliable approach to control the incorporated amount of Ge in ZrO₂. On Si substrates, with thin SiON as an interfacial layer, the SiON/t-ZrO₂ gate stack with equivalent oxide thickness (EOT) of 1.75 nm shows tiny amount of hysteresis and negligible frequency dispersion in capacitance-voltage (C-V) characteristics. By passivating leaky channels derived from grain boundaries with NH₃ plasma, good leakage current of 4.8 × 10⁻⁸ A/cm² at V_g = V_fb − 1 V is achieved and desirable reliability confirmed by positive bias temperature instability (PBTI) test is also obtained.     

Improvement on low-temperature deposited HfO2 film and interfacial layer by high-pressure oxygen treatment

In this study, high-pressure oxygen (O₂ and O₂ + UV light) technologies were employed to effectively improve the properties of low-temperature-deposited metal oxide dielectric films and interfacial layer. In this work, 13 nm HfO₂ thin films were deposited by sputtering method at room temperature. Then, the oxygen treatments with a high-pressure of 1500 psi at 150 °C were performed to replace the conventional high temperature annealing. According to the XPS analyses, integration area of the absorption peaks of O-Hf and O-Hf-Si bonding energies apparently raise and the quantity of oxygen in deposited thin films also increases from XPS measurement. In addition, the leakage current density of standard HfO₂ film after O₂ and O₂ + UV light treatments can be improved from 3.12 × 10⁻⁶ A/cm² to 6.27 × 10⁻⁷ and 1.3 × 10⁻⁸ A/cm² at |Vg| = 3 V. The proposed low-temperature and high pressure O₂ or O₂ + UV light treatment for improving high-k dielectric films is applicable for the future flexible electronics.     

A low gate leakage current and small equivalent oxide thickness MOSFET with Ti/HfO2 high-k gate dielectric

Annealing effects on electrical characteristics and reliability of MOS device with HfO₂ or Ti/HfO₂ high-k dielectric are studied in this work. For the sample with Ti/HfO₂ higher-k dielectric after a post-metallization annealing (PMA) at 600 °C, its equivalent oxide thickness value is 7.6 Å and the leakage density is about 4.5 × 10⁻² A/cm². As the PMA is above 700 °C, the electrical characteristics of MOS device would be severely degraded.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors

The HfO₂ high-k thin films have been deposited on p-type (1 0 0) silicon wafer using RF magnetron sputtering technique. The XRD, AFM and Ellipsometric characterizations have been performed for crystal structure, surface morphology and thickness measurements respectively. The monoclinic structured, smooth surface HfO₂ thin films with 9.45 nm thickness have been used for Al/HfO₂/p-Si metal-oxide-semiconductor (MOS) structures fabrication. The fabricated Al/HfO2/Si structure have been used for extracting electrical properties viz dielectric constant, EOT, barrier height, doping concentration and interface trap density through capacitance voltage and current-voltage measurements. The dielectric constant, EOT, barrier height, effective charge carriers, interface trap density and leakage current density are determined are 22.47, 1.64 nm, 1.28 eV, 0.93 × 10¹⁰, 9.25 × 10¹¹ cm⁻² eV⁻¹ and 9.12 × 10⁻⁶ A/cm² respectively for annealed HfO₂ thin films.     

Water-soluble poly(3,4-ethylenedioxythiophene)/nano-crystalline TiO2 heterojunction solar cells

Nanocrystalline titanium dioxide (TiO₂) thin films were prepared by the sol-gel method and were then used to fabricate an indium-tin oxide (ITO)/nano-crystalline TiO₂/poly(3,4-ethylenedioxythiophene) (PEDOT)/Au device. The junction thus obtained shows a rectifying behavior. Their current-voltage (I-V) characteristics in dark indicate that a heterojunction at the nano-crystalline TiO₂/PEDOT interface has been created. The measured open-circuit voltage (V_oc) and short-circuit current (I_sc) for the device under illumination with 50 mW/cm² light intensity under AM 1.5 conditions (device dimension was 1 cm²) are V_oc=0.39 V, I_sc=54.9 μA/cm², the filling factor (FF)=0.429 and the energy conversion efficiency (η)=0.03%.     

Interface state densities, low frequency noise and electron mobility in surface channel In0.53Ga0.47As n-MOSFETs with a ZrO2 gate dielectric

This paper reports on an investigation of interface state densities, low frequency noise and electron mobility in surface channel In_0.53Ga_0.47As n-MOSFETs with a ZrO₂ gate dielectric. Interface state density values of D_it ∼ 5 × 10¹² cm⁻² eV⁻¹ were extracted using sub-threshold slope analysis and charge pumping technique. The same order of magnitude of trap density was found from low frequency noise measurements. A peak effective electron mobility of 1200 cm²/Vs has been achieved. For these surface channel In_0.53Ga_0.47As n-MOSFETs, it was found that η parameter, an empirical parameter used to calculate the effective electric field, was ∼0.55, and is to be comparable to the standard value found in Si device.     

Transport and interface states in high-κ LaSiOx dielectric

The paper presents the results of capacitance-voltage, conductance-frequency and current-voltage characterization in the wide temperature range (140-300 K) as well as results of low temperature (5-20 K) thermally stimulated currents (TSC) measurements of metal-oxide-semiconductor (MOS) structures with a high-κ LaSiO_x dielectric deposited on p- and n-type Si(1 0 0) substrate. Interface states (D_it) distribution determined by several techniques show consistent result and demonstrates the adequacy of techniques used. Typical maxima of interface states density were found as 4.6 × 10¹¹ eV⁻¹cm⁻² at 0.2 eV and 7.9 × 10¹¹ eV⁻¹cm⁻² at 0.77 eV from the silicon valence band. The result of admittance spectroscopy showed the presence of local states in bandgap with activation energy E_a = 0.38 eV from silicon conductance band, which is in accord with interface states profile acquired by conductance method. Low-temperature TSC spectra show the presence of shallow traps at the interface with activation energies ranging from 15 to 32 meV. The charge carrier transport through the dielectric film was found to occur via Poole-Frenkel mechanism at forward bias.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.     

Mobility enhancement by using silk fibroin in F16CuPc organic thin film transistors

High performance n-type F₁₆CuPc organic thin-film transistors (OTFTs) were fabricated on polyethylene terephthalate (PET) using silk fibroin as the gate dielectric. The average field-effect mobility (μ_FE) value in the saturation regime is 0.39 cm² V⁻¹ s⁻¹ approximately one order of magnitude higher than the reported values in the literature. A typical F₁₆CuPc OTFT exhibits an on/off current ratio of 9.3 × 10², a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade. The enhancement of μ_FE results from very good crystal quality of F₁₆CuPc on silk fibroin, supported by grazing incidence X-ray diffraction (GIXD) data.     

The interface states analysis of the MIS structure as a function of frequency

The energy distribution of interface states (N_ss) and their relaxation time (τ) were of the fabricated the Al/SiO₂/p-Si (MIS) structures were calculated using the forward bias current-voltage (I-V), capacitance-frequency (C-f) and conductance-frequency (G-f) measurements. Typical ln[I/(1 − exp(−qV/kT)] versus V characteristics of MIS structure under forward bias show one linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n), the barrier height (Φ_b) and the saturation current (I_S) evaluated to 1.32, 0.77 eV and 3.05 × 10⁻⁹ A, respectively. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer at metal-semiconductor interface, the interface states and barrier inhomogeneity of the device. The energy distribution of interface states (N_ss) and their relaxation time (τ) have been determined in the energy range from (0.37 − E_v) to (0.57 − E_v) eV. It has been seen that the N_ss has almost an exponential rise with bias from the mid gap toward the top of valance band. In contrary to the N_ss, the relaxation time (τ) shows a slow exponential rise with bias from the top of the E_v towards the mid gap energy of semiconductor. The values of N_ss and τ change from 6.91 × 10¹³ to 9.92 × 10¹³ eV⁻¹ cm⁻² and 6.31 × 10⁻⁴ to 0.63 × 10⁻⁴ s, respectively.     

Effects of high doping on the bandgap bowing for AlxGa1−xN

This paper gives the composition dependence of the bandgap energy for highly doped n-type Al_xGa_1−xN. We report results of the bowing parameter obtained using a random simulation. Three groups of Al_xGa_1−xN semiconductors were considered and which are distinguishable by their non degenerate or degenerate character in the doping density (10¹⁷?N_D?10²⁰ cm⁻³). A striking feature is the large discrepancy of the bandgap bowing (−2.02?b?2.94 eV), as was demonstrated from our calculations. This suggests that high doping may be a possible cause able to induce the large range of bowing parameters reported for Al_xGa_1−xN alloys.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.     

Investigation of atomic vapour deposited TiN/HfO2/SiO2 gate stacks for MOSFET devices

HfO₂ films were grown by atomic vapour deposition (AVD) on SiO₂/Si (1 0 0) substrates. The positive shift of the flat band voltage of the HfO₂ based metal-oxide-silicon (MOS) devices indicates the presence of negative fixed charges with a density of 5 × 10¹² cm⁻². The interface trap charge density of HfO₂/SiO₂ stacks can be reduced to 3 × 10¹¹ eV⁻¹ cm⁻² near mid gap, by forming gas annealing. The extracted work function of 4.7 eV preferred the use of TiN as metal gate for PMOS transistors. TiN/HfO₂/SiO₂ gate stacks were integrated into gate-last-formed MOSFET structures. The extracted maximum effective mobility of HfO₂ based PMOS transistors is 56 cm²/Vs.     

Electrical characterization of poly(amide-imide) for application in organic field effect devices

The admittance spectra and current–voltage (I–V) characteristics are reported of metal–insulator–metal (MIM) and metal–insulator–semiconductor (MIS) capacitors employing cross-linked poly(amide–imide) (c-PAI) as the insulator and poly(3-hexylthiophene) (P3HT) as the active semiconductor. The capacitance of the MIM devices are constant in the frequency range from 10 Hz to 100 kHz, with tan δ values as low as 7 × 10⁻³ over most of the range. Except at the lowest voltages, the I–V characteristics are well-described by the Schottky equation for thermal emission of electrons from the electrodes into the insulator. The admittance spectra of the MIS devices displayed a classic Maxwell–Wagner frequency response from which the transverse bulk hole mobility was estimated to be ∼2 × 10⁻⁵ cm² V⁻¹s⁻¹ or ∼5 × 10⁻⁸ cm² V⁻¹s⁻¹ depending on whether or not the surface of the insulator had been treated with hexamethyldisilazane (HMDS) prior to deposition of the P3HT. From the maximum loss observed in admittance-voltage plots, the interface trap density was estimated to be ∼5 × 10¹⁰ cm⁻² eV⁻¹ or ∼9 × 10¹⁰ cm⁻² eV⁻¹ again depending whether or not the insulator was treated with HMDS. We conclude, therefore, that HMDS plays a useful role in promoting order in the P3HT film as well as reducing the density of interface trap states. Although interposing the P3HT layer between the insulator and the gold electrode degrades the insulating properties of the c-PAI, nevertheless, they remain sufficiently good for use in organic electronic devices.     

AlGaN/GaN self-aligned MODFET with metal oxide gate for millimeter wave application

As promising candidates for future microwave power devices, GaN-based high-electron mobility transistors (HEMTs) have attracted much research interest. An investigation of the operation of AlGaN/GaN n type self-aligned MOSFET with modulation doped GaN channels is presented. Liquid phase deposited (LPD) SiO₂ is used as the insulating material. An analytical model based on modified charge control equations is developed. The investigated critical parameters of the proposed device are the maximum drain current (I_Dmax), the threshold voltage (V_th), the peak DC trans-conductance (g_m), break down voltage (V_br) and unity current gain cut-off frequency (f_T). The typical DC characteristics for a gate length of 1 μm with 100 μm gate width are following: I_max=800 mA/mm, V_break-down=50 V, g_{m_extrinsic}=200 mS/mm, V_pinchoff=−10 V. The analysis and simulation results on the transport characteristics of the MOS gate MODFET structure is compared with the previously measured experimental data. The calculated values of f_T (20-130 GHz) suggest that the operation of the proposed device effectively, has sufficiently high current gain cutoff frequencies over a wide range of drain voltage, which is essential for high-power performance at microwave frequencies. The proposed device offers lower on-state resistance. The results so obtained are in close agreement with the experimental data.