Investigation of charge-trap memories with AlN based band engineered storage layers

This paper presents the investigation of the electrical properties of charge-trap memories with AlN based storage layers. The memory performance and reliability are studied in details and compared with the ones of a reference device using standard Si₃N₄ as storage layer. An engineered charge trapping layer is also proposed, made by an AlN/Si₃N₄ double layer, which shows reduced program/erase voltages, combined with 10⁶ excellent endurance and good retention (ΔV_T > 5 V after 10 years at 125 °C).     

Dynamical modeling of transport in MOS structures containing silicon nanocrystals for memory applications

A compact model that can be used to reproduce both quasi-static and dynamic characteristics of basic MOS cells with embedded Si-nc is presented. The structure is modeled through a device-like complex matrix of tunnel junctions, resulting in a time-dependent non-linear system of differential equations that is numerically solved, including calculation of the capacitance matrix, analytical tunneling expressions (direct and Fowler-Nordheim) for electrons/holes, and derivation of the effective tunneling area. The threshold evolution is calculated by monitoring the charge at each Si-nc as a function of time. The model is successfully validated against experimental data, showing its applicability to predict program/erase characteristics of nanocrystal memories as well as threshold voltage bit-to-bit dispersion as a consequence of geometrical non-uniformities in the nanocrystal layer position and/or gate areal coverage.     

Stack engineering of TANOS charge-trap flash memory cell using high-κ ZrO2 grown by ALD as charge trapping layer

ZrO₂ with a κ value of 30 grown by atomic layer deposition has been integrated as charge trapping layer alternative to Si₃N₄ in TANOS-like memory capacitors, with Al₂O₃ as blocking oxide, SiO₂ as tunnel oxide and TaN metal gate. The fabricated device featuring 24 nm ZrO₂ exhibits efficient program and erase operations under Fowler-Nordheim tunneling when compared to a Si₃N₄ based reference device with similar EOT and fabricated under the same process conditions. The effect of stack thermal budget (900-1030 °C range) on memory performance and reliability is investigated and correlated with physical analyses. Finally, scaling ZrO₂ down to 14 nm allows program and erase at lower voltages, even if the trapping efficiency and retention of these device need further improvements for the integration of ZrO₂ in next generation charge trapping nonvolatile memories.     

基于Si3N4的电荷俘获型存储器中氧缺陷的第一性原理研究

Based on first principle calculations, a comprehensive study of substitutional oxygen defects in hexagonal silicon nitride （β-Si3N4） has been carried out. Firstly, it is found that substitutional oxygen is most likely to form clusters at three sites in Si3N4 due to the intense attractive interaction between oxygen defects. Then, by using three analytical tools （trap energy, modified Bader analysis and charge density difference）, we discuss the trap abilities of the three clusters. The result shows that each kind of cluster at the three specific sites presents very different abilities to trap charge carriers （electrons or holes）： two of the three clusters can trap both kinds of charge carriers, confirming their amphoteric property; While the last remaining one is only able to trap hole carriers. Moreover, our studies reveal that the three clusters differ from each other in terms of endurance during the program/erase progress. Taking full account of capturing properties for the three oxygen clusters, including trap ability and endurance, we deem holes rather than electrons to be optimal to act as operational charge carriers for the oxygen defects in Si3N4-based charge trapping memories.     

氮化硅和氮氧化硅在俄歇电子谱分析中的电子束和离子束辐照效应

本文观察和测量了Si_3N_4和SiO_xN_y薄膜在俄歇电子谱(AES)分析中的电子束和离子束效应。结果表明在高束流密度电子束辐照下没有观察到任何损伤特征峰。延长辐照时间仅导致氧的解吸和Si、N讯号增加,最后达到一个稳定态。Si_3N_4和SiO_xN_y对离子辐照很容易造成损伤。但在高束流密度的电子束辐照下离子损伤的表面可以恢复。恢复程度与电子束流密度、束能、辐照时间和样品制备工艺有关。最后,本文对离子辐照损伤和恢复的机理进行了讨论。     

High temperature annealing of mnos devices and its effect on si-nitride stress,interface charge density and memory properties

The effects of high temperature annealing in N₂ and H₂ ambients upon the following properties of MNOS devices have been investigated: Si-nitride stress, etch rate, index of refraction, fixed interface charge and fast surface state density, memory window and charge retention at elevated temperatures. The CVD Si-nitride and Si-oxynitride films were deposited at temperatures as low as 610°C with a NH₃/SiH₄ ratio of 1000:1, the heat treatments were performed in the temperature range from 640°C to 1130°C. A similar N₂-annealing behavior was found for film stress and flatband voltage. The film stress increased with increasing annealing time and temperature while the interface charge density changed from high positive values (Q_N/q = 4 × 10¹²cm⁻2) after nitride deposition at 610°C to high negative values (Q_N/q = -4 × 10¹²cm⁻2) after annealing at 930°C, The fast interface state density increased while the charge retention time was drastically reduced. The changes of the properties by N₂ annealing are mainly attributed to decomposition of SiH and NH bonds. Minor effects were obtained by annealing in H₂ and the drastic changes caused by N₂ annealing could be reversed to a great extent by subsequent H₂ annealing. Finally the different effects of deposition and annealing temperature on the propertiesare discussed .     

生长在GaSb_xP_（1－x）（001）衬底上GaP的能带结构

采用半经验紧束缚近似方法对生长在ＧａＳｂｘＰ１－ｘ（００１）衬底上ＧａＰ的电子能带结构进行计算。ＧａＰ为间接能隙型的半导体，计算表明，当衬底中Ｓｂ组分ｘ≥０．５７时，应变的ＧａＰ薄层由间接能隙变成直接能隙的半导体。因应变，ＧａＰ原来简并的最低Ｘ点导带能级及价带顶（Γ点）能级发生分裂。随着Ｘ增大，分裂值变大。文中最后计算了价带能级到导带底跃迁的振子强度，对发光效率作了讨论。     

SiNx 掩膜对GaN 外延薄膜性质的影响

研究了纳米量级的多孔 SiNx 插入层的生长位置对高质量GaN外延薄膜性质的影响。测量结果表明：当把SiNx 插入层生长在GaN 粗糙层上,能够得到最好的晶体质量;SiNx 插入层的生长位置对GaN 薄膜的应变大小基本没有影响;然而,插入层的位置改变了薄膜中的本征载流子浓度。     

Influence of substrate temperature on the properties of fluorinated silicon-nitride thin films deposited by IC-RPECVD

Fluorinated silicon-nitride films have been prepared from an Ar/SiF₄/NH₃ gas mixture by inductively coupled remote plasma-enhanced chemical vapor deposition (IC-RPECVD) at different substrate temperatures, ranging from 150 to 300°C. All of the resulting deposited silicon-nitride films were free of Si-H bonds, showed high dielectric breakdown fields (≥8 MV cm^?1), and had root mean square (rms) surface roughness values below 3 Å. The films’ refractive indices and the contents of O and F remain constant, but Si/N ratios drop from 5 to 2 and N-H bond concentrations decrease in the range (1.3–0.9) × 10²² cm^?3 as the substrate temperature increases. The density of interface states (D_it) with c-Si was reduced from 2.4 × 10¹² to 8 × 10¹¹ eV^?1 cm^?2 at substrate temperatures ≥250°C.     

Low-temperature deposition of silicon oxide and silicon nitride by reactive magnetron sputtering

In this study, oxide and nitride films were deposited at room temperature through the reaction of silicon sputtered by argon and oxygen ions or argon and nitrogen ions at 250 and 350 W with 0.67 Pa pressure. It was observed that for both thin films the deposition rates increase with the applied RF power and decrease with the increase of the gas concentration. The Si/O and Si/N ratio were obtained through RBS analyses and for silicon oxide the values changed from 0.42 to 0.57 and for silicon nitride the values changed from 0.4 to 1.03. The dielectric constants were calculated through capacitance-voltage curves with the silicon oxide values varying from 2.4 to 5.5, and silicon nitride values varying from 6.2 to 6.7, which are good options for microelectronic dielectrics.     

Charge trapping models of resistance switching in organic bistable devices with embedded nanoparticles

We discuss three different models of switching between the high conductivity and low conductivity state in organic bistable devices (OBD) with embedded nanoparticles. All models assume the same basic mechanism: charge trapping and de-trapping in metal nanoparticles. We show trapped charges can both induce an increase or a reduction of the total current depending on device configurations. The influence of energy disorder is investigated.     

陷阱俘获存储器中电荷积累过程对保持特性的影响

本文通过数值模拟的方法对陷阱俘获存储器单元在多次擦写过程中的电荷积累过程进行了分析。由于多次擦写后陷阱电荷的积累,电荷之间的复合过程成为一个重要的问题。分析结果显示擦写过程中积累的空穴会对存储器的保持特性产生影响,同时在分析器件保持特性的时候电荷之间的复合机制必须加以考虑。     

电磁带隙结构在抑制电源层上噪声的应用

本文在阐述电磁带隙结构的基础上,从理论上分析其原理,结合印制电路板电源层存在的瓶颈,即目标阻抗随着设计频率的不断上升而变得越来越难控制。电磁带隙结构最早应用在天线结构中,而本文引用到PCB板电源完整性的设计中来达到抑制高频谐振的目的,并且通过Slwave建模仿真验证了其正确性。     

Analysis on Conductivity of nc—Si：H Films

A conduction channel model is propsed to explain the high conductivity property of nc-Si:H.Detailed energy band diagram is developed based on the analysis and calculation ,and the conductivity of the nc-Si:H was then analysed on the basis of energy band theory.It is assumed that the conductivity of the nc-Si:H stems from two parts:the conductance of the interface,where the transport mechanism is identified as a thermal -assisted tunneling process,and the conductance along the channel around the grain,which mainly determined the high conductivity of the nc-Si:H.The conductivity of nc-Si:H is calculated and compared with the experiment data .The theory is in agreement with the experiment.     

Reduction of charge injection into PECVD SiNxHy by control of deposition chemistry

The high rate of charge trapping in thin-film silicon nitride causes its electrical properties to change with stressing level and time. The rate of shift of the high-frequency CV curves of Al/SiN_xH_y/cSi capacitors was used here to measure nitride charging rate and to compare PECVD nitrides deposited under various conditions of plasma power and gas mixture in the same parallel-plate reactor. By operating the plasma under high power to activate the NH₃ or N₂ and under low SiH₄ flow to ensure that all of the SiH4 reacts with N, it is possible to deposit N-rich nitride that has no detectable Si—H bonding, which bonding others have correlated with charge trapping. Nitride deposited under these conditions using NH₃ and 13 MHz rf power had charging rates for both gate polarities that were 20 times lower than those of nitride that had a “stoichiometric” N/Si ratio of 4/3 and that had its H distributed among Si—H and N—H bonds. MIS capacitors made with the latter nitride also had a high negative initial flat-bond voltage, indicating the presence of grown-in positive charge. This charge was large enough to invert the surface ofp-Si substrates. N-rich nitride free of Si—H that was deposited either using N₂ or using low-frequency rf power (≤400 kHz) had higher charging rates than did that deposited from NH₃ at 13 MHz. Also, the low-frequency material contained grown-in positive charge that is attributed to H⁺ implanted by the high ion bombardment energy of the low-frequency plasma.