Measurement-based evaluation of operating system fault tolerance

The authors demonstrate a methodology for evaluating the fault-tolerance characteristics of operational software and illustrate it through case studies of three operating systems: the Tandem GUARDIAN fault-tolerant system, the VAX/VMS distributed system, and the IBM/MVS system. Based on measurements from these systems, software error characteristics are investigated by analyzing error distributions and correlation. Two levels of models are developed to analyze the error and recovery processes inside an operating system and the interactions among multiple copies of an operating system running in a distributed environment. Reward analysis is used to evaluate the loss of service due to software errors and the effect of fault-tolerant techniques implemented in the systems     

Fault-tolerant configuration of distributed discrete controllers

This paper presents a fault-tolerant configuration for a multiple discrete control system. The distributed control nodes, such as programmable logic controllers, communicate over networks. The design methodology of an additional redundant controller using Galois field and an error-detecting code is proposed. The proposed method is implemented and tested on distributed controllers connected on a network. It is shown that the system is functional even if one of the controllers fails. From a reliability analysis, it is also shown that the proposed design method drastically improves the mean time to failure of the discrete control system.     

Neural network based design of fault-tolerant controllers for automated sequential manufacturing systems

This paper presents a novel application of recurrent neural network (RRN) to fault-tolerant control (FTC) of automated sequential manufacturing systems (ASMS) subject to sensor faults. Two RRNs are employed: the first one acts as an I/O relations recognizer and is able to detect faulty sensors and the latter is used as an inverse model of the AMSM to compute the desired control action in a faulty case according to nominal specifications. The learning process of these networks is carried out based on training data generated from the healthy manufacturing system controlled by a programmable logic controller (PLC). Design of the proposed fault-tolerant control system (FTCS) scheme is based on utilizing the two RNNs, a reconfigurable controller and a fault decision subsystem. The design procedure of the proposed FTCS is introduced. The proposed FTCS has been implemented and tested experimentally for a benchmark industrial ASMS subject to single or multiple faulty sensors. Experimental results show the effectiveness of the procedure for a real simple plant. In addition, the results prove these features of the proposed FTCS: (a) effectively improving the faulty control system behaviors, (b) accomplishing its proper functionality in handling single and multiple sensor faults, (c) identifying the sensor faults, and (d) being advantageous in reducing the complexity of the hardware redundancy.     

Electrical steering of vehicles - fault-tolerant analysis and design

The topic of this paper is systems that need be designed such that no single fault can cause failure at the overall level. A methodology is presented for analysis and design of fault-tolerant architectures, where diagnosis and autonomous reconfiguration can replace high cost triple redundancy solutions and still meet strict requirements to functional safety. The paper applies graph-based analysis of functional system structure to find a novel fault-tolerant architecture for an electrical steering where a dedicated AC-motor design and cheap voltage measurements ensure ability to detect all relevant faults. The paper shows how active control reconfiguration can accommodate all critical faults and the fault-tolerant abilities are demonstrated on a warehouse truck hardware.     

SET and noise fault tolerant circuit design techniques: Application to 7 nm FinFET

In the near future of high component density and low-power technologies, soft errors occurring not only in memory systems and latches but also in the combinational parts of logic circuits will seriously affect the reliable operation of integrated circuits. This paper presents a novel design style which reduces the impact of radiation-induced single event transients (SET) on logic circuits, and enhances the robustness in noisy environments. The independent design style of this method achieves SET mitigation and noise immunity by strengthening the sensitive nodes using a technique similar to feedback. A realization for this methodology is presented in 7 nm FinFET and in order to check the accuracy of our proposal, we compare it with others techniques for hardening radiation at the transistor level against a single event transient. Simulation results show that the proposed method has a good soft error tolerance capability as well as better noise immunity.     

Reliability of checkpointed real-time systems using time redundancy

Real-time computers are often used in embedded, life-critical applications where high reliability is important. A common approach to making such systems dependable is to vote on redundant processors executing multiple copies of the same task is described. The processors which make up such voted systems are subjected not only to independently occurring permanent and transient failure, but also to correlated transients brought about by electromagnetic interference from the operating environment. To counteract these transients, checkpointing and time redundancy are required, in addition to processor redundancy. This work analyzes the use of time and device redundancy in systems subject to correlated failure. The tradeoffs in checkpoint placement in such a system are found to be considerably different from those for non-redundant systems without real-time constraints. The authors compare fault-tolerant designs and without a rollback capability, accounting for the increased hardware-failure rate due to processor duplication when faults are detected in hardware, and the doubled execution times when detection is implemented in software     

一种容错可逆的通用移位寄存器设计

为了使计算系统具有低功耗和容错能力,基于可逆逻辑设计了一种容错的通用移位寄存器。提出了一种新型的容错可逆逻辑门(Parity-Preserving D Flip_flop Gate, PP_DFG),利用它和存在的容错门,完成了寄存器和多路数据选择器的设计。综合上述模块,构建了容错可逆的通用移位寄存器电路,用Verilog 硬件描述语言建模,仿真显示电路逻辑结构正确。同现有电路相比,根据量子代价、延迟和无用输出对其进行性能评估,结果表明该电路不仅具有容错功能,而且性能提高了16%~50%。设计的电路可作为一种重要的存储元件应用于未来的低功耗计算系统。     

Practical DfT strategy for fault diagnosis in active analoguefilters

A DfT methodology for fault diagnosis in active analogue filters is presented that is capable of diagnosing single and multiple faults. Its applicability is very simple and its cost is low     

Testability and test generation for majority voting fault-tolerant circuits

The testability of majority voting based fault-tolerant circuits is investigated and sufficient conditions for constructing circuits that are testable for all single and multiple stuck-at faults are established. The testability conditions apply to both combinational and sequential logic circuits and result in testable majority voting based fault-tolerant circuits without additional testability circuitry. Alternatively, the testability conditions facilitate the application of structured design for testability and Built-In Self-Test techniques to fault-tolerant circuits in a systematic manner. The complexity of the fault-tolerant circuit, when compared to the original circuit can significantly increase test pattern generation time when using traditional automatic test pattern generation software. Therefore, two test pattern generation algorithms are developed for detecting all single and multiple stuck-at faults in majority voting based circuits designed to satisfy the testability conditions. The algorithms are based on hierarchical test pattern generation using test patterns for the original, non-fault-tolerant circuit and structural knowledge of the majority voting based design. Efficiency is demonstrated in terms of test pattern generation time and cardinality of the resulting set of test patterns when compared to traditional automatic test pattern generation software.     

Fault-Tolerant Control for Markovian Jump Delay Systems with an Adaptive Observer Approach

This paper investigates the problem of fault estimation and fault-tolerant control for a class of Markovian jump systems with mode-dependent interval time-varying delay and Lipschitz nonlinearities. In this paper, a new adaptive fault observer is designed to solve the problem of fault estimation. The proposed observer can estimate the states and faults simultaneously, whether faults are of time-varying or constant characterization. Based on the fault estimation, a fault-tolerant controller is designed to stabilize the closed-loop system. Sufficient conditions for the existence of the observer gain and fault-tolerant controller gain are got by a set of linear matrix inequalities. Finally, a numerical example is presented to illustrate the effectiveness of the proposed fault-tolerant control method.     

Robust and fault-tolerant linear parameter-varying control of wind turbines

High performance and reliability are required for wind turbines to be competitive within the energy market. To capture their nonlinear behavior, wind turbines are often modeled using parameter-varying models. In this paper we design and compare multiple linear parameter-varying (LPV) controllers, designed using a proposed method that allows the inclusion of both faults and uncertainties in the LPV controller design. We specifically consider a 4.8 MW, variable-speed, variable-pitch wind turbine model with a fault in the pitch system.We propose the design of a nominal controller (NC), handling the parameter variations along the nominal operating trajectory caused by nonlinear aerodynamics. To accommodate the fault in the pitch system, an active fault-tolerant controller (AFTC) and a passive fault-tolerant controller (PFTC) are designed. In addition to the nominal LPV controller, we also propose a robust controller (RC). This controller is able to take into account model uncertainties in the aerodynamic model.The controllers are based on output feedback and are scheduled on an estimated wind speed to manage the parameter-varying nature of the model. Furthermore, the AFTC relies on information from a fault diagnosis system.The optimization problems involved in designing the PFTC and RC are based on solving bilinear matrix inequalities (BMIs) instead of linear matrix inequalities (LMIs) due to unmeasured parameter variations. Consequently, they are more difficult to solve. The paper presents a procedure, where the BMIs are rewritten into two necessary LMI conditions, which are solved using a two-step procedure.Simulation results show the performance of the LPV controllers to be superior to that of a reference controller designed based on classical principles.     

Precise, fault-tolerant pointing using a Stewart platform

Presents a precision pointing strategy. The principal contribution is the development of a fault-tolerant control which allows active pointing to continue despite multiple failures. A six-axes active platform is utilized to reject disturbances from a vibrating base to a precision payload. A decentralized controller is proposed which converts desired rotations into corresponding strut lengths via a decoupling transformation. The decoupling approach allows for simple single-input-single-output compensator design and for the incorporation of fault-tolerant strategies. The proposed strategy was evaluating on the microprecision interferometer testbed (a full-scale model of a future spaceborne optical interferometer) at the Jet Propulsion Laboratory, Pasadena, CA. Experimental pointing results demonstrate 50 dB of disturbance rejection at low frequency. In the laboratory ambient disturbance environment, this corresponds to a 1-μrad rms pointing error     

Quality-of-service-aware fault tolerance for grid-enabled applications

This study first reviews how grid-enabled applications can be provided with fault tolerance. Existing methods, implemented either in the grid application/middleware or in a Generalized Multi-Protocol Label Switching (GMPLS)-based network, are outlined. Then, the paper shows the advantages of integrating application/middleware fault-tolerant schemes, such as service replication, with GMPLS network-layer fault-tolerant schemes, such as path restoration. An integrated fault-tolerant scheme is capable of providing flexible QoS-aware fault tolerance while minimizing the necessary computational and network resources. In the end, the implementation of the proposed integrated scheme in a Video-on-Demand (VoD) application is experimentally validated.     

Hybrid fault adaptive control of a wheeled mobile robot

A fault adaptive control methodology for mobile robots is presented. The robot is modeled as a continuous system with a supervisory controller. The physical processes of the robot are modeled using bond graphs, and this forms the basis of a combined qualitative reasoning and quantitative model-based estimation scheme for online fault detection and isolation during robot operation. A hierarchical-control accommodation framework is developed for the supervisory controller that determines a suitable control strategy to accommodate the isolated fault. It is shown that for small degradations in actuation effort, a robust controller achieves fault accommodation without significant loss of performance. However, for larger faults, the supervisor needs to switch among several controllers to maintain acceptable performance. The switching stability among a set of trajectory tracking controllers is presented. Simulation results verify the proposed fault adaptive control technique for a mobile robot.     

Fault-tolerant switched reluctance motor drive using adaptive fuzzy logic controller

An adaptive fuzzy controller has been designed to develop a high-performance fault-tolerant switched reluctance motor (SRM) drive. The fuzzy controller continuously adapts its properties to regulate the machine torque as desired by the drive system even under fault conditions. The adaptation of the fuzzy membership functions results in extended conduction period and increased peak current of the healthy phases to deliver the commanded torque, as much as possible. The adaptive fuzzy controller provides smooth torque output with minimum ripple, even under fault conditions, yielding a high-performance SRM drive with fault-tolerant capability.     

可重构硬件芯片级故障定位与自主修复方法

 外部集中控制的可重构硬件容错系统,其重构控制算法复杂、重构时间开销大,且存在单点失效问题.本文研究芯片级分布式在线自主容错技术,提出了能够实现芯片级自修复的新型可重构硬件细胞阵列结构,阐述了互连资源的在线故障定位和自主修复方法.设计了功能细胞电路和容错开关块电路,采用分段定位法检测互连资源中多路器故障和连线开路故障,通过重配置布线和线移位操作分别实现多路器与连线故障自修复.以4位串并乘法器电路为例进行实验验证,分析了容错设计的硬件开销与时间开销,实验结果表明新方案的容错时间短、资源利用率高.     

多余度飞控计算机通道故障逻辑技术研究

在航空电子系统中,飞控计算机系统用于控制飞机的飞行功能,要求具有极高的可靠性,必须采用容错技术来满足要求。容错的重要方法是冗余。目前的飞控计算机系统,大多采用双余度、三余度及四余度的容错计算机。在余度计算机中,每一余度称为一个通道,每个通道均具有输出控制能力,因此余度计算机输出控制权的确定和交接就变得至关重要。介绍了道故障逻辑的功能需求和结构,重点研究了一种3×2余度飞控计算机系统通道故障逻辑的设计。     

Continuous-Time Digital Controller for High-Frequency DC-DC Converters

This paper introduces a voltage mode digital controller for low-power high-frequency DC-DC switch-mode power supplies (SMPS) that has fast transient response, approaching physical limitations of a given power stage. In steady state, the controller operates as a conventional pulsewidth modulation regulator and during transients it utilizes a novel fast voltage recovery mechanism, based on real-time processing of the output voltage in digital domain. This continuous-time digital signal processing mechanism is implemented with a very simple processor consisting of a set of asynchronous comparators, delay cells, and combinatorial logic. To eliminate the need for current measurement and calculate the optimal switching sequence of the power stage transistors, the processor performs a capacitor charge balance algorithm, which is based on the detection of the output voltage peak/valley point. The effectiveness of the controller is demonstrated on an experimental 5 W, 5 V to 1.8 V, 400 kHz buck converter. The converter recovers from load transients through a single on-off action of the power switch, virtually reaching the shortest possible time, limited by the values of the power stage filter components only.     

A cluster based WSN fault tolerant protocol

A Wireless Sensor Network(WSNs) fault-tolerant protocol is proposed in this paper.By setting up a robust cluster topology,the fault-tolerant algorithm can search any faulty node in the path and revise the path furthermore.Once the cluster head fails,it will be substituted by other alternative cluster heads with the lowest cost,and the path will be re-established.Experiments show that this algorithm can not only locate the faulty nodes in the path accurately,shield the influence of the error node in clusters...     

Fault-Tolerant Master–Slave Synchronization for Lur'e Systems Using Time-Delay Feedback Control

This paper deals with fault-tolerant master–slave synchronization for Lur'e systems using time-delay feedback control. Taking a general nature of fault in the master system into account, a new synchronization scheme, namely, fault-tolerant master–slave synchronization, is proposed, by which the master–slave synchronization can be achieved no matter if the fault occurs or not. By making use of an observer-based fault estimator and a modified time-delay feedback controller, the fault-tolerant master–slave synchronization is formulated so as to discuss the global asymptotic stability of the error system and the bound of energy gain from fault to state and fault estimation error vectors. Some new delay-dependent criteria are derived to analyze the synchronization error system, and based on the analysis results, a sufficient condition on the existence of such a master–slave synchronization scheme and a solution to the controller and fault-estimator gain matrices are obtained in terms of linear matrix inequalities. Finally, a Chua's circuit is used to illustrate the effectiveness of the proposed method.