Noise in RF-CMOS mixers: a simple physical model

Flicker noise in the mixer of a zero- or low-intermediate frequency (IF) wireless receiver can compromise overall receiver sensitivity. A qualitative physical model has been developed to explain the mechanisms responsible for flicker noise in mixers. The model simply explains how frequency translations take place within a mixer. Although developed to explain flicker noise, the model predicts white noise as well. Simple equations are derived to estimate the flicker and white noise at the output of a switching active mixer. Measurements and simulations validate the accuracy of the predictions, and the dependence of mixer noise on local oscillator (LO) amplitude and other circuit parameters     

CMOS集成混频器噪声模型的计算机仿真与分析

根据Hspice仿真结果，分析了CMOS集成混频器中场效应管的闪烁噪声和寄生电容产生输出噪声的详细过程。通过改变电路仿真参数，得出相应的仿真数据，结合理论模型对实验数据进行了分析。结果表明，由闪烁噪声引起的直接开关噪声增益随本振幅度递减，由寄生电容引起的间接开关噪声增益随寄生电容值和本振频率递增。     

宽带低噪声混频器的设计

文章利用安捷伦公司的ADS仿真软件,设计了一款应用于GNSS接收机射频前端的Gilbert混频器芯片,它的工作电压都为3.3V,中频输出口外接负载为800Ω,具有面积小、噪声系数低的特点。通过优化设计,在频率从1~1.6GHz的范围内,获得了超过15dB的转换增益,以及4dB的噪声系数,输入1dB增益压缩点(P-1dB)为-17dBm,功耗为29mW。     

Oxide thickness dependent compact model of channel noise for E-mode AlGaN/GaN MOS-HEMT

In this paper, a compact channel noise model for gate recessed enhancement mode GaN based MOS-HEMT which is valid for all regions of operation is proposed. The compact noise model consists of high frequency thermal noise and low frequency flicker noise. The drain current, which is one of the most important parameters for compact noise model is developed by incorporating interface and oxide traps, mobility degradation due to vertical electric field, velocity saturation effect and self-heating effect. The flicker noise model is derived by considering mobility and carrier fluctuation due to traps present in both oxide and interface layer. The thermal noise and flicker noise models are validated by comparing the results with TCAD simulation and experimental results from literature respectively. Effect of thermal and flicker noise power spectral density (PSD) variation with different oxide thickness has also been analyzed.     

A 0.35μm CMOS Mixer for 2.45-GHz RFID Application

A RF mixer with both low noise and high linearity is designed,operating at 2.45-GHz ISM band for RFID application.The designed mixer uses an optimal input matching network and the carefully chosen sizes of transistors,also with the appropriate bias point,to improve the noise figure(NF).Also,with a resonant LC loop as the current source and a parallel PMOS-resistor as the load,the mixer has a high linearity.The post simulation results show that the single side- band noise figure of 8.57 dB,conversion gain of 10.02 dB,input 1-dB compression point(P-1dB)of-8.33 dBm,and input third-order intercept point(IIP3)of 5.35 dBm.     

一种低噪声高线性度CMOS上变频混频器

设计实现了一种采用开关跨导型结构的低噪声高线性度上变频混频器,详细分析了电路的噪声特性和线性度等性能参数,本振频率为900 MHz。芯片采用0.18μm Mixed signal CMOS工艺实现。测试结果表明,混频器的转换增益约为8 dB,单边带噪声系数约为11 dB,输入参考三阶交调点(IIP3)约为10.5 dBm。芯片工作在1.8 V电源电压下,消耗的电流为10 mA,芯片总面积为0.63 mm×0.78 mm。     

一种新的射频CMOS混频器结构

提出了一种低电压高增益CMOS下变频混频器的新结构.这个结构避免了堆叠晶体管,因此可以在低电压下工作.在LO信号的频率为1.452GHz,RF信号频率为1.45GHz的情况下,仿真结果表明:混频器的增益为15dB,ⅡP3为-4.5dBm,NF为17dB,最大瞬态功耗为9.3mW,直流功耗为9.2mW.并对该混频器的噪声特性和线性度进行了分析.     

基于CMOS工艺的改进型电流注入混频器

设计了一种改进型电流注入混频器.通过在吉尔伯特混频器电路的本振开关管源极引入电感形成谐振电路,消除了开关管源极寄生电容的影响,降低了混频器电路的闪烁噪声,增大了混频器电路的增益.混频器电路的设计采用SMIC 0.35 μm CMOS 工艺库,本振功率为-3 dBm.仿真结果表明,与改进前的混频器电路相比,当本振功率为-3 dBm时,改进型电流注入混频器电路的增益提高了1.76 dB,IIP3提高2.1 dBm,噪声系数降低了0.5 dB.     

Generalized Linear Periodic Time-Varying Analysis for Noise Reduction in an Active Mixer

A simple linear periodic time-varying circuit model is proposed to rigorously analyze the noise behavior in an active mixer. This analysis can be shown to be a generalization of existing LPTV mixer models, which assume that the mixer is a memoryless device and, as a result, is valid for low frequency only. Based on the proposed LPTV circuit model, explicit formulas for noise figure that accounts for the effect of the thermal noise folding and the flicker noise leakage are derived. Our analysis shows that the mixer operating at OFF overlap mode yields a better noise performance. The analysis is validated against simulations and measurements.     

Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400-mV Supply

An ultra low power 2.4-GHz transceiver targeting wireless sensor network applications is presented. The receiver front-end is fully passive, utilizing an integrated resonant matching network to achieve voltage gain and interface directly to a passive mixer. The receiver achieves a 7-dB noise figure and -7.5-dBm IIP3 while consuming 330 muW from a 400-mV supply. The binary FSK transmitter delivers 300 muW to a balanced 50-Omega load with 30% overall efficiency and 45% power amplifier (PA) efficiency. Performance of the receiver topology is analyzed and simple expressions for the gain and noise figure of both the passive mixer and matching network are derived. An analysis of passive mixer input impedance reveals the potential to reject interferers at the mixer input with characteristics similar to an extremely high-Q parallel LC filter centered at the switching frequency     

A 1.2-V RF front-end with on-chip VCO for PCS 1900 direct conversion receiver in 0.13-/spl mu/m CMOS

In this paper, a 1.2-V RF front-end realized for the personal communications services (PCS) direct conversion receiver is presented. The RF front-end comprises a low-noise amplifier (LNA), quadrature mixers, and active RC low-pass filters with gain control. Quadrature local oscillator (LO) signals are generated on chip by a double-frequency voltage-controlled oscillator (VCO) and frequency divider. A current-mode interface between the downconversion mixer output and analog baseband input together with a dynamic matching technique simultaneously improves the mixer linearity, allows the reduction of flicker noise due to the mixer switches, and minimizes the noise contribution of the analog baseband. The dynamic matching technique is employed to suppress the flicker noise of the common-mode feedback (CMFB) circuit utilized at the mixer output, which otherwise would dominate the low-frequency noise of the mixer. Various low-voltage circuit techniques are employed to enhance both the mixer second- and third-order linearity, and to lower the flicker noise. The RF front-end is fabricated in a 0.13-/spl mu/m CMOS process utilizing only standard process options. The RF front-end achieves a voltage gain of 50 dB, noise figure of 3.9 dB when integrated from 100 Hz to 135 kHz, IIP3 of -9 dBm, and at least IIP2 of +30dBm without calibration. The 4-GHz VCO meets the PCS 1900 phase noise specifications and has a phase noise of -132dBc/Hz at 3-MHz offset.     

一种低闪烁噪声高线性度WLAN混频器的设计

提出一种适用于零中频接收的WLAN混频器,采用折叠结构降低开关对的偏置电流,以得到良好的闪烁噪声性能;通过在混频器的驱动级引入辅助管,并优化其衬底电压和尺寸来抵消跨导管的非线性,进而提升电路的线性度.利用Volterra级数辅助分析制约线性度特性的限制因素.基于Chartered O.18 μm CMOS工艺的Spectre-RF仿真表明,电路在WLAN的2.4 GHz频段具有良好的电学性能,噪声系数为8.6 dB,闪烁噪声角为105 kHz,IIP3为5.8 dBm,芯片整体功耗为10 mW,核心电路占用面积为0.09 mm2.     

A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor

This paper presents the design of a high conversion gain and low flicker noise down conversion CMOS double balanced Gilbert cell mixer using \(0.18\,\upmu \hbox {m}\) CMOS technology. The high conversion gain and low flicker noise mixer is implemented by using a differential active inductor (DAI) circuit and cross-coupled current injection technique within the conventional double-balanced Gilbert cell mixer. A cross-coupled current bleeding circuit is used to inject the current to the switching stage to decrease the flicker noise. Instead of spiral inductor, a DAI with high tunability of the inductor and quality factor is used to tune out the parasitic capacitance effect and decrease the leakage current that has a harmonic component and produce the flicker noise. By tuning the DAI, the flicker noise corner frequency is reduced to 150 Hz. The proposed circuit is simulated with Cadence Spectra and the simulation results shows the NF of 11.2 dB, conversion gain of 23.7 dB and IIP3 of \(-6\)  dB for an RF frequency of 2.4 GHz. The excellent LO-RF, LO-IF, RF-LO and RF-IF isolations of \(-60, -110, -52\) and \(-64\)  dB are achieved respectively. The total power consumption is 10.5 mW from a 1.8 V DC power supply.     

Analysis of flicker and thermal noise in p-channel Underlap DG FinFET

In this paper, we analyze the flicker and thermal noise model for underlap p-channel DG FinFET in weak inversion region. During the analysis of current and charge model, minimum channel potential i.e. virtual source is considered. Initially, the drain current for both long and short channel of DG FinFET are evaluated and found to be well interpreted with experimental results. Further, the flicker and thermal noise spectral density are derived. The flicker noise power spectral density is compared with published experimental results, which shows a good agreement between proposed model and experimental result. During calculation we have considered variation of scattering parameter and furthermore, the degradation of effective mobility is taken into account for ultrathin body. The variation of structural parameters such as gate length (L_g), body thickness (t_Si) and underlap length (L_un) are also considered. The degradation of gate noise voltage with frequency, underlap length and gate length signify that p-channel DG FinFET device can be a promising candidate for analog and RF applications.     

A 0.18μm CMOS Gilbert low noise mixer with noise cancellation

正This paper presents a broadband Gilbert low noise mixer implemented with noise cancellation technique operating between 10 MHz and 0.9 GHz.The Gilbert mixer is known for its perfect port isolation and bad noise performance.The noise cancellation technique of LNA can be applied here to have a better NF.The chip is implemented in SMIC 0.18μm CMOS technology.Measurement shows that the proposed low noise mixer has a 13.7-19.5 dB voltage gain from 10 MHz to 0.9 GHz,an average noise figure of 5 dB and a minimum value of 4.3 dB.The core area is 0.6 x 0.45 mm~2.     

A multi-mode multi-band RF receiver front-end for a TD-SCDMA/LTE/LTE-advanced in 0.18-μm CMOS process

正A fully integrated multi-mode multi-band directed-conversion radio frequency(RF) receiver front-end for a TD-SCDMA/LTE/LTE-advanced is presented.The front-end employs direct-conversion design,and consists of two differential tunable low noise amplifiers(LNA),a quadrature mixer,and two intermediate frequency(IF) amplifiers.The two independent tunable LNAs are used to cover all the four frequency bands,achieving sufficient low noise and high gain performance with low power consumption.Switched capacitor arrays perform a resonant frequency point calibration for the LNAs.The two LNAs are combined at the driver stage of the mixer,which employs a folded double balanced Gilbert structure,and utilizes PMOS transistors as local oscillator(LO) switches to reduce flicker noise.The front-end has three gain modes to obtain a higher dynamic range.Frequency band selection and mode of configuration is realized by an on-chip serial peripheral interface(SPI) module.The frontend is fabricated in a TSMC 0.18-μm RF CMOS process and occupies an area of 1.3 mm~2.The measured doublesideband (DSB) noise figure is below 3.5 dB and the conversion gain is over 43 dB at all of the frequency bands. The total current consumption is 31 mA from a 1.8-V supply.     

宽带噪声抵消结构的噪声分析及优化

噪声抵消结构是一种应用于宽带低噪声放大器的有源匹配电路。噪声抵消的目的是将输入匹配器件引入的噪声在输出端消除。本文针对噪声抵消结构在高频的应用,依据噪声抵消的原理,提出了一种全频带噪声抵消条件。并给出了该条件下,噪声抵消结构的噪声系数随频率变化的解析表达式。通过与仿真结果对比,验证了该解析表达式的准确性。在此基础上,分析了匹配器件的高频噪声不能完全抵消时该结构的噪声系数。最后,提出了一种噪声抵消结构的优化设计方法。     

雷达目标微多普勒特征提取的频率稳定度约束

微多普勒特征的准确提取对于雷达目标识别具有重要意义.提出了调频闪烁噪声产生方法;给出了频率源相位噪声综合的参数化模型.在此基础上,结合相位噪声对微多普勒特征提取的影响分析,建立了以载频信号相位噪声为主要干扰源的全相参脉冲雷达微多普勒特征提取仿真系统.引入逆拉东(Radon)变换,定量分析了相位噪声对雷达目标微多普勒特征提取的影响,得出现有的晶振技术指标可支撑中段弹头目标微多普勒特征提取的明确结论.     

Noise in Current-Commutating Passive FET Mixers

Noise in the mixer of zero-IF receivers can compromise the overall receiver sensitivity. The evolution of a passive CMOS mixer based on the knowledge of the physical mechanisms of noise in an active mixer is explained. Qualitative physical models that simply explain the frequency translation of both the flicker and white noise of different FETs in the mixer have been developed. Derived equations have been verified by simulations, and mixer optimization has been explained.      

采用CMOS工艺中寄生V-NPN改进低频相位噪声的压控振荡器

本文将CMOS工艺中的寄生垂直NPN管(V-NPN)用于压控振荡器的交叉耦合单元来改善其低频偏处的相位噪声. 相对于MOS晶体管, V-NPN管拥有更低的闪烁噪声. 为了便于后续的电路设计, 本文对V-NPN管的直流和交流特性进行了测试. 提出的V-NPN VCO最终在SMIC 0.18-μm CMOS 射频/混合信号工艺上流片验证. 测试结果显示, 相比于一个类似的用MOS管充当交叉耦合管的VCO, 提出的V-NPN VCO在100Hz到10KHz频偏内的相位噪声改善了3.5~9.1dB. 在1.5V的电源电压下, 其消耗的电流仅为0.41mA.