基于IEEE 802.16a的OFDM基带调制系统的FPGA设计

本文研究了基于IEEE802.16a的OFDM基带调制系统的实时实现,提出了一种切实可行的IEEE802.16a的OFDM调制方式的FPGA实现方法与结构,并介绍了IFFT运算、QPSK映射和插入循环前缀的具体电路。最后给出了硬件性能分析。     

基于IEEE 802.16a协议的OFDM系统的FPGA实现

主要介绍了OFDM的调制解调的FPGA实现,首先介绍OFDM的基本原理,然后给出了采用FPGA实现基于IFFT/FFT的OFDM调制解调的具体结构,以及插入循环前缀和去循环前缀的具体结构.     

面向IEEE802.16e的高效LDPC编码器设计

基于矩阵乘法的高斯消元法提出了一种通用的LDPC编码器结构,该结构使用移位寄存器和简单的选线实现了复杂的矩阵向量相乘运算并且不需要存储庞大的校验矩阵。然后根据IEEE 802.16e标准中对校验矩阵的定义,利用FPGA实现了编码器的硬件结构,并且由仿真结果可知这种LDPC编码器结构降低了逻辑资源开销,提高了编码速度。     

Efficient receiver structure for GSM mobile radio

The paper describes a receiver structure for the digital GSM mobile radio which is suitable for implementation using a DSP processor. The simulation results show that proposed simplifications have minor influence on the receiver performance and drastically reduce its computational complexity.     

基于IEEE 802．16d OFDM系统的FPGA设计

研究基于IEEE 802．16d OFDM系统的FPGA实现。首先探讨了基于802．16d的OFDM系统FPGA设计的构架。然后采用VHDL硬件描述语言实现了发送端和接收端各个模块。最后选用了Altera公司CycloneⅡ系列的EP2C35F484C6芯片,在QuartusⅡ软件环境下对VHDL代码进行了综合。     

基于软件无线电的ADS-B信号接收机设计

为了及时获取航迹信息,基于射频前端芯片AD9361以及基带数据处理芯片Zynq-7000设计了一种对广播式自动相关监视(Automatic Dependent Surveillance-Broadcast,ADS-B)信号解调的软件无线电接收系统,给出详尽的硬件框架设计,进行了Linux平台搭建,并完成了AD9361寄...     

FPGA implementation and testing of a 128 FFT for a MB-OFDM receiver

In this paper we discuss the FPGA design of a 128-point Pipelined FFT processor for a multi-band (MB)-OFDM receiver. We implemented two parallel architectures based on the Xilinx Core Generator. The architectures use two or four smaller FFTs in parallel. Results show that time requirements are fulfill when combining Pipelined, Streaming input/output (I/O) architectures with Radix-2 and Radix-4 operations. For Virtex-4, we need four levels of parallelization, but for Virtex-5 only two. Both circuits were synthesized, placed and routed. We tested the circuits on the FPGA, defining test vectors and analyzing outputs signals with Chipscope.     

Design and implementation of a new scheduler for enhancing multi-rate fairness in IEEE 802.16

Without the definition of a mandatory scheduling algorithm for channel resource assignment, WiMAX is open to Quality of Service (QoS) enhancements by research groups and developers, at the aim of managing heterogeneous flows with different QoS requirements. Furthermore, besides performance enhancement, another key issue arises for QoS delivery: it is known as multi-rate fairness and it deals with efficient resource allocation for providing sufficient bandwidth to high rate flows, without penalizing low rate ones. In this paper, uplink scheduling algorithms are studied and an innovative solution is proposed to achieve performance enhancement, multi-rate fairness and improved QoS management. After an overview of the state of the art, two scheduling algorithms based on Deficit Round Robin are studied, implemented and tested in NS2 simulator. The schedulers are validated and compared through exhaustive simulations, showing the benefits coming from the adoption of the proposed scheduling mechanism.     

Efficient routing and centralized scheduling algorithms for IEEE 802.16 Mesh Networks

An IEEE 802.16 wireless system can provide broadband wireless access to subscriber stations and operate in mesh mode. The communication between a subscriber station and a base station can pass through one or more intermediate subscriber stations. The IEEE 802.16 standard provides a centralized scheduling mechanism that supports contention‐free and resource‐guarantee transmission services in mesh mode. However, the corresponding algorithm to this schedule is quite primitive in the standard. In this paper, we propose a more efficient way to realize this schedule by maximizing channel utilization. Our designs are divided into two phases: routing and scheduling. First, a routing tree topology is constructed from a given mesh topology by our proposed tree construction algorithm. Secondly, we allocate channel resources to the edges in the routing tree by our proposed scheduling algorithm. To further support the quality‐of‐service schedule, we extend our designs by addressing some issues such as service class, admission control and fairness. Simulation results show the superiority of our proposed algorithms over others. Copyright © 2011 John Wiley & Sons, Ltd.     

软件无线电跳频电台接收机射频前端设计

基于软件无线电的基本要求和发展趋势,提出了一种应用在软件无线电跳频电台中接收机射频前端电路结构,分析了接收机射频前端的总体设计方案,包括前端各部分增益的分配、动态范围的分配、噪声系数及灵敏度的计算,讨论了对器件选择的考虑.实际测试结果表明,该射频前端性能指标满足设计要求.     

基于IEEE802.16e的头压缩的设计与实现

介绍了IEEE802.16e协议中MACCS子层的头压缩机制,并结合MACCS子层的特点,提出了一种IEEE802.16e协议栈开发中MACCS子层头压缩模块的实现方案。通过对已有头压缩算法的研究分析,并结合IEEE802.16e协议的特性提出了一种适合宽带无线通信系统的头压缩算法。     

基于IEEE802.16e的头压缩的设计与实现

介绍了IEEE802.16e协议中MAC CS子层的头压缩机制,并结合MAC CS子层的特点,提出了一种IEEE 802.16e协议栈开发中MAC CS子层头压缩模块的实现方案.通过对已有头压缩算法的研究分析,并结合IEEE802.16e协议的特性提出了一种适合宽带无线通信系统的头压缩算法.     

Efficient sample rate conversion for software radio systems

An efficient sample rate conversion (SRC) method for software radio (SWR) systems is proposed. The proposed method modifies conventional single- or multistage SRC processes such that the computation of the output of a particular stage is performed in a hierarchical fashion. This SRC method consumes fewer computations than traditional SRC methods over a range of SRC factors and is especially suitable for SWR base station transmitters. The computational requirements of the proposed SRC method and conventional SRC methods are compared and simulation results of the proposed method are discussed.     

一种宽频段软件无线电平台的设计与实现

针对现代战术通信中背负式或手持电台体积小、功耗小和对不同频段信号兼容性好的应用需求,结合零中频采样和射频直接采样技术,设计了一种可覆盖较宽通信频段的软件无线电平台。通过将模数和数模转换模块与数字信号处理模块集成在一块印制板上,大大减小了该平台的体积。通过平台软件架构的设计,保证不同通信波形体制的实现。最后,通过调频(Frequency Modulation, FM)和正交相移键控(Quadrature Phase Shift Keying, QPSK)波形测试验证了该平台整个频段信号通信性能良好。该平台具有通信频道宽、结构简单、可靠性高等优点,满足小型化、低功耗和对不同频段信号具有高兼容性的使用需求。     

一种综合射频系统SCA软件平台的设计与实现

针对机载综合射频开放式系统架构,为了在软件综合层面上实现波形应用软件与具体平台的解耦,设计并实现了一种基于软件通信架构(Software Communication Architecture, SCA)的软件平台及其环境工具,解决了机载平台软件的分布式通信、资源调度管理、系统建模等技术问题,从而实现功能、应用和波形的组件化与动态重构。测试验证与工程应用情况表明,软件平台能够满足机载领域信号、信息处理强实时、高可用的应用需求,可有效提升综合射频系统软件开发质量与集成联试效率。     

GHAP: An Efficient Group-based Handover Authentication Mechanism for IEEE 802.16m Networks

IEEE 802.16m is now under consideration by the International Telecommunication Union (ITU) to become the International Mobile Telecommunications (IMT)-Advanced standard. However, handover authentication is a critical issue in this area. In this paper, we propose an efficient group-based handover authentication mechanism, named as GHAP, for correlated mobile stations (MSs) in IEEE 802.16m networks. In our scheme, the correlated MSs who have the similar Signal to Interference-plus-Noise Ratio and history handover information etc. are divided into the same handover group. When the first MS of the handover group members moves from the service base station (BS) to a target BS, the service BS transmits all the handover group members’ security context to the target BS utilizing the security context transfer (SCT) method and then all these MSs in the same handover group can easily perform the handover authentication with the target BS. Different from the conventional SCT schemes, our scheme uses the MSs’ security context as a symmetric key of Cipher-based message authentication code (CMAC) but not the key material of deriving new session key. Therefore, the proposed scheme can effectively resist the domino effect existing in the previous SCT schemes. Moreover, security analysis shows that the proposed scheme also meets the other security requirements in handover authentication semantics. Furthermore, performance analysis demonstrates that the proposed scheme is very efficient in reducing average handover latency.     

Efficient FPGA implementation of bit-stream multipliers

A four-input adder structure for the FPGA implementation of a sigma-delta bit-stream multiplier is proposed. Conventional bit-stream multiplier implementations involve two-input adder circuits. It is shown that the four-input adder structure is more resource-efficient (over 40% hardware savings) and faster (over 20% higher clock frequency) when implemented using state-of-the-art FPGA architecture featuring six-input look-up tables     

Analysis and implementation of six-port software-defined radio receiver platform

With recent advances in semiconductor processing technology and the development of reconfigurable devices, high bit-rate software-defined radio (SDR) has become practical for commercial applications. This paper proposes an SDR receiver platform based on a new substrate integrated waveguide six-port structure. This SDR receiver platform operates from 22 to 26 GHz and it is designed to be robust, low cost, and suitable for different communication schemes. In this study, the receiver is demonstrated to support quadrature phase-shift keying and 16 quadrature amplitude modulation schemes. System-level simulation is made and prototype circuits are fabricated to evaluate the system performance. It is found that the combination of SDR and six-port technology can provide a great flexibility in system configuration, a significant reduction in system development cost, and also a high potential for software reuse. The proposed receiver shows a possible application of universal direct demodulator for future SDR terminals in various wireless communication systems.     

IEEE 802.16a安全子层的实现

提出了一套基于RADIUS协议实现IEEE802.16a安全子层功能的方案。根据这个方案,建立一个专用的RADIUS服务器作为统一的认证服务器,BS把收到的来自SS的身份认证请求用UDP包发给RADIUS服务器,由后者完成相应的身份认证、授权及密钥生成的任务。引入RADIUS服务器的好处就在于能减轻BS的处理负担,使得网络在大量SS存在的情况下仍然能稳定的运行。     

IEEE802.16e标准的LDPC编码器设计及硬件实现

介绍了一种用FPGA实现满足IEEE802.16e协议的实时LDPC(Low Density Parity Check,低密度奇偶校验码)编码器的设计方法.设计充分利用校验矩阵H中循环右移的特点,有效地实现了线性编码.用Verilog语言和Matlab语言联调,最终实现了基于802.16e协议的编码器.得到的FPGA综合报告表明,在占用比传统编码器更少的存储资源的条件下,编码器符合802.16e标准的要求,能够被标准所运用.