A four-step method for de-embedding gigahertz on-wafer CMOSmeasurements

In this paper, a de-embedding method is proposed for conducting accurate on-wafer device measurements in the gigahertz range. The method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS. The method assumes a probe-tip two-port calibration performed with well-known techniques and impedance substrates. By employing a physical interpretation of the test-fixture, the method alleviates a number of known problems with common de-embedding procedures. Four distinct mathematical steps are suggested to de-embed parasitics for the test-fixture to give an accurate measurement of the device under test. By introducing a simple compensation factor for in-fixture standard imperfections, the proposed method allows large devices to be measured with high accuracy. The applicability of the method is demonstrated with measurements up to 12 GHz     

A scalable noise de-embedding technique for on-wafer microwave device characterization

In this letter, we present a scalable and efficient noise de-embedding procedure, which is based on transmission-line theory and cascade configurations, for on-wafer microwave measurements of silicon MOSFETs. The proposed de-embedding procedure utilizes one open and one thru dummy structures to eliminate the parasitic effects from the probe pads and the input/output interconnects of a device-under-test (DUT), respectively. This method can generate the scalable distributed interconnect parameters to efficiently and precisely remove the redundant parasitics of the DUTs with various device sizes and arbitrary interconnect dimensions.     

A general noise de-embedding procedure for packaged two-port linearactive devices

A method based on the noise correlation technique and its applications is described. The package, which need not be reciprocal, may consist of an arbitrary interconnection of linear passive elements at thermal equilibrium. Only the terminal admittance properties of the package need be known. However, in certain special cases which lead to singular submatrices of the admittance matrix, the method is inapplicable. This situation can occur when elements such as isolators are part of the package. The necessary theoretical foundation and experimental techniques to enable workers not familiar with the field to assemble the software and laboratory setup for two-port noise de-embedding is provided. The automated noise measurement system used for data acquisition and the mathematical basis for it are described in some detail. The validity of the de-embedding approach is established with extensive experimental data obtained on three MESFETs and a pseudomorphic HEMT     

100 GHz active electronic probe for on-wafer S-parameter measurements

Reports the development of an active electronic probe for 100 GHz on-wafer S-parameter measurements. Integrated on the substrate of this wafer probe were a quintupler for 100 GHz stimulus signal generation, two directional couplers for incident and reflected signals sampling, and two newly developed harmonic mixers to down-convert these 100 GHz signals to 20 MHz. The authors also demonstrate all-electronic on-wafer 75-100 GHz two-port S-parameter measurements using these probes.<>     

A wide-band on-wafer noise parameter measurement system at 50-75 GHz

A wide-band on-wafer noise parameter measurement system at 50-75 GHz is presented. This measurement system is based on the cold-source method with a computer-controlled waveguide tuner. Calibrations and measurement methods are discussed and measured results for passive and active on-wafer devices are shown over a 50-75 GHz range. An InP high electron-mobility transistor device is used as a test item for the active device. A Monte Carlo analysis to study measurement uncertainties is also shown. The measurement system is a useful tool in the development and verification of device noise models, as well as in device characterization.     

A three-step method for the de-embedding of high-frequencyS-parameter measurements

The authors propose a general method of deembedding S-parameter measurements of the device-under-test (DUT) for which typical parasitics associated with probe pads and interconnect-metal lines can be deembedded from the measurement. The DUT is the analog silicon bipolar junction transistor including the pad and interconnects. This method includes the subtraction of the parasitic shunt y-parameters of the on-wafer open calibration pattern as well as the subtraction of the parasitic series z-parameters on the on-wafer open circuit which are taken from measurements of the short and through circuits. It is demonstrated that the calculated power loss for the pad and interconnect parasitics can be comparable to the power consumption of the advanced bipolar transistor at high frequencies (⩾10 GHz). A knowledge of the magnitude and type of parasitic deembedding circuit elements can aid the device engineer in the analysis of the error associated with deembedding     

Verification procedure for radar quadrature processing unit with stepwise frequency modulation of the probing signal

The paper presents a verification procedure developed for the quadrature processing unit of radar with stepwise frequency modulation of the probing signal. The computer simulation and experiments on verifying the developed and manufactured quadrature processing unit were performed for the cases of placing a single stationary point object at distances 9 and 24 meters. The effect of inaccuracy in setting the phase shift between the reference oscillations of quadrature mixer on the waveform of spatial reflectogram was investigated by using the developed verification procedure; and it was shown that phase shift errors could lead to the generation of false responses.     

A parametric amplifier for 46 GHz

A degenerate parametric amplifier for 46 GHz is described. It uses a Schottky barrier varactor packaged in a modified Sharpless wafer. The novel amplifier mount construction, which uses no tuning screws, yields predictable and reproducible results. In good agreement with theory, 14-mW pump power was required and a noise temperature of less than 400°K was measured.     

A generalized scattering matrix approach for analysis ofquasi-optical grids and de-embedding of device parameters

A generalized scattering matrix approach to analyzing quasi-optical grids used for grid amplifiers and grid oscillators is developed. The approach is verified by a novel method for de-embedding, in a waveguide simulator, the active device parameters of a differential pair high electron mobility transistor (HEMT) from the single unit cell of a grid amplifier. The method incorporates the additional ports presented to the active device into a method of moments solution of the embedding periodic array. The port(s) defined at the device or load location are within the plane of the array, and not terminated in a microstrip line with a known characteristic impedance. Therefore the generalized scattering matrix for the embedding array is normalized to the calculated input impedance(s) at these port(s). The approach described here uses a Floquet representation of the fields incident and reflected from the grid as the remaining ports in the generalized scattering matrix. The use of Floquet modes allows analysis of general geometries and nonnormal incident angles without the need for magnetic and electric wall assumptions. By developing a generalized scattering matrix for the embedding periodic array, this approach now allows conventional amplifier design techniques and analysis methods to be applied to quasi-optical grid amplifier and oscillator design. The major advantage of this unification for grid amplifier design being that the stability of the design can be predicted     

双锥天线的普遍模型

椭圆双锥天线是具有普遍性的物理模型。应用坐标变换和共形变换研究椭圆双锥天线,在传输纯TEM波的假设下,把无限长椭圆双锥结构变换为二维平面结构,从而得到椭圆双锥天线输入阻抗闭合解,其典型结果与文献一致。所给出的椭圆双锥天线有关公式可以用来分析许多类型的锥天线,包括非对称锥天线。     

A universal method for directivity synthesis

A completely new synthesis method, the successive approximation method, is developed. By introducing a control function and a step-by-step approach program various directivity functions can be obtained in which the peaks of the sidelobes and specified zeros fit within a specified curve. This method is applicable to any form of array. Numerical calculations have been done to illustrate its applications: determining optimum current distribution of linear arrays, unequally spaced arrays, steering the main beam through current excitation, etc.     

A loop phase-locked 74 GHz impatt oscillator usable for precise spectroscopy to the 500 GHz region

To examine possible application to spectroscopy and laser frequency measurement, a 74 GHz impatt oscillator was phase-locked to a quartz-crystal oscillator harmonic using a loop employing a digital phase-frequency detector. The maximum frequency multiplication permissible without catastrophic spectral broadening was estimated from the locked-phase spectral-density curve to be about 7 times, to 500 GHz, a factor 3 less than for a good-quality well locked reflex klystron, because of greater phase noise remaining outside the loop bandwidth. The use of wideband loops already existing for solid-state oscillators could suppress this disadvantage.     

压控振荡器相位噪声的一种建模研究方法

电感电容压控振荡器（LC-VCO）是无线收发电路中的重要单元,它的频谱纯洁度将直接影响频率合成后的信号频谱,所以相位噪声是VCO的最重要的指标之一。提出了一种研究LC-VCO相位噪声的方法,使用VerilogA语言建立可控噪声和可控寄生电容的晶体管模型,通过用所建立的模型代替原有的spice晶体管模型来构成LC-VCO电路并进行仿真,能够对噪声和寄生电容进行开关控制,从而观察不同的噪声源以及不同的寄生特性对电路相位噪声的影响。使用该晶体管模型,仿真验证了噪声滤波理论中差分对管结电容对最优电感值选取的影响以及滤波电感对白噪声和闪烁噪声不同的抑制作用。     

A new lossy substrate de-embedding method for sub-100 nm RF CMOS noise extraction and modeling

A new equivalent circuit method is proposed in this paper to de-embed the lossy substrate and lossy pads' parasitics from the measured RF noise of multifinger MOSFETs with aggressive gate length scaling down to 80 nm. A new RLC network model is subsequently developed to simulate the lossy substrate and lossy pad effect. Good agreement has been realized between the measurement and simulation in terms of S-parameters and four noise parameters, NF/sub min/ (minimum noise figure), R/sub n/ (noise resistance), Re(Y/sub sopt/), and Im(Y/sub sopt/) for the sub-100-nm RF nMOS devices. The intrinsic NF/sub min/ extracted by the new de-embedding method reveal that NF/sub min/ at 10 GHz can be suppressed to below 0.8 dB for the 80-nm nMOS attributed to the advancement of f/sub T/ to 100-GHz level and the effectively reduced gate resistance by multifinger structure.     

A quasiparticle SIN mixer for the 230 GHz frequency range

We report on quasiparticle mixing in the frequency range 220 to 230 GHz using SIN junctions. The lowest double sideband receiver noise temperature measured was about 230 K. This result shows that the SIN junction provides an interesting alternative for high frequency heterodyne receivers where pair tunneling in SIS junctions could give rise to interference from Josephson effects.     

A superconducting tunnel junction receiver for 345 GHz

In this paper we discuss the design, fabrication, and testing of a quasiparticle tunnel junction receiver for use at 345 GHz. The design employs small area Nb/Nb-oxide/PbInAu edge junctions in order to keep the device capacitance small and maintain a modest value for ωR_NC. For optimura noise performance and beam properties the mixer is contained in a waveguide mounting structure. Our best sensitivity was obtained at 312 GHz where we measured a double sideband (DSB) noise temperature of 275 K. Noise temperatures of 400 K (DSB) or better were obtained out to 350 GHz.     

A 30 GHz MMIC receiver for satellite transponders

The development of 30-GHz-band monolithic microwave integrated circuits (MMICs) and multichip MMIC modules (low-noise amplifier and frequency converters) is reported. A 30-GHz-band full-MMIC receiver for satellite transponders was successfully constructed using the MMIC modules and the performance of the full-MMIC receiver is evaluated. Test results verify its successful performance as a satellite receiver system. The design and performance of the MMICs (a two-stage amplifier, an image rejection mixer, and a frequency multiplier), of multichip-type MMIC modules (a 30-GHz-band low-noise amplifier module with 30 dB gain and 8.2 dB noise figure, and an image rejection frequency converter with a 10 dB conversion loss and an 18 dB image rejection ratio) and of the full-MMIC receiver, which weighs 1/6 as much as a conventional hybrid integrated circuit are presented     

A universal matrix solver for integral-equation-based problems

A new method has been developed for compressing the matrices that occur in most integral-equation-based computer programs. This method is easy to interface with existing computer programs, and allows them to run significantly faster and with significantly less memory. This method applies not only to electromagnetic and acoustic computation, but also to most programs involving a Green's function or any integral equation with a kernel having some smoothness properties. Our numerical computations, running on a high-end personal computer, have achieved compression ratios of fifty times, and compressed inversion of the matrices fifty times faster than by previous methods. For larger problems, solved on high-performance computers, these ratios would improve to about one thousand to one for larger moment method problems.