低差错平底特性的非规则LDPC码的设计

介绍了非规则LDPC码的发展并给出了其优势及缺点，重点论述用ACE算法来构造非规则LDPC码从而降低其差错平底特性。对降低非规则LDPC码的差错平底特性的其它方法提出了展望。     

Quasi-cyclic LDPC codes with high-rate and low error floor based on Euclidean geometries

An improved Euclidean geometry approach to design quasi-cyclic (QC) Low-density parity-check (LDPC) codes with high-rate and low error floor is presented.The constructed QC-LDPC codes with high-rate ha...     

Flexible construction of irregular partitioned permutation LDPC codes with low, error floors

Irregular partitioned permutation (IPP) low-density parity-check (LDPC) codes have been recently introduced to facilitate hardware implementation of belief propagation (BP) decoders. In this letter, we present a new method to construct IPP LDPC codes with great flexibility in the selection of code parameters. Meanwhile, small stopping sets are avoided in the code construction, thus good error floor performance can be achieved.     

Analysis and design of punctured rate-1/2 turbo codes exhibiting low error floors

The objective of this paper is two-fold. Initially, we present an analytic technique to rapidly evaluate an approximation to the union bound on the bit error probability of turbo codes. This technique exploits the most significant terms of the union bound, which can be calculated straightforwardly by considering the properties of the constituent convolutional encoders. Subsequently, we use the bound approximation to demonstrate that specific punctured rate-1/2 turbo codes can achieve a lower error floor than that of their rate-1/3 parent codes. In particular, we propose pseudo-random puncturing as a means of improving the bandwidth efficiency of a turbo code and simultaneously lowering its error floor.     

Quasi-cyclic unit memory convolutional codes

Unit memory convolutional codes with generator matrices, which are composed of circulant submatrices, are introduced. This structure facilitates the analysis of efficient search for good codes. Equivalences among such codes and some of the basic structural properties are discussed. In particular, catastrophic encoders and minimal encoders are characterized and dual codes treated. Further, various distance measures are discussed, and a number of good codes, some of which result from efficient computer search and some of which result from known block codes, are presented     

Instanton-based techniques for analysis and reduction of error floors of LDPC codes

We describe a family of instanton-based optimization methods developed recently for the analysis of the error floors of low-density parity-check (LDPC) codes. Instantons are the most probable configurations of the channel noise which result in decoding failures. We show that the general idea and the respective optimization technique are applicable broadly to a variety of channels, discrete or continuous, and variety of sub-optimal decoders. Specifically, we consider: iterative belief propagation (BP) decoders, Gallager type decoders, and linear programming (LP) decoders performing over the additive white Gaussian noise channel (AWGNC) and the binary symmetric channel (BSC). The instanton analysis suggests that the underlying topological structures of the most probable instanton of the same code but different channels and decoders are related to each other. Armed with this understanding of the graphical structure of the instanton and its relation to the decoding failures, we suggest a method to construct codes whose Tanner graphs are free of these structures, and thus have less significant error floors.     

On the equivalence of generalized concatenated codes andgeneralized error location codes

We show that the generator matrix of a generalized concatenated code (GCC code) of order L consists of L submatrices, where the lth submatrix is the Kronecker product of the generator matrices of the lth inner code and the lth outer code. In a similar way we show that the parity-check matrix of a generalized error location code (GEL code) of order L consists of L submatrices, where the lth submatrix is the Gronecker product of the parity-check matrices of the lth inner code and the lth outer code. Then we use these defining matrices to show that for any GCC code there exists an equivalent GEL code and vice versa     

Quasi-cyclic LDPC codes for fast encoding

In this correspondence we present a special class of quasi-cyclic low-density parity-check (QC-LDPC) codes, called block-type LDPC (B-LDPC) codes, which have an efficient encoding algorithm due to the simple structure of their parity-check matrices. Since the parity-check matrix of a QC-LDPC code consists of circulant permutation matrices or the zero matrix, the required memory for storing it can be significantly reduced, as compared with randomly constructed LDPC codes. We show that the girth of a QC-LDPC code is upper-bounded by a certain number which is determined by the positions of circulant permutation matrices. The B-LDPC codes are constructed as irregular QC-LDPC codes with parity-check matrices of an almost lower triangular form so that they have an efficient encoding algorithm, good noise threshold, and low error floor. Their encoding complexity is linearly scaled regardless of the size of circulant permutation matrices.     

一种新颖的低错误平层LDPC码构造方法

针对低密度奇偶校验(LDPC)码在高信噪比区域可能存在错误平层的缺点,提出了一种低错误平层LDPC码的新构造方法。该方法的基本矩阵由渐进边增长(PEG)算法与近似环额外信息度(ACE)算法相结合,目的是提升基本矩阵中环的连通性;然后将基于分割移位(PS)的循环移位系数矩阵对基本矩阵循环扩展,以此构造出校验矩阵。该方法除了能够改善高信噪比区域的错误平层,还具有码长、码率的任意可设性特点。仿真结果表明,PAP-LDPC(3 600,2 700)码在信噪比为4 dB以后并未出现明显的错误平层。     

A class of irregular LDPC codes with low error floor and low encoding complexity

In this letter, we propose a class of irregular structured low-density parity-check (LDPC) codes with low error floor and low encoding complexity by designing the parity check matrix in a triangular plus dual-diagonal form. The proposed irregular codes clearly lower the error floor and dramatically improve the performance in the waterfall region of error-rate curves. Being characterized by linear encoding complexity, the encoders of the proposed codes attain throughputs over 10 Gbit/s.     

Quasi-cyclic dyadic codes in the Walsh-Hadamard transform domain

A code is s-quasi-cyclic (s-QC) if there is an integer s such that cyclic shift of a codeword by s-positions is also a codeword. For s = 1, cyclic codes are obtained. A dyadic code is a code which is closed under all dyadic shifts. An s-QC dyadic (s-QCD) code is one which is both s-QC and dyadic. QCD codes with s = 1 give codes that are cyclic and dyadic (CD). We obtain a simple characterization of all QCD codes (hence of CD codes) over any field of odd characteristic using Walsh-Hadamard transform defined over that finite field. Also, it is shown that dual a code of an s-QCD code is also an s-QCD code and s-QCD codes for a given dimension are enumerated for all possible values of s.     

An improvement of error exponents at low rates for the generalized version of concatenated codes (Corresp.)

The lower bound m the error exponent for the generalized version of concatenated codes is shown to be improved at low rates for binary-input memoryless channels.     

Quasi-cyclic LDPC codes using overlapping matrices and their layered decoders

Quasi-cyclic (QC) low-density parity-check (LDPC) codes have the parity-check matrices consisting of circulant matrices. Since QC LDPC codes whose parity-check matrices consist of only circulant permutation matrices are difficult to support layered decoding and, at the same time, have a good degree distribution with respect to error correcting performance, adopting multi-weight circulant matrices to parity-check matrices is useful but it has not been much researched. In this paper, we propose a new code structure for QC LDPC codes with multi-weight circulant matrices by introducing overlapping matrices. This structure enables a system to operate on dual mode in an efficient manner, that is, a standard QC LDPC code is used when the channel is relatively good and an enhanced QC LDPC code adopting an overlapping matrix is used otherwise. We also propose a new dual mode parallel decoder which supports the layered decoding both for the standard QC LDPC codes and the enhanced QC LDPC codes. Simulation results show that QC LDPC codes with the proposed structure have considerably improved error correcting performance and decoding throughput.     

A class of QC-LDPC codes with low encoding complexity and good error performance

We propose a novel approximate lower triangular structure for the parity part of the parity-check matrix of QC-LDPC codes. About half of the non-zero elements in the parity part are set to locate on the upper diagonal while the remaining non-zero elements can be located almost anywhere within the lower triangular area, provided certain rules are observed. Compared with the typical dual-diagonal structure, the proposed structure requires very similar encoding complexity and produces lower error rates over an AWGN channel.     

一种低差错平底线性复杂度的QC-LDPC码构造方法

本文给出了一种低差错平底QC-LDPC码构造方法.首先,提出了扩展近似下三角阵eALT( extern Approximate Lower Triangular)的全局矩阵构造法,通过对改进后的全局矩阵M进行矩阵置换,生成LDPC码的校验矩阵H以达 到减少小停止集( Stopping Set)数量,降低差错平台(Er...     

基于PEG算法的准循环扩展LDPC码构造

推导证明了准循环结构的LDPC码(low-density parity-check code)一致校验矩阵与其对应Tanner图环结构之间的一些重要关系.在此基础上提出了一种基于PEG(progress edge growth)算法的准循环扩展LDPC码构造算法,利用PEG算法产生基矩阵,再对基矩阵进行准循环扩展.该扩展算法可以在不改变基矩阵度分布比例情况下,有效消除基矩阵中的短环.仿真结果表明,在码长相同、码率和度分布近似情况下,新算法得到的码在经典BP和MS译码算法下性能不亚于PEG等方法构造的码.通过对比分析认为,在给定度分布的情况下,优化设计的环结构可明显改善译码性能,此算法利用准循环码环结构交叠较少特点,较好地实现了编码复杂度和译码性能之间的统一.     

Turbo codes with unequal error protection

The authors present a new simple method for designing turbo codes with unequal error protection (UEP). An example is given to provide numerical evidence of its effectiveness     

Maximum runlength-limited codes with error control capabilities

New methods are presented to protect maximum runlength-limited sequences against random and burst errors and to avoid error propagation. The methods employ parallel conversion techniques and enumerative coding algorithms that transform binary user information into constrained codewords. The new schemes have a low complexity and are very efficient. The approach can be used for modulation coding in recording systems and for synchronization and line coding in communication systems. The schemes enable the usage of high-rate constrained codes, as error control can be provided with similar capabilities as for unconstrained sequences     

Parallel concatenated codes with unequal error protection

We show how parallel concatenated codes (PCCs, also known as “turbo codes”) can be endowed with unequal error protection (UEP). Given the two component encoders of the PCC encoder and the desired interleaver size, UEP is achieved by: (1) suitably positioning the different importance classes of information symbols into the encoder input frame; (2) puncturing the PCC redundancy symbols with a nonuniform pattern; and (3) choosing the interleaver of the PCC encoder in a class of interleavers that guarantees isolation of the importance classes. By controlling the amount of redundancy assigned to each importance class and the class positioning in the input frame, a whole family of UEP PCCs with different UEP levels can be obtained from the same component encoders and interleaver size. From a practical viewpoint, a family of UEP PCCs can be decoded by the same “turbo” iterative decoder, provided that the decoder hardware implementation allows for programmable puncturing and interleaving